1 /* 2 * Suspend support specific for i386/x86-64. 3 * 4 * Distribute under GPLv2 5 * 6 * Copyright (c) 2007 Rafael J. Wysocki <rjw@sisk.pl> 7 * Copyright (c) 2002 Pavel Machek <pavel@suse.cz> 8 * Copyright (c) 2001 Patrick Mochel <mochel@osdl.org> 9 */ 10 11 #include <linux/suspend.h> 12 #include <linux/smp.h> 13 14 #include <asm/pgtable.h> 15 #include <asm/proto.h> 16 #include <asm/mtrr.h> 17 #include <asm/page.h> 18 #include <asm/mce.h> 19 #include <asm/xcr.h> 20 #include <asm/suspend.h> 21 #include <asm/debugreg.h> 22 23 #ifdef CONFIG_X86_32 24 static struct saved_context saved_context; 25 26 unsigned long saved_context_ebx; 27 unsigned long saved_context_esp, saved_context_ebp; 28 unsigned long saved_context_esi, saved_context_edi; 29 unsigned long saved_context_eflags; 30 #else 31 /* CONFIG_X86_64 */ 32 struct saved_context saved_context; 33 #endif 34 35 /** 36 * __save_processor_state - save CPU registers before creating a 37 * hibernation image and before restoring the memory state from it 38 * @ctxt - structure to store the registers contents in 39 * 40 * NOTE: If there is a CPU register the modification of which by the 41 * boot kernel (ie. the kernel used for loading the hibernation image) 42 * might affect the operations of the restored target kernel (ie. the one 43 * saved in the hibernation image), then its contents must be saved by this 44 * function. In other words, if kernel A is hibernated and different 45 * kernel B is used for loading the hibernation image into memory, the 46 * kernel A's __save_processor_state() function must save all registers 47 * needed by kernel A, so that it can operate correctly after the resume 48 * regardless of what kernel B does in the meantime. 49 */ 50 static void __save_processor_state(struct saved_context *ctxt) 51 { 52 #ifdef CONFIG_X86_32 53 mtrr_save_fixed_ranges(NULL); 54 #endif 55 kernel_fpu_begin(); 56 57 /* 58 * descriptor tables 59 */ 60 #ifdef CONFIG_X86_32 61 store_gdt(&ctxt->gdt); 62 store_idt(&ctxt->idt); 63 #else 64 /* CONFIG_X86_64 */ 65 store_gdt((struct desc_ptr *)&ctxt->gdt_limit); 66 store_idt((struct desc_ptr *)&ctxt->idt_limit); 67 #endif 68 store_tr(ctxt->tr); 69 70 /* XMM0..XMM15 should be handled by kernel_fpu_begin(). */ 71 /* 72 * segment registers 73 */ 74 #ifdef CONFIG_X86_32 75 savesegment(es, ctxt->es); 76 savesegment(fs, ctxt->fs); 77 savesegment(gs, ctxt->gs); 78 savesegment(ss, ctxt->ss); 79 #else 80 /* CONFIG_X86_64 */ 81 asm volatile ("movw %%ds, %0" : "=m" (ctxt->ds)); 82 asm volatile ("movw %%es, %0" : "=m" (ctxt->es)); 83 asm volatile ("movw %%fs, %0" : "=m" (ctxt->fs)); 84 asm volatile ("movw %%gs, %0" : "=m" (ctxt->gs)); 85 asm volatile ("movw %%ss, %0" : "=m" (ctxt->ss)); 86 87 rdmsrl(MSR_FS_BASE, ctxt->fs_base); 88 rdmsrl(MSR_GS_BASE, ctxt->gs_base); 89 rdmsrl(MSR_KERNEL_GS_BASE, ctxt->gs_kernel_base); 90 mtrr_save_fixed_ranges(NULL); 91 92 rdmsrl(MSR_EFER, ctxt->efer); 93 #endif 94 95 /* 96 * control registers 97 */ 98 ctxt->cr0 = read_cr0(); 99 ctxt->cr2 = read_cr2(); 100 ctxt->cr3 = read_cr3(); 101 #ifdef CONFIG_X86_32 102 ctxt->cr4 = read_cr4_safe(); 103 #else 104 /* CONFIG_X86_64 */ 105 ctxt->cr4 = read_cr4(); 106 ctxt->cr8 = read_cr8(); 107 #endif 108 } 109 110 /* Needed by apm.c */ 111 void save_processor_state(void) 112 { 113 __save_processor_state(&saved_context); 114 } 115 #ifdef CONFIG_X86_32 116 EXPORT_SYMBOL(save_processor_state); 117 #endif 118 119 static void do_fpu_end(void) 120 { 121 /* 122 * Restore FPU regs if necessary. 123 */ 124 kernel_fpu_end(); 125 } 126 127 static void fix_processor_context(void) 128 { 129 int cpu = smp_processor_id(); 130 struct tss_struct *t = &per_cpu(init_tss, cpu); 131 132 set_tss_desc(cpu, t); /* 133 * This just modifies memory; should not be 134 * necessary. But... This is necessary, because 135 * 386 hardware has concept of busy TSS or some 136 * similar stupidity. 137 */ 138 139 #ifdef CONFIG_X86_64 140 get_cpu_gdt_table(cpu)[GDT_ENTRY_TSS].type = 9; 141 142 syscall_init(); /* This sets MSR_*STAR and related */ 143 #endif 144 load_TR_desc(); /* This does ltr */ 145 load_LDT(¤t->active_mm->context); /* This does lldt */ 146 } 147 148 /** 149 * __restore_processor_state - restore the contents of CPU registers saved 150 * by __save_processor_state() 151 * @ctxt - structure to load the registers contents from 152 */ 153 static void __restore_processor_state(struct saved_context *ctxt) 154 { 155 /* 156 * control registers 157 */ 158 /* cr4 was introduced in the Pentium CPU */ 159 #ifdef CONFIG_X86_32 160 if (ctxt->cr4) 161 write_cr4(ctxt->cr4); 162 #else 163 /* CONFIG X86_64 */ 164 wrmsrl(MSR_EFER, ctxt->efer); 165 write_cr8(ctxt->cr8); 166 write_cr4(ctxt->cr4); 167 #endif 168 write_cr3(ctxt->cr3); 169 write_cr2(ctxt->cr2); 170 write_cr0(ctxt->cr0); 171 172 /* 173 * now restore the descriptor tables to their proper values 174 * ltr is done i fix_processor_context(). 175 */ 176 #ifdef CONFIG_X86_32 177 load_gdt(&ctxt->gdt); 178 load_idt(&ctxt->idt); 179 #else 180 /* CONFIG_X86_64 */ 181 load_gdt((const struct desc_ptr *)&ctxt->gdt_limit); 182 load_idt((const struct desc_ptr *)&ctxt->idt_limit); 183 #endif 184 185 /* 186 * segment registers 187 */ 188 #ifdef CONFIG_X86_32 189 loadsegment(es, ctxt->es); 190 loadsegment(fs, ctxt->fs); 191 loadsegment(gs, ctxt->gs); 192 loadsegment(ss, ctxt->ss); 193 194 /* 195 * sysenter MSRs 196 */ 197 if (boot_cpu_has(X86_FEATURE_SEP)) 198 enable_sep_cpu(); 199 #else 200 /* CONFIG_X86_64 */ 201 asm volatile ("movw %0, %%ds" :: "r" (ctxt->ds)); 202 asm volatile ("movw %0, %%es" :: "r" (ctxt->es)); 203 asm volatile ("movw %0, %%fs" :: "r" (ctxt->fs)); 204 load_gs_index(ctxt->gs); 205 asm volatile ("movw %0, %%ss" :: "r" (ctxt->ss)); 206 207 wrmsrl(MSR_FS_BASE, ctxt->fs_base); 208 wrmsrl(MSR_GS_BASE, ctxt->gs_base); 209 wrmsrl(MSR_KERNEL_GS_BASE, ctxt->gs_kernel_base); 210 #endif 211 212 /* 213 * restore XCR0 for xsave capable cpu's. 214 */ 215 if (cpu_has_xsave) 216 xsetbv(XCR_XFEATURE_ENABLED_MASK, pcntxt_mask); 217 218 fix_processor_context(); 219 220 do_fpu_end(); 221 mtrr_bp_restore(); 222 } 223 224 /* Needed by apm.c */ 225 void restore_processor_state(void) 226 { 227 __restore_processor_state(&saved_context); 228 } 229 #ifdef CONFIG_X86_32 230 EXPORT_SYMBOL(restore_processor_state); 231 #endif 232