1fb9aa6f1SThomas Gleixner #include <linux/kernel.h> 2fb9aa6f1SThomas Gleixner #include <linux/pci.h> 3fb9aa6f1SThomas Gleixner #include <asm/pci-direct.h> 4fb9aa6f1SThomas Gleixner #include <asm/io.h> 5fb9aa6f1SThomas Gleixner #include "pci.h" 6fb9aa6f1SThomas Gleixner 7fb9aa6f1SThomas Gleixner /* Direct PCI access. This is used for PCI accesses in early boot before 8fb9aa6f1SThomas Gleixner the PCI subsystem works. */ 9fb9aa6f1SThomas Gleixner 10fb9aa6f1SThomas Gleixner #define PDprintk(x...) 11fb9aa6f1SThomas Gleixner 12fb9aa6f1SThomas Gleixner u32 read_pci_config(u8 bus, u8 slot, u8 func, u8 offset) 13fb9aa6f1SThomas Gleixner { 14fb9aa6f1SThomas Gleixner u32 v; 15fb9aa6f1SThomas Gleixner outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); 16fb9aa6f1SThomas Gleixner v = inl(0xcfc); 17fb9aa6f1SThomas Gleixner if (v != 0xffffffff) 18fb9aa6f1SThomas Gleixner PDprintk("%x reading 4 from %x: %x\n", slot, offset, v); 19fb9aa6f1SThomas Gleixner return v; 20fb9aa6f1SThomas Gleixner } 21fb9aa6f1SThomas Gleixner 22fb9aa6f1SThomas Gleixner u8 read_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset) 23fb9aa6f1SThomas Gleixner { 24fb9aa6f1SThomas Gleixner u8 v; 25fb9aa6f1SThomas Gleixner outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); 26fb9aa6f1SThomas Gleixner v = inb(0xcfc + (offset&3)); 27fb9aa6f1SThomas Gleixner PDprintk("%x reading 1 from %x: %x\n", slot, offset, v); 28fb9aa6f1SThomas Gleixner return v; 29fb9aa6f1SThomas Gleixner } 30fb9aa6f1SThomas Gleixner 31fb9aa6f1SThomas Gleixner u16 read_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset) 32fb9aa6f1SThomas Gleixner { 33fb9aa6f1SThomas Gleixner u16 v; 34fb9aa6f1SThomas Gleixner outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); 35fb9aa6f1SThomas Gleixner v = inw(0xcfc + (offset&2)); 36fb9aa6f1SThomas Gleixner PDprintk("%x reading 2 from %x: %x\n", slot, offset, v); 37fb9aa6f1SThomas Gleixner return v; 38fb9aa6f1SThomas Gleixner } 39fb9aa6f1SThomas Gleixner 40fb9aa6f1SThomas Gleixner void write_pci_config(u8 bus, u8 slot, u8 func, u8 offset, 41fb9aa6f1SThomas Gleixner u32 val) 42fb9aa6f1SThomas Gleixner { 43fb9aa6f1SThomas Gleixner PDprintk("%x writing to %x: %x\n", slot, offset, val); 44fb9aa6f1SThomas Gleixner outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); 45fb9aa6f1SThomas Gleixner outl(val, 0xcfc); 46fb9aa6f1SThomas Gleixner } 47fb9aa6f1SThomas Gleixner 48fb9aa6f1SThomas Gleixner void write_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset, u8 val) 49fb9aa6f1SThomas Gleixner { 50fb9aa6f1SThomas Gleixner PDprintk("%x writing to %x: %x\n", slot, offset, val); 51fb9aa6f1SThomas Gleixner outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); 52e7891c73SYinghai Lu outb(val, 0xcfc + (offset&3)); 53e7891c73SYinghai Lu } 54e7891c73SYinghai Lu 55e7891c73SYinghai Lu void write_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset, u16 val) 56e7891c73SYinghai Lu { 57e7891c73SYinghai Lu PDprintk("%x writing to %x: %x\n", slot, offset, val); 58e7891c73SYinghai Lu outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); 59e7891c73SYinghai Lu outw(val, 0xcfc + (offset&2)); 60fb9aa6f1SThomas Gleixner } 61fb9aa6f1SThomas Gleixner 62fb9aa6f1SThomas Gleixner int early_pci_allowed(void) 63fb9aa6f1SThomas Gleixner { 64fb9aa6f1SThomas Gleixner return (pci_probe & (PCI_PROBE_CONF1|PCI_PROBE_NOEARLY)) == 65fb9aa6f1SThomas Gleixner PCI_PROBE_CONF1; 66fb9aa6f1SThomas Gleixner } 67*e3f2baebSYinghai Lu 68*e3f2baebSYinghai Lu void early_dump_pci_device(u8 bus, u8 slot, u8 func) 69*e3f2baebSYinghai Lu { 70*e3f2baebSYinghai Lu int i; 71*e3f2baebSYinghai Lu int j; 72*e3f2baebSYinghai Lu u32 val; 73*e3f2baebSYinghai Lu 74*e3f2baebSYinghai Lu printk("PCI: %02x:%02x:%02x", bus, slot, func); 75*e3f2baebSYinghai Lu 76*e3f2baebSYinghai Lu for (i = 0; i < 256; i += 4) { 77*e3f2baebSYinghai Lu if (!(i & 0x0f)) 78*e3f2baebSYinghai Lu printk("\n%04x:",i); 79*e3f2baebSYinghai Lu 80*e3f2baebSYinghai Lu val = read_pci_config(bus, slot, func, i); 81*e3f2baebSYinghai Lu for (j = 0; j < 4; j++) { 82*e3f2baebSYinghai Lu printk(" %02x", val & 0xff); 83*e3f2baebSYinghai Lu val >>= 8; 84*e3f2baebSYinghai Lu } 85*e3f2baebSYinghai Lu } 86*e3f2baebSYinghai Lu printk("\n"); 87*e3f2baebSYinghai Lu } 88*e3f2baebSYinghai Lu 89*e3f2baebSYinghai Lu void early_dump_pci_devices(void) 90*e3f2baebSYinghai Lu { 91*e3f2baebSYinghai Lu unsigned bus, slot, func; 92*e3f2baebSYinghai Lu 93*e3f2baebSYinghai Lu if (!early_pci_allowed()) 94*e3f2baebSYinghai Lu return; 95*e3f2baebSYinghai Lu 96*e3f2baebSYinghai Lu for (bus = 0; bus < 256; bus++) { 97*e3f2baebSYinghai Lu for (slot = 0; slot < 32; slot++) { 98*e3f2baebSYinghai Lu for (func = 0; func < 8; func++) { 99*e3f2baebSYinghai Lu u32 class; 100*e3f2baebSYinghai Lu u8 type; 101*e3f2baebSYinghai Lu class = read_pci_config(bus, slot, func, 102*e3f2baebSYinghai Lu PCI_CLASS_REVISION); 103*e3f2baebSYinghai Lu if (class == 0xffffffff) 104*e3f2baebSYinghai Lu break; 105*e3f2baebSYinghai Lu 106*e3f2baebSYinghai Lu early_dump_pci_device(bus, slot, func); 107*e3f2baebSYinghai Lu 108*e3f2baebSYinghai Lu /* No multi-function device? */ 109*e3f2baebSYinghai Lu type = read_pci_config_byte(bus, slot, func, 110*e3f2baebSYinghai Lu PCI_HEADER_TYPE); 111*e3f2baebSYinghai Lu if (!(type & 0x80)) 112*e3f2baebSYinghai Lu break; 113*e3f2baebSYinghai Lu } 114*e3f2baebSYinghai Lu } 115*e3f2baebSYinghai Lu } 116*e3f2baebSYinghai Lu } 117*e3f2baebSYinghai Lu 118