120c8ccb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2ff53604bSXiao Guangrong /* 3ff53604bSXiao Guangrong * vMTRR implementation 4ff53604bSXiao Guangrong * 5ff53604bSXiao Guangrong * Copyright (C) 2006 Qumranet, Inc. 6ff53604bSXiao Guangrong * Copyright 2010 Red Hat, Inc. and/or its affiliates. 7ff53604bSXiao Guangrong * Copyright(C) 2015 Intel Corporation. 8ff53604bSXiao Guangrong * 9ff53604bSXiao Guangrong * Authors: 10ff53604bSXiao Guangrong * Yaniv Kamay <yaniv@qumranet.com> 11ff53604bSXiao Guangrong * Avi Kivity <avi@qumranet.com> 12ff53604bSXiao Guangrong * Marcelo Tosatti <mtosatti@redhat.com> 13ff53604bSXiao Guangrong * Paolo Bonzini <pbonzini@redhat.com> 14ff53604bSXiao Guangrong * Xiao Guangrong <guangrong.xiao@linux.intel.com> 15ff53604bSXiao Guangrong */ 168d20bd63SSean Christopherson #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 17ff53604bSXiao Guangrong 18ff53604bSXiao Guangrong #include <linux/kvm_host.h> 19ff53604bSXiao Guangrong #include <asm/mtrr.h> 20ff53604bSXiao Guangrong 21ff53604bSXiao Guangrong #include "cpuid.h" 22ff53604bSXiao Guangrong #include "mmu.h" 23ff53604bSXiao Guangrong 2410fac2dcSXiao Guangrong #define IA32_MTRR_DEF_TYPE_E (1ULL << 11) 2510fac2dcSXiao Guangrong #define IA32_MTRR_DEF_TYPE_FE (1ULL << 10) 2610fac2dcSXiao Guangrong #define IA32_MTRR_DEF_TYPE_TYPE_MASK (0xff) 2710fac2dcSXiao Guangrong 28ebda79e5SSean Christopherson static bool is_mtrr_base_msr(unsigned int msr) 29ebda79e5SSean Christopherson { 30ebda79e5SSean Christopherson /* MTRR base MSRs use even numbers, masks use odd numbers. */ 31ebda79e5SSean Christopherson return !(msr & 0x1); 32ebda79e5SSean Christopherson } 33ebda79e5SSean Christopherson 34*9ae38b4fSSean Christopherson static struct kvm_mtrr_range *var_mtrr_msr_to_range(struct kvm_vcpu *vcpu, 35*9ae38b4fSSean Christopherson unsigned int msr) 36*9ae38b4fSSean Christopherson { 37*9ae38b4fSSean Christopherson int index = (msr - 0x200) / 2; 38*9ae38b4fSSean Christopherson 39*9ae38b4fSSean Christopherson return &vcpu->arch.mtrr_state.var_ranges[index]; 40*9ae38b4fSSean Christopherson } 41*9ae38b4fSSean Christopherson 42ff53604bSXiao Guangrong static bool msr_mtrr_valid(unsigned msr) 43ff53604bSXiao Guangrong { 44ff53604bSXiao Guangrong switch (msr) { 45ff53604bSXiao Guangrong case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1: 46ff53604bSXiao Guangrong case MSR_MTRRfix64K_00000: 47ff53604bSXiao Guangrong case MSR_MTRRfix16K_80000: 48ff53604bSXiao Guangrong case MSR_MTRRfix16K_A0000: 49ff53604bSXiao Guangrong case MSR_MTRRfix4K_C0000: 50ff53604bSXiao Guangrong case MSR_MTRRfix4K_C8000: 51ff53604bSXiao Guangrong case MSR_MTRRfix4K_D0000: 52ff53604bSXiao Guangrong case MSR_MTRRfix4K_D8000: 53ff53604bSXiao Guangrong case MSR_MTRRfix4K_E0000: 54ff53604bSXiao Guangrong case MSR_MTRRfix4K_E8000: 55ff53604bSXiao Guangrong case MSR_MTRRfix4K_F0000: 56ff53604bSXiao Guangrong case MSR_MTRRfix4K_F8000: 57ff53604bSXiao Guangrong case MSR_MTRRdefType: 58ff53604bSXiao Guangrong case MSR_IA32_CR_PAT: 59ff53604bSXiao Guangrong return true; 60ff53604bSXiao Guangrong } 61ff53604bSXiao Guangrong return false; 62ff53604bSXiao Guangrong } 63ff53604bSXiao Guangrong 64ff53604bSXiao Guangrong static bool valid_mtrr_type(unsigned t) 65ff53604bSXiao Guangrong { 66ff53604bSXiao Guangrong return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */ 67ff53604bSXiao Guangrong } 68ff53604bSXiao Guangrong 69ff53604bSXiao Guangrong bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data) 70ff53604bSXiao Guangrong { 71ff53604bSXiao Guangrong int i; 72ff53604bSXiao Guangrong u64 mask; 73ff53604bSXiao Guangrong 74ff53604bSXiao Guangrong if (!msr_mtrr_valid(msr)) 75ff53604bSXiao Guangrong return false; 76ff53604bSXiao Guangrong 77ff53604bSXiao Guangrong if (msr == MSR_IA32_CR_PAT) { 78674ea351SPaolo Bonzini return kvm_pat_valid(data); 79ff53604bSXiao Guangrong } else if (msr == MSR_MTRRdefType) { 80ff53604bSXiao Guangrong if (data & ~0xcff) 81ff53604bSXiao Guangrong return false; 82ff53604bSXiao Guangrong return valid_mtrr_type(data & 0xff); 83ff53604bSXiao Guangrong } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) { 84ff53604bSXiao Guangrong for (i = 0; i < 8 ; i++) 85ff53604bSXiao Guangrong if (!valid_mtrr_type((data >> (i * 8)) & 0xff)) 86ff53604bSXiao Guangrong return false; 87ff53604bSXiao Guangrong return true; 88ff53604bSXiao Guangrong } 89ff53604bSXiao Guangrong 90ff53604bSXiao Guangrong /* variable MTRRs */ 91ff53604bSXiao Guangrong WARN_ON(!(msr >= 0x200 && msr < 0x200 + 2 * KVM_NR_VAR_MTRR)); 92ff53604bSXiao Guangrong 93a8ac864aSSean Christopherson mask = kvm_vcpu_reserved_gpa_bits_raw(vcpu); 94ff53604bSXiao Guangrong if ((msr & 1) == 0) { 95ff53604bSXiao Guangrong /* MTRR base */ 96ff53604bSXiao Guangrong if (!valid_mtrr_type(data & 0xff)) 97ff53604bSXiao Guangrong return false; 98ff53604bSXiao Guangrong mask |= 0xf00; 99ff53604bSXiao Guangrong } else 100ff53604bSXiao Guangrong /* MTRR mask */ 101ff53604bSXiao Guangrong mask |= 0x7ff; 102ff53604bSXiao Guangrong 1039caec4bfSPaolo Bonzini return (data & mask) == 0; 104ff53604bSXiao Guangrong } 105ff53604bSXiao Guangrong EXPORT_SYMBOL_GPL(kvm_mtrr_valid); 106ff53604bSXiao Guangrong 10710fac2dcSXiao Guangrong static bool mtrr_is_enabled(struct kvm_mtrr *mtrr_state) 10810fac2dcSXiao Guangrong { 10910fac2dcSXiao Guangrong return !!(mtrr_state->deftype & IA32_MTRR_DEF_TYPE_E); 11010fac2dcSXiao Guangrong } 11110fac2dcSXiao Guangrong 11210fac2dcSXiao Guangrong static bool fixed_mtrr_is_enabled(struct kvm_mtrr *mtrr_state) 11310fac2dcSXiao Guangrong { 11410fac2dcSXiao Guangrong return !!(mtrr_state->deftype & IA32_MTRR_DEF_TYPE_FE); 11510fac2dcSXiao Guangrong } 11610fac2dcSXiao Guangrong 11710fac2dcSXiao Guangrong static u8 mtrr_default_type(struct kvm_mtrr *mtrr_state) 11810fac2dcSXiao Guangrong { 11910fac2dcSXiao Guangrong return mtrr_state->deftype & IA32_MTRR_DEF_TYPE_TYPE_MASK; 12010fac2dcSXiao Guangrong } 12110fac2dcSXiao Guangrong 122e24dea2aSPaolo Bonzini static u8 mtrr_disabled_type(struct kvm_vcpu *vcpu) 12310dc331fSXiao Guangrong { 12410dc331fSXiao Guangrong /* 12510dc331fSXiao Guangrong * Intel SDM 11.11.2.2: all MTRRs are disabled when 12610dc331fSXiao Guangrong * IA32_MTRR_DEF_TYPE.E bit is cleared, and the UC 12710dc331fSXiao Guangrong * memory type is applied to all of physical memory. 128e24dea2aSPaolo Bonzini * 129e24dea2aSPaolo Bonzini * However, virtual machines can be run with CPUID such that 130e24dea2aSPaolo Bonzini * there are no MTRRs. In that case, the firmware will never 131e24dea2aSPaolo Bonzini * enable MTRRs and it is obviously undesirable to run the 132e24dea2aSPaolo Bonzini * guest entirely with UC memory and we use WB. 13310dc331fSXiao Guangrong */ 134d6321d49SRadim Krčmář if (guest_cpuid_has(vcpu, X86_FEATURE_MTRR)) 13510dc331fSXiao Guangrong return MTRR_TYPE_UNCACHABLE; 136e24dea2aSPaolo Bonzini else 137e24dea2aSPaolo Bonzini return MTRR_TYPE_WRBACK; 13810dc331fSXiao Guangrong } 13910dc331fSXiao Guangrong 140de9aef5eSXiao Guangrong /* 141de9aef5eSXiao Guangrong * Three terms are used in the following code: 142de9aef5eSXiao Guangrong * - segment, it indicates the address segments covered by fixed MTRRs. 143de9aef5eSXiao Guangrong * - unit, it corresponds to the MSR entry in the segment. 144de9aef5eSXiao Guangrong * - range, a range is covered in one memory cache type. 145de9aef5eSXiao Guangrong */ 146de9aef5eSXiao Guangrong struct fixed_mtrr_segment { 147de9aef5eSXiao Guangrong u64 start; 148de9aef5eSXiao Guangrong u64 end; 149de9aef5eSXiao Guangrong 150de9aef5eSXiao Guangrong int range_shift; 151de9aef5eSXiao Guangrong 152de9aef5eSXiao Guangrong /* the start position in kvm_mtrr.fixed_ranges[]. */ 153de9aef5eSXiao Guangrong int range_start; 154de9aef5eSXiao Guangrong }; 155de9aef5eSXiao Guangrong 156de9aef5eSXiao Guangrong static struct fixed_mtrr_segment fixed_seg_table[] = { 157de9aef5eSXiao Guangrong /* MSR_MTRRfix64K_00000, 1 unit. 64K fixed mtrr. */ 158de9aef5eSXiao Guangrong { 159de9aef5eSXiao Guangrong .start = 0x0, 160de9aef5eSXiao Guangrong .end = 0x80000, 161de9aef5eSXiao Guangrong .range_shift = 16, /* 64K */ 162de9aef5eSXiao Guangrong .range_start = 0, 163de9aef5eSXiao Guangrong }, 164de9aef5eSXiao Guangrong 165de9aef5eSXiao Guangrong /* 166de9aef5eSXiao Guangrong * MSR_MTRRfix16K_80000 ... MSR_MTRRfix16K_A0000, 2 units, 167de9aef5eSXiao Guangrong * 16K fixed mtrr. 168de9aef5eSXiao Guangrong */ 169de9aef5eSXiao Guangrong { 170de9aef5eSXiao Guangrong .start = 0x80000, 171de9aef5eSXiao Guangrong .end = 0xc0000, 172de9aef5eSXiao Guangrong .range_shift = 14, /* 16K */ 173de9aef5eSXiao Guangrong .range_start = 8, 174de9aef5eSXiao Guangrong }, 175de9aef5eSXiao Guangrong 176de9aef5eSXiao Guangrong /* 177de9aef5eSXiao Guangrong * MSR_MTRRfix4K_C0000 ... MSR_MTRRfix4K_F8000, 8 units, 178de9aef5eSXiao Guangrong * 4K fixed mtrr. 179de9aef5eSXiao Guangrong */ 180de9aef5eSXiao Guangrong { 181de9aef5eSXiao Guangrong .start = 0xc0000, 182de9aef5eSXiao Guangrong .end = 0x100000, 183de9aef5eSXiao Guangrong .range_shift = 12, /* 12K */ 184de9aef5eSXiao Guangrong .range_start = 24, 185de9aef5eSXiao Guangrong } 186de9aef5eSXiao Guangrong }; 187de9aef5eSXiao Guangrong 188de9aef5eSXiao Guangrong /* 189de9aef5eSXiao Guangrong * The size of unit is covered in one MSR, one MSR entry contains 190de9aef5eSXiao Guangrong * 8 ranges so that unit size is always 8 * 2^range_shift. 191de9aef5eSXiao Guangrong */ 192de9aef5eSXiao Guangrong static u64 fixed_mtrr_seg_unit_size(int seg) 193de9aef5eSXiao Guangrong { 194de9aef5eSXiao Guangrong return 8 << fixed_seg_table[seg].range_shift; 195de9aef5eSXiao Guangrong } 196de9aef5eSXiao Guangrong 197de9aef5eSXiao Guangrong static bool fixed_msr_to_seg_unit(u32 msr, int *seg, int *unit) 198de9aef5eSXiao Guangrong { 199de9aef5eSXiao Guangrong switch (msr) { 200de9aef5eSXiao Guangrong case MSR_MTRRfix64K_00000: 201de9aef5eSXiao Guangrong *seg = 0; 202de9aef5eSXiao Guangrong *unit = 0; 203de9aef5eSXiao Guangrong break; 204de9aef5eSXiao Guangrong case MSR_MTRRfix16K_80000 ... MSR_MTRRfix16K_A0000: 205de9aef5eSXiao Guangrong *seg = 1; 20625a5edeaSMarios Pomonis *unit = array_index_nospec( 20725a5edeaSMarios Pomonis msr - MSR_MTRRfix16K_80000, 20825a5edeaSMarios Pomonis MSR_MTRRfix16K_A0000 - MSR_MTRRfix16K_80000 + 1); 209de9aef5eSXiao Guangrong break; 210de9aef5eSXiao Guangrong case MSR_MTRRfix4K_C0000 ... MSR_MTRRfix4K_F8000: 211de9aef5eSXiao Guangrong *seg = 2; 21225a5edeaSMarios Pomonis *unit = array_index_nospec( 21325a5edeaSMarios Pomonis msr - MSR_MTRRfix4K_C0000, 21425a5edeaSMarios Pomonis MSR_MTRRfix4K_F8000 - MSR_MTRRfix4K_C0000 + 1); 215de9aef5eSXiao Guangrong break; 216de9aef5eSXiao Guangrong default: 217de9aef5eSXiao Guangrong return false; 218de9aef5eSXiao Guangrong } 219de9aef5eSXiao Guangrong 220de9aef5eSXiao Guangrong return true; 221de9aef5eSXiao Guangrong } 222de9aef5eSXiao Guangrong 223de9aef5eSXiao Guangrong static void fixed_mtrr_seg_unit_range(int seg, int unit, u64 *start, u64 *end) 224de9aef5eSXiao Guangrong { 225de9aef5eSXiao Guangrong struct fixed_mtrr_segment *mtrr_seg = &fixed_seg_table[seg]; 226de9aef5eSXiao Guangrong u64 unit_size = fixed_mtrr_seg_unit_size(seg); 227de9aef5eSXiao Guangrong 228de9aef5eSXiao Guangrong *start = mtrr_seg->start + unit * unit_size; 229de9aef5eSXiao Guangrong *end = *start + unit_size; 230de9aef5eSXiao Guangrong WARN_ON(*end > mtrr_seg->end); 231de9aef5eSXiao Guangrong } 232de9aef5eSXiao Guangrong 233de9aef5eSXiao Guangrong static int fixed_mtrr_seg_unit_range_index(int seg, int unit) 234de9aef5eSXiao Guangrong { 235de9aef5eSXiao Guangrong struct fixed_mtrr_segment *mtrr_seg = &fixed_seg_table[seg]; 236de9aef5eSXiao Guangrong 237de9aef5eSXiao Guangrong WARN_ON(mtrr_seg->start + unit * fixed_mtrr_seg_unit_size(seg) 238de9aef5eSXiao Guangrong > mtrr_seg->end); 239de9aef5eSXiao Guangrong 240de9aef5eSXiao Guangrong /* each unit has 8 ranges. */ 241de9aef5eSXiao Guangrong return mtrr_seg->range_start + 8 * unit; 242de9aef5eSXiao Guangrong } 243de9aef5eSXiao Guangrong 244f571c097SXiao Guangrong static int fixed_mtrr_seg_end_range_index(int seg) 245f571c097SXiao Guangrong { 246f571c097SXiao Guangrong struct fixed_mtrr_segment *mtrr_seg = &fixed_seg_table[seg]; 247f571c097SXiao Guangrong int n; 248f571c097SXiao Guangrong 249f571c097SXiao Guangrong n = (mtrr_seg->end - mtrr_seg->start) >> mtrr_seg->range_shift; 250f571c097SXiao Guangrong return mtrr_seg->range_start + n - 1; 251f571c097SXiao Guangrong } 252f571c097SXiao Guangrong 253de9aef5eSXiao Guangrong static bool fixed_msr_to_range(u32 msr, u64 *start, u64 *end) 254de9aef5eSXiao Guangrong { 255de9aef5eSXiao Guangrong int seg, unit; 256de9aef5eSXiao Guangrong 257de9aef5eSXiao Guangrong if (!fixed_msr_to_seg_unit(msr, &seg, &unit)) 258de9aef5eSXiao Guangrong return false; 259de9aef5eSXiao Guangrong 260de9aef5eSXiao Guangrong fixed_mtrr_seg_unit_range(seg, unit, start, end); 261de9aef5eSXiao Guangrong return true; 262de9aef5eSXiao Guangrong } 263de9aef5eSXiao Guangrong 264de9aef5eSXiao Guangrong static int fixed_msr_to_range_index(u32 msr) 265de9aef5eSXiao Guangrong { 266de9aef5eSXiao Guangrong int seg, unit; 267de9aef5eSXiao Guangrong 268de9aef5eSXiao Guangrong if (!fixed_msr_to_seg_unit(msr, &seg, &unit)) 269de9aef5eSXiao Guangrong return -1; 270de9aef5eSXiao Guangrong 271de9aef5eSXiao Guangrong return fixed_mtrr_seg_unit_range_index(seg, unit); 272de9aef5eSXiao Guangrong } 273de9aef5eSXiao Guangrong 274f7bfb57bSXiao Guangrong static int fixed_mtrr_addr_to_seg(u64 addr) 275f7bfb57bSXiao Guangrong { 276f7bfb57bSXiao Guangrong struct fixed_mtrr_segment *mtrr_seg; 277f7bfb57bSXiao Guangrong int seg, seg_num = ARRAY_SIZE(fixed_seg_table); 278f7bfb57bSXiao Guangrong 279f7bfb57bSXiao Guangrong for (seg = 0; seg < seg_num; seg++) { 280f7bfb57bSXiao Guangrong mtrr_seg = &fixed_seg_table[seg]; 281a7f2d786SAlexis Dambricourt if (mtrr_seg->start <= addr && addr < mtrr_seg->end) 282f7bfb57bSXiao Guangrong return seg; 283f7bfb57bSXiao Guangrong } 284f7bfb57bSXiao Guangrong 285f7bfb57bSXiao Guangrong return -1; 286f7bfb57bSXiao Guangrong } 287f7bfb57bSXiao Guangrong 288f7bfb57bSXiao Guangrong static int fixed_mtrr_addr_seg_to_range_index(u64 addr, int seg) 289f7bfb57bSXiao Guangrong { 290f7bfb57bSXiao Guangrong struct fixed_mtrr_segment *mtrr_seg; 291f7bfb57bSXiao Guangrong int index; 292f7bfb57bSXiao Guangrong 293f7bfb57bSXiao Guangrong mtrr_seg = &fixed_seg_table[seg]; 294f7bfb57bSXiao Guangrong index = mtrr_seg->range_start; 295f7bfb57bSXiao Guangrong index += (addr - mtrr_seg->start) >> mtrr_seg->range_shift; 296f7bfb57bSXiao Guangrong return index; 297f7bfb57bSXiao Guangrong } 298f7bfb57bSXiao Guangrong 299f571c097SXiao Guangrong static u64 fixed_mtrr_range_end_addr(int seg, int index) 300f571c097SXiao Guangrong { 301f571c097SXiao Guangrong struct fixed_mtrr_segment *mtrr_seg = &fixed_seg_table[seg]; 302f571c097SXiao Guangrong int pos = index - mtrr_seg->range_start; 303f571c097SXiao Guangrong 304f571c097SXiao Guangrong return mtrr_seg->start + ((pos + 1) << mtrr_seg->range_shift); 305f571c097SXiao Guangrong } 306f571c097SXiao Guangrong 307a13842dcSXiao Guangrong static void var_mtrr_range(struct kvm_mtrr_range *range, u64 *start, u64 *end) 308a13842dcSXiao Guangrong { 309a13842dcSXiao Guangrong u64 mask; 310a13842dcSXiao Guangrong 311a13842dcSXiao Guangrong *start = range->base & PAGE_MASK; 312a13842dcSXiao Guangrong 313a13842dcSXiao Guangrong mask = range->mask & PAGE_MASK; 314a13842dcSXiao Guangrong 315a13842dcSXiao Guangrong /* This cannot overflow because writing to the reserved bits of 316a13842dcSXiao Guangrong * variable MTRRs causes a #GP. 317a13842dcSXiao Guangrong */ 318a13842dcSXiao Guangrong *end = (*start | ~mask) + 1; 319a13842dcSXiao Guangrong } 320a13842dcSXiao Guangrong 321ff53604bSXiao Guangrong static void update_mtrr(struct kvm_vcpu *vcpu, u32 msr) 322ff53604bSXiao Guangrong { 32370109e7dSXiao Guangrong struct kvm_mtrr *mtrr_state = &vcpu->arch.mtrr_state; 324a13842dcSXiao Guangrong gfn_t start, end; 325ff53604bSXiao Guangrong 326ff53604bSXiao Guangrong if (msr == MSR_IA32_CR_PAT || !tdp_enabled || 327ff53604bSXiao Guangrong !kvm_arch_has_noncoherent_dma(vcpu->kvm)) 328ff53604bSXiao Guangrong return; 329ff53604bSXiao Guangrong 33010fac2dcSXiao Guangrong if (!mtrr_is_enabled(mtrr_state) && msr != MSR_MTRRdefType) 331ff53604bSXiao Guangrong return; 332ff53604bSXiao Guangrong 333de9aef5eSXiao Guangrong /* fixed MTRRs. */ 334de9aef5eSXiao Guangrong if (fixed_msr_to_range(msr, &start, &end)) { 335de9aef5eSXiao Guangrong if (!fixed_mtrr_is_enabled(mtrr_state)) 336de9aef5eSXiao Guangrong return; 337de9aef5eSXiao Guangrong } else if (msr == MSR_MTRRdefType) { 338ff53604bSXiao Guangrong start = 0x0; 339ff53604bSXiao Guangrong end = ~0ULL; 340de9aef5eSXiao Guangrong } else { 341ff53604bSXiao Guangrong /* variable range MTRRs. */ 342*9ae38b4fSSean Christopherson var_mtrr_range(var_mtrr_msr_to_range(vcpu, msr), &start, &end); 343ff53604bSXiao Guangrong } 344ff53604bSXiao Guangrong 345ff53604bSXiao Guangrong kvm_zap_gfn_range(vcpu->kvm, gpa_to_gfn(start), gpa_to_gfn(end)); 346ff53604bSXiao Guangrong } 347ff53604bSXiao Guangrong 34819efffa2SXiao Guangrong static bool var_mtrr_range_is_valid(struct kvm_mtrr_range *range) 34919efffa2SXiao Guangrong { 35019efffa2SXiao Guangrong return (range->mask & (1 << 11)) != 0; 35119efffa2SXiao Guangrong } 35219efffa2SXiao Guangrong 35319efffa2SXiao Guangrong static void set_var_mtrr_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data) 35419efffa2SXiao Guangrong { 35519efffa2SXiao Guangrong struct kvm_mtrr *mtrr_state = &vcpu->arch.mtrr_state; 35619efffa2SXiao Guangrong struct kvm_mtrr_range *tmp, *cur; 35719efffa2SXiao Guangrong 358*9ae38b4fSSean Christopherson cur = var_mtrr_msr_to_range(vcpu, msr); 35919efffa2SXiao Guangrong 36019efffa2SXiao Guangrong /* remove the entry if it's in the list. */ 36119efffa2SXiao Guangrong if (var_mtrr_range_is_valid(cur)) 362*9ae38b4fSSean Christopherson list_del(&cur->node); 36319efffa2SXiao Guangrong 364a8ac864aSSean Christopherson /* 365a8ac864aSSean Christopherson * Set all illegal GPA bits in the mask, since those bits must 366a8ac864aSSean Christopherson * implicitly be 0. The bits are then cleared when reading them. 367fa7c4ebdSPaolo Bonzini */ 368ebda79e5SSean Christopherson if (is_mtrr_base_msr(msr)) 36919efffa2SXiao Guangrong cur->base = data; 37019efffa2SXiao Guangrong else 371a8ac864aSSean Christopherson cur->mask = data | kvm_vcpu_reserved_gpa_bits_raw(vcpu); 37219efffa2SXiao Guangrong 37319efffa2SXiao Guangrong /* add it to the list if it's enabled. */ 37419efffa2SXiao Guangrong if (var_mtrr_range_is_valid(cur)) { 37519efffa2SXiao Guangrong list_for_each_entry(tmp, &mtrr_state->head, node) 37619efffa2SXiao Guangrong if (cur->base >= tmp->base) 37719efffa2SXiao Guangrong break; 37819efffa2SXiao Guangrong list_add_tail(&cur->node, &tmp->node); 37919efffa2SXiao Guangrong } 38019efffa2SXiao Guangrong } 38119efffa2SXiao Guangrong 382ff53604bSXiao Guangrong int kvm_mtrr_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data) 383ff53604bSXiao Guangrong { 384de9aef5eSXiao Guangrong int index; 385ff53604bSXiao Guangrong 386ff53604bSXiao Guangrong if (!kvm_mtrr_valid(vcpu, msr, data)) 387ff53604bSXiao Guangrong return 1; 388ff53604bSXiao Guangrong 389de9aef5eSXiao Guangrong index = fixed_msr_to_range_index(msr); 390de9aef5eSXiao Guangrong if (index >= 0) 391de9aef5eSXiao Guangrong *(u64 *)&vcpu->arch.mtrr_state.fixed_ranges[index] = data; 392de9aef5eSXiao Guangrong else if (msr == MSR_MTRRdefType) 39310fac2dcSXiao Guangrong vcpu->arch.mtrr_state.deftype = data; 394ff53604bSXiao Guangrong else if (msr == MSR_IA32_CR_PAT) 395ff53604bSXiao Guangrong vcpu->arch.pat = data; 396ff53604bSXiao Guangrong else 39719efffa2SXiao Guangrong set_var_mtrr_msr(vcpu, msr, data); 398ff53604bSXiao Guangrong 399ff53604bSXiao Guangrong update_mtrr(vcpu, msr); 400ff53604bSXiao Guangrong return 0; 401ff53604bSXiao Guangrong } 402ff53604bSXiao Guangrong 403ff53604bSXiao Guangrong int kvm_mtrr_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata) 404ff53604bSXiao Guangrong { 405de9aef5eSXiao Guangrong int index; 406ff53604bSXiao Guangrong 407eb839917SXiao Guangrong /* MSR_MTRRcap is a readonly MSR. */ 408eb839917SXiao Guangrong if (msr == MSR_MTRRcap) { 409eb839917SXiao Guangrong /* 410eb839917SXiao Guangrong * SMRR = 0 411eb839917SXiao Guangrong * WC = 1 412eb839917SXiao Guangrong * FIX = 1 413eb839917SXiao Guangrong * VCNT = KVM_NR_VAR_MTRR 414eb839917SXiao Guangrong */ 415eb839917SXiao Guangrong *pdata = 0x500 | KVM_NR_VAR_MTRR; 416eb839917SXiao Guangrong return 0; 417eb839917SXiao Guangrong } 418eb839917SXiao Guangrong 419ff53604bSXiao Guangrong if (!msr_mtrr_valid(msr)) 420ff53604bSXiao Guangrong return 1; 421ff53604bSXiao Guangrong 422de9aef5eSXiao Guangrong index = fixed_msr_to_range_index(msr); 423de9aef5eSXiao Guangrong if (index >= 0) 424de9aef5eSXiao Guangrong *pdata = *(u64 *)&vcpu->arch.mtrr_state.fixed_ranges[index]; 425de9aef5eSXiao Guangrong else if (msr == MSR_MTRRdefType) 42610fac2dcSXiao Guangrong *pdata = vcpu->arch.mtrr_state.deftype; 427ff53604bSXiao Guangrong else if (msr == MSR_IA32_CR_PAT) 428ff53604bSXiao Guangrong *pdata = vcpu->arch.pat; 429ff53604bSXiao Guangrong else { /* Variable MTRRs */ 430ebda79e5SSean Christopherson if (is_mtrr_base_msr(msr)) 431*9ae38b4fSSean Christopherson *pdata = var_mtrr_msr_to_range(vcpu, msr)->base; 432ff53604bSXiao Guangrong else 433*9ae38b4fSSean Christopherson *pdata = var_mtrr_msr_to_range(vcpu, msr)->mask; 434fa7c4ebdSPaolo Bonzini 435a8ac864aSSean Christopherson *pdata &= ~kvm_vcpu_reserved_gpa_bits_raw(vcpu); 436ff53604bSXiao Guangrong } 437ff53604bSXiao Guangrong 438ff53604bSXiao Guangrong return 0; 439ff53604bSXiao Guangrong } 440ff53604bSXiao Guangrong 44119efffa2SXiao Guangrong void kvm_vcpu_mtrr_init(struct kvm_vcpu *vcpu) 44219efffa2SXiao Guangrong { 44319efffa2SXiao Guangrong INIT_LIST_HEAD(&vcpu->arch.mtrr_state.head); 44419efffa2SXiao Guangrong } 44519efffa2SXiao Guangrong 446f571c097SXiao Guangrong struct mtrr_iter { 447f571c097SXiao Guangrong /* input fields. */ 448f571c097SXiao Guangrong struct kvm_mtrr *mtrr_state; 449f571c097SXiao Guangrong u64 start; 450f571c097SXiao Guangrong u64 end; 451f571c097SXiao Guangrong 452f571c097SXiao Guangrong /* output fields. */ 453f571c097SXiao Guangrong int mem_type; 45410dc331fSXiao Guangrong /* mtrr is completely disabled? */ 45510dc331fSXiao Guangrong bool mtrr_disabled; 456f571c097SXiao Guangrong /* [start, end) is not fully covered in MTRRs? */ 457f571c097SXiao Guangrong bool partial_map; 458f571c097SXiao Guangrong 459f571c097SXiao Guangrong /* private fields. */ 460f571c097SXiao Guangrong union { 461f571c097SXiao Guangrong /* used for fixed MTRRs. */ 462f571c097SXiao Guangrong struct { 463f571c097SXiao Guangrong int index; 464f571c097SXiao Guangrong int seg; 465f571c097SXiao Guangrong }; 466f571c097SXiao Guangrong 467f571c097SXiao Guangrong /* used for var MTRRs. */ 468f571c097SXiao Guangrong struct { 469f571c097SXiao Guangrong struct kvm_mtrr_range *range; 470f571c097SXiao Guangrong /* max address has been covered in var MTRRs. */ 471f571c097SXiao Guangrong u64 start_max; 472f571c097SXiao Guangrong }; 473f571c097SXiao Guangrong }; 474f571c097SXiao Guangrong 475f571c097SXiao Guangrong bool fixed; 476f571c097SXiao Guangrong }; 477f571c097SXiao Guangrong 478f571c097SXiao Guangrong static bool mtrr_lookup_fixed_start(struct mtrr_iter *iter) 479f571c097SXiao Guangrong { 480f571c097SXiao Guangrong int seg, index; 481f571c097SXiao Guangrong 482f571c097SXiao Guangrong if (!fixed_mtrr_is_enabled(iter->mtrr_state)) 483f571c097SXiao Guangrong return false; 484f571c097SXiao Guangrong 485f571c097SXiao Guangrong seg = fixed_mtrr_addr_to_seg(iter->start); 486f571c097SXiao Guangrong if (seg < 0) 487f571c097SXiao Guangrong return false; 488f571c097SXiao Guangrong 489f571c097SXiao Guangrong iter->fixed = true; 490f571c097SXiao Guangrong index = fixed_mtrr_addr_seg_to_range_index(iter->start, seg); 491f571c097SXiao Guangrong iter->index = index; 492f571c097SXiao Guangrong iter->seg = seg; 493f571c097SXiao Guangrong return true; 494f571c097SXiao Guangrong } 495f571c097SXiao Guangrong 496f571c097SXiao Guangrong static bool match_var_range(struct mtrr_iter *iter, 497f571c097SXiao Guangrong struct kvm_mtrr_range *range) 498f571c097SXiao Guangrong { 499f571c097SXiao Guangrong u64 start, end; 500f571c097SXiao Guangrong 501f571c097SXiao Guangrong var_mtrr_range(range, &start, &end); 502f571c097SXiao Guangrong if (!(start >= iter->end || end <= iter->start)) { 503f571c097SXiao Guangrong iter->range = range; 504f571c097SXiao Guangrong 505f571c097SXiao Guangrong /* 506f571c097SXiao Guangrong * the function is called when we do kvm_mtrr.head walking. 507f571c097SXiao Guangrong * Range has the minimum base address which interleaves 508f571c097SXiao Guangrong * [looker->start_max, looker->end). 509f571c097SXiao Guangrong */ 510f571c097SXiao Guangrong iter->partial_map |= iter->start_max < start; 511f571c097SXiao Guangrong 512f571c097SXiao Guangrong /* update the max address has been covered. */ 513f571c097SXiao Guangrong iter->start_max = max(iter->start_max, end); 514f571c097SXiao Guangrong return true; 515f571c097SXiao Guangrong } 516f571c097SXiao Guangrong 517f571c097SXiao Guangrong return false; 518f571c097SXiao Guangrong } 519f571c097SXiao Guangrong 520f571c097SXiao Guangrong static void __mtrr_lookup_var_next(struct mtrr_iter *iter) 521f571c097SXiao Guangrong { 522f571c097SXiao Guangrong struct kvm_mtrr *mtrr_state = iter->mtrr_state; 523f571c097SXiao Guangrong 524f571c097SXiao Guangrong list_for_each_entry_continue(iter->range, &mtrr_state->head, node) 525f571c097SXiao Guangrong if (match_var_range(iter, iter->range)) 526f571c097SXiao Guangrong return; 527f571c097SXiao Guangrong 528f571c097SXiao Guangrong iter->range = NULL; 529f571c097SXiao Guangrong iter->partial_map |= iter->start_max < iter->end; 530f571c097SXiao Guangrong } 531f571c097SXiao Guangrong 532f571c097SXiao Guangrong static void mtrr_lookup_var_start(struct mtrr_iter *iter) 533f571c097SXiao Guangrong { 534f571c097SXiao Guangrong struct kvm_mtrr *mtrr_state = iter->mtrr_state; 535f571c097SXiao Guangrong 536f571c097SXiao Guangrong iter->fixed = false; 537f571c097SXiao Guangrong iter->start_max = iter->start; 53830b072ceSAlexis Dambricourt iter->range = NULL; 539f571c097SXiao Guangrong iter->range = list_prepare_entry(iter->range, &mtrr_state->head, node); 540f571c097SXiao Guangrong 541f571c097SXiao Guangrong __mtrr_lookup_var_next(iter); 542f571c097SXiao Guangrong } 543f571c097SXiao Guangrong 544f571c097SXiao Guangrong static void mtrr_lookup_fixed_next(struct mtrr_iter *iter) 545f571c097SXiao Guangrong { 546f571c097SXiao Guangrong /* terminate the lookup. */ 547f571c097SXiao Guangrong if (fixed_mtrr_range_end_addr(iter->seg, iter->index) >= iter->end) { 548f571c097SXiao Guangrong iter->fixed = false; 549f571c097SXiao Guangrong iter->range = NULL; 550f571c097SXiao Guangrong return; 551f571c097SXiao Guangrong } 552f571c097SXiao Guangrong 553f571c097SXiao Guangrong iter->index++; 554f571c097SXiao Guangrong 555f571c097SXiao Guangrong /* have looked up for all fixed MTRRs. */ 556f571c097SXiao Guangrong if (iter->index >= ARRAY_SIZE(iter->mtrr_state->fixed_ranges)) 557f571c097SXiao Guangrong return mtrr_lookup_var_start(iter); 558f571c097SXiao Guangrong 559f571c097SXiao Guangrong /* switch to next segment. */ 560f571c097SXiao Guangrong if (iter->index > fixed_mtrr_seg_end_range_index(iter->seg)) 561f571c097SXiao Guangrong iter->seg++; 562f571c097SXiao Guangrong } 563f571c097SXiao Guangrong 564f571c097SXiao Guangrong static void mtrr_lookup_var_next(struct mtrr_iter *iter) 565f571c097SXiao Guangrong { 566f571c097SXiao Guangrong __mtrr_lookup_var_next(iter); 567f571c097SXiao Guangrong } 568f571c097SXiao Guangrong 569f571c097SXiao Guangrong static void mtrr_lookup_start(struct mtrr_iter *iter) 570f571c097SXiao Guangrong { 571f571c097SXiao Guangrong if (!mtrr_is_enabled(iter->mtrr_state)) { 57210dc331fSXiao Guangrong iter->mtrr_disabled = true; 573f571c097SXiao Guangrong return; 574f571c097SXiao Guangrong } 575f571c097SXiao Guangrong 576f571c097SXiao Guangrong if (!mtrr_lookup_fixed_start(iter)) 577f571c097SXiao Guangrong mtrr_lookup_var_start(iter); 578f571c097SXiao Guangrong } 579f571c097SXiao Guangrong 580f571c097SXiao Guangrong static void mtrr_lookup_init(struct mtrr_iter *iter, 581f571c097SXiao Guangrong struct kvm_mtrr *mtrr_state, u64 start, u64 end) 582f571c097SXiao Guangrong { 583f571c097SXiao Guangrong iter->mtrr_state = mtrr_state; 584f571c097SXiao Guangrong iter->start = start; 585f571c097SXiao Guangrong iter->end = end; 58610dc331fSXiao Guangrong iter->mtrr_disabled = false; 587f571c097SXiao Guangrong iter->partial_map = false; 588f571c097SXiao Guangrong iter->fixed = false; 589f571c097SXiao Guangrong iter->range = NULL; 590f571c097SXiao Guangrong 591f571c097SXiao Guangrong mtrr_lookup_start(iter); 592f571c097SXiao Guangrong } 593f571c097SXiao Guangrong 594f571c097SXiao Guangrong static bool mtrr_lookup_okay(struct mtrr_iter *iter) 595f571c097SXiao Guangrong { 596f571c097SXiao Guangrong if (iter->fixed) { 597f571c097SXiao Guangrong iter->mem_type = iter->mtrr_state->fixed_ranges[iter->index]; 598f571c097SXiao Guangrong return true; 599f571c097SXiao Guangrong } 600f571c097SXiao Guangrong 601f571c097SXiao Guangrong if (iter->range) { 602f571c097SXiao Guangrong iter->mem_type = iter->range->base & 0xff; 603f571c097SXiao Guangrong return true; 604f571c097SXiao Guangrong } 605f571c097SXiao Guangrong 606f571c097SXiao Guangrong return false; 607f571c097SXiao Guangrong } 608f571c097SXiao Guangrong 609f571c097SXiao Guangrong static void mtrr_lookup_next(struct mtrr_iter *iter) 610f571c097SXiao Guangrong { 611f571c097SXiao Guangrong if (iter->fixed) 612f571c097SXiao Guangrong mtrr_lookup_fixed_next(iter); 613f571c097SXiao Guangrong else 614f571c097SXiao Guangrong mtrr_lookup_var_next(iter); 615f571c097SXiao Guangrong } 616f571c097SXiao Guangrong 617f571c097SXiao Guangrong #define mtrr_for_each_mem_type(_iter_, _mtrr_, _gpa_start_, _gpa_end_) \ 618f571c097SXiao Guangrong for (mtrr_lookup_init(_iter_, _mtrr_, _gpa_start_, _gpa_end_); \ 619f571c097SXiao Guangrong mtrr_lookup_okay(_iter_); mtrr_lookup_next(_iter_)) 620f571c097SXiao Guangrong 6213f3f78b6SXiao Guangrong u8 kvm_mtrr_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn) 622ff53604bSXiao Guangrong { 6233f3f78b6SXiao Guangrong struct kvm_mtrr *mtrr_state = &vcpu->arch.mtrr_state; 624fa612137SXiao Guangrong struct mtrr_iter iter; 625fa612137SXiao Guangrong u64 start, end; 626fa612137SXiao Guangrong int type = -1; 6273f3f78b6SXiao Guangrong const int wt_wb_mask = (1 << MTRR_TYPE_WRBACK) 6283f3f78b6SXiao Guangrong | (1 << MTRR_TYPE_WRTHROUGH); 6293f3f78b6SXiao Guangrong 6303f3f78b6SXiao Guangrong start = gfn_to_gpa(gfn); 631fa612137SXiao Guangrong end = start + PAGE_SIZE; 632ff53604bSXiao Guangrong 633fa612137SXiao Guangrong mtrr_for_each_mem_type(&iter, mtrr_state, start, end) { 634fa612137SXiao Guangrong int curr_type = iter.mem_type; 635ff53604bSXiao Guangrong 6363f3f78b6SXiao Guangrong /* 6373f3f78b6SXiao Guangrong * Please refer to Intel SDM Volume 3: 11.11.4.1 MTRR 6383f3f78b6SXiao Guangrong * Precedences. 6393f3f78b6SXiao Guangrong */ 6403f3f78b6SXiao Guangrong 6413f3f78b6SXiao Guangrong if (type == -1) { 6423f3f78b6SXiao Guangrong type = curr_type; 643ff53604bSXiao Guangrong continue; 644ff53604bSXiao Guangrong } 645ff53604bSXiao Guangrong 6463f3f78b6SXiao Guangrong /* 6473f3f78b6SXiao Guangrong * If two or more variable memory ranges match and the 6483f3f78b6SXiao Guangrong * memory types are identical, then that memory type is 6493f3f78b6SXiao Guangrong * used. 6503f3f78b6SXiao Guangrong */ 6513f3f78b6SXiao Guangrong if (type == curr_type) 6523f3f78b6SXiao Guangrong continue; 6533f3f78b6SXiao Guangrong 6543f3f78b6SXiao Guangrong /* 6553f3f78b6SXiao Guangrong * If two or more variable memory ranges match and one of 6563f3f78b6SXiao Guangrong * the memory types is UC, the UC memory type used. 6573f3f78b6SXiao Guangrong */ 6583f3f78b6SXiao Guangrong if (curr_type == MTRR_TYPE_UNCACHABLE) 659ff53604bSXiao Guangrong return MTRR_TYPE_UNCACHABLE; 660ff53604bSXiao Guangrong 6613f3f78b6SXiao Guangrong /* 6623f3f78b6SXiao Guangrong * If two or more variable memory ranges match and the 6633f3f78b6SXiao Guangrong * memory types are WT and WB, the WT memory type is used. 6643f3f78b6SXiao Guangrong */ 6653f3f78b6SXiao Guangrong if (((1 << type) & wt_wb_mask) && 6663f3f78b6SXiao Guangrong ((1 << curr_type) & wt_wb_mask)) { 6673f3f78b6SXiao Guangrong type = MTRR_TYPE_WRTHROUGH; 6683f3f78b6SXiao Guangrong continue; 669ff53604bSXiao Guangrong } 670ff53604bSXiao Guangrong 6713f3f78b6SXiao Guangrong /* 6723f3f78b6SXiao Guangrong * For overlaps not defined by the above rules, processor 6733f3f78b6SXiao Guangrong * behavior is undefined. 6743f3f78b6SXiao Guangrong */ 6753f3f78b6SXiao Guangrong 6763f3f78b6SXiao Guangrong /* We use WB for this undefined behavior. :( */ 6773f3f78b6SXiao Guangrong return MTRR_TYPE_WRBACK; 678ff53604bSXiao Guangrong } 679ff53604bSXiao Guangrong 68010dc331fSXiao Guangrong if (iter.mtrr_disabled) 681e24dea2aSPaolo Bonzini return mtrr_disabled_type(vcpu); 68210dc331fSXiao Guangrong 683fc1a8126SAlex Williamson /* not contained in any MTRRs. */ 684fc1a8126SAlex Williamson if (type == -1) 685fc1a8126SAlex Williamson return mtrr_default_type(mtrr_state); 686fc1a8126SAlex Williamson 687fa612137SXiao Guangrong /* 688fa612137SXiao Guangrong * We just check one page, partially covered by MTRRs is 689fa612137SXiao Guangrong * impossible. 690fa612137SXiao Guangrong */ 6913e5d2fdcSXiao Guangrong WARN_ON(iter.partial_map); 6923e5d2fdcSXiao Guangrong 6933f3f78b6SXiao Guangrong return type; 694ff53604bSXiao Guangrong } 695ff53604bSXiao Guangrong EXPORT_SYMBOL_GPL(kvm_mtrr_get_guest_memory_type); 6966a39bbc5SXiao Guangrong 6976a39bbc5SXiao Guangrong bool kvm_mtrr_check_gfn_range_consistency(struct kvm_vcpu *vcpu, gfn_t gfn, 6986a39bbc5SXiao Guangrong int page_num) 6996a39bbc5SXiao Guangrong { 7006a39bbc5SXiao Guangrong struct kvm_mtrr *mtrr_state = &vcpu->arch.mtrr_state; 7016a39bbc5SXiao Guangrong struct mtrr_iter iter; 7026a39bbc5SXiao Guangrong u64 start, end; 7036a39bbc5SXiao Guangrong int type = -1; 7046a39bbc5SXiao Guangrong 7056a39bbc5SXiao Guangrong start = gfn_to_gpa(gfn); 7066a39bbc5SXiao Guangrong end = gfn_to_gpa(gfn + page_num); 7076a39bbc5SXiao Guangrong mtrr_for_each_mem_type(&iter, mtrr_state, start, end) { 7086a39bbc5SXiao Guangrong if (type == -1) { 7096a39bbc5SXiao Guangrong type = iter.mem_type; 7106a39bbc5SXiao Guangrong continue; 7116a39bbc5SXiao Guangrong } 7126a39bbc5SXiao Guangrong 7136a39bbc5SXiao Guangrong if (type != iter.mem_type) 7146a39bbc5SXiao Guangrong return false; 7156a39bbc5SXiao Guangrong } 7166a39bbc5SXiao Guangrong 71710dc331fSXiao Guangrong if (iter.mtrr_disabled) 71810dc331fSXiao Guangrong return true; 71910dc331fSXiao Guangrong 7206a39bbc5SXiao Guangrong if (!iter.partial_map) 7216a39bbc5SXiao Guangrong return true; 7226a39bbc5SXiao Guangrong 7236a39bbc5SXiao Guangrong if (type == -1) 7246a39bbc5SXiao Guangrong return true; 7256a39bbc5SXiao Guangrong 7266a39bbc5SXiao Guangrong return type == mtrr_default_type(mtrr_state); 7276a39bbc5SXiao Guangrong } 728