182470196SZhang Xiantao #ifndef __KVM_X86_LAPIC_H 282470196SZhang Xiantao #define __KVM_X86_LAPIC_H 382470196SZhang Xiantao 482470196SZhang Xiantao #include "iodev.h" 582470196SZhang Xiantao 682470196SZhang Xiantao #include <linux/kvm_host.h> 782470196SZhang Xiantao 8*e9d90d47SAvi Kivity struct kvm_timer { 9*e9d90d47SAvi Kivity struct hrtimer timer; 10*e9d90d47SAvi Kivity s64 period; /* unit: ns */ 11*e9d90d47SAvi Kivity u32 timer_mode_mask; 12*e9d90d47SAvi Kivity u64 tscdeadline; 13*e9d90d47SAvi Kivity atomic_t pending; /* accumulated triggered timers */ 14*e9d90d47SAvi Kivity bool reinject; 15*e9d90d47SAvi Kivity struct kvm_timer_ops *t_ops; 16*e9d90d47SAvi Kivity struct kvm *kvm; 17*e9d90d47SAvi Kivity struct kvm_vcpu *vcpu; 18*e9d90d47SAvi Kivity }; 19*e9d90d47SAvi Kivity 20*e9d90d47SAvi Kivity struct kvm_timer_ops { 21*e9d90d47SAvi Kivity bool (*is_periodic)(struct kvm_timer *); 22*e9d90d47SAvi Kivity }; 23*e9d90d47SAvi Kivity 2482470196SZhang Xiantao struct kvm_lapic { 2582470196SZhang Xiantao unsigned long base_address; 2682470196SZhang Xiantao struct kvm_io_device dev; 27d3c7b77dSMarcelo Tosatti struct kvm_timer lapic_timer; 2882470196SZhang Xiantao u32 divide_count; 2982470196SZhang Xiantao struct kvm_vcpu *vcpu; 3033e4c686SGleb Natapov bool irr_pending; 318680b94bSMichael S. Tsirkin /* Number of bits set in ISR. */ 328680b94bSMichael S. Tsirkin s16 isr_count; 338680b94bSMichael S. Tsirkin /* The highest vector set in ISR; if -1 - invalid, must scan ISR. */ 348680b94bSMichael S. Tsirkin int highest_isr_cache; 355eadf916SMichael S. Tsirkin /** 365eadf916SMichael S. Tsirkin * APIC register page. The layout matches the register layout seen by 375eadf916SMichael S. Tsirkin * the guest 1:1, because it is accessed by the vmx microcode. 385eadf916SMichael S. Tsirkin * Note: Only one register, the TPR, is used by the microcode. 395eadf916SMichael S. Tsirkin */ 4082470196SZhang Xiantao void *regs; 41b93463aaSAvi Kivity gpa_t vapic_addr; 42b93463aaSAvi Kivity struct page *vapic_page; 4382470196SZhang Xiantao }; 4482470196SZhang Xiantao int kvm_create_lapic(struct kvm_vcpu *vcpu); 4582470196SZhang Xiantao void kvm_free_lapic(struct kvm_vcpu *vcpu); 4682470196SZhang Xiantao 4782470196SZhang Xiantao int kvm_apic_has_interrupt(struct kvm_vcpu *vcpu); 4882470196SZhang Xiantao int kvm_apic_accept_pic_intr(struct kvm_vcpu *vcpu); 4982470196SZhang Xiantao int kvm_get_apic_interrupt(struct kvm_vcpu *vcpu); 5082470196SZhang Xiantao void kvm_lapic_reset(struct kvm_vcpu *vcpu); 5182470196SZhang Xiantao u64 kvm_lapic_get_cr8(struct kvm_vcpu *vcpu); 5282470196SZhang Xiantao void kvm_lapic_set_tpr(struct kvm_vcpu *vcpu, unsigned long cr8); 5358fbbf26SKevin Tian void kvm_lapic_set_eoi(struct kvm_vcpu *vcpu); 5482470196SZhang Xiantao void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value); 558b2cf73cSHarvey Harrison u64 kvm_lapic_get_base(struct kvm_vcpu *vcpu); 56fc61b800SGleb Natapov void kvm_apic_set_version(struct kvm_vcpu *vcpu); 5782470196SZhang Xiantao 5882470196SZhang Xiantao int kvm_apic_match_physical_addr(struct kvm_lapic *apic, u16 dest); 5982470196SZhang Xiantao int kvm_apic_match_logical_addr(struct kvm_lapic *apic, u8 mda); 6058c2dde1SGleb Natapov int kvm_apic_set_irq(struct kvm_vcpu *vcpu, struct kvm_lapic_irq *irq); 6189342082SAvi Kivity int kvm_apic_local_deliver(struct kvm_lapic *apic, int lvt_type); 6282470196SZhang Xiantao 6382470196SZhang Xiantao u64 kvm_get_apic_base(struct kvm_vcpu *vcpu); 6482470196SZhang Xiantao void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data); 6582470196SZhang Xiantao void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu); 6682470196SZhang Xiantao int kvm_lapic_enabled(struct kvm_vcpu *vcpu); 67343f94feSGleb Natapov bool kvm_apic_present(struct kvm_vcpu *vcpu); 6882470196SZhang Xiantao int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu); 6982470196SZhang Xiantao 70a3e06bbeSLiu, Jinsong u64 kvm_get_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu); 71a3e06bbeSLiu, Jinsong void kvm_set_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu, u64 data); 72a3e06bbeSLiu, Jinsong 73b93463aaSAvi Kivity void kvm_lapic_set_vapic_addr(struct kvm_vcpu *vcpu, gpa_t vapic_addr); 74b93463aaSAvi Kivity void kvm_lapic_sync_from_vapic(struct kvm_vcpu *vcpu); 75b93463aaSAvi Kivity void kvm_lapic_sync_to_vapic(struct kvm_vcpu *vcpu); 76b93463aaSAvi Kivity 770105d1a5SGleb Natapov int kvm_x2apic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data); 780105d1a5SGleb Natapov int kvm_x2apic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data); 7910388a07SGleb Natapov 8010388a07SGleb Natapov int kvm_hv_vapic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data); 8110388a07SGleb Natapov int kvm_hv_vapic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data); 8210388a07SGleb Natapov 8310388a07SGleb Natapov static inline bool kvm_hv_vapic_assist_page_enabled(struct kvm_vcpu *vcpu) 8410388a07SGleb Natapov { 8510388a07SGleb Natapov return vcpu->arch.hv_vapic & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE; 8610388a07SGleb Natapov } 87ae7a2a3fSMichael S. Tsirkin 88ae7a2a3fSMichael S. Tsirkin int kvm_lapic_enable_pv_eoi(struct kvm_vcpu *vcpu, u64 data); 8982470196SZhang Xiantao #endif 90