xref: /openbmc/linux/arch/x86/kernel/umip.c (revision c6a960bbf6a36572a06bde866d94a7338c7f256a)
11e5db223SRicardo Neri /*
21e5db223SRicardo Neri  * umip.c Emulation for instruction protected by the Intel User-Mode
31e5db223SRicardo Neri  * Instruction Prevention feature
41e5db223SRicardo Neri  *
51e5db223SRicardo Neri  * Copyright (c) 2017, Intel Corporation.
61e5db223SRicardo Neri  * Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
71e5db223SRicardo Neri  */
81e5db223SRicardo Neri 
91e5db223SRicardo Neri #include <linux/uaccess.h>
101e5db223SRicardo Neri #include <asm/umip.h>
111e5db223SRicardo Neri #include <asm/traps.h>
121e5db223SRicardo Neri #include <asm/insn.h>
131e5db223SRicardo Neri #include <asm/insn-eval.h>
14*c6a960bbSRicardo Neri #include <linux/ratelimit.h>
15*c6a960bbSRicardo Neri 
16*c6a960bbSRicardo Neri #undef pr_fmt
17*c6a960bbSRicardo Neri #define pr_fmt(fmt) "umip: " fmt
181e5db223SRicardo Neri 
191e5db223SRicardo Neri /** DOC: Emulation for User-Mode Instruction Prevention (UMIP)
201e5db223SRicardo Neri  *
211e5db223SRicardo Neri  * The feature User-Mode Instruction Prevention present in recent Intel
221e5db223SRicardo Neri  * processor prevents a group of instructions (sgdt, sidt, sldt, smsw, and str)
231e5db223SRicardo Neri  * from being executed with CPL > 0. Otherwise, a general protection fault is
241e5db223SRicardo Neri  * issued.
251e5db223SRicardo Neri  *
261e5db223SRicardo Neri  * Rather than relaying to the user space the general protection fault caused by
271e5db223SRicardo Neri  * the UMIP-protected instructions (in the form of a SIGSEGV signal), it can be
281e5db223SRicardo Neri  * trapped and emulate the result of such instructions to provide dummy values.
291e5db223SRicardo Neri  * This allows to both conserve the current kernel behavior and not reveal the
301e5db223SRicardo Neri  * system resources that UMIP intends to protect (i.e., the locations of the
311e5db223SRicardo Neri  * global descriptor and interrupt descriptor tables, the segment selectors of
321e5db223SRicardo Neri  * the local descriptor table, the value of the task state register and the
331e5db223SRicardo Neri  * contents of the CR0 register).
341e5db223SRicardo Neri  *
351e5db223SRicardo Neri  * This emulation is needed because certain applications (e.g., WineHQ and
361e5db223SRicardo Neri  * DOSEMU2) rely on this subset of instructions to function.
371e5db223SRicardo Neri  *
381e5db223SRicardo Neri  * The instructions protected by UMIP can be split in two groups. Those which
391e5db223SRicardo Neri  * return a kernel memory address (sgdt and sidt) and those which return a
401e5db223SRicardo Neri  * value (sldt, str and smsw).
411e5db223SRicardo Neri  *
421e5db223SRicardo Neri  * For the instructions that return a kernel memory address, applications
431e5db223SRicardo Neri  * such as WineHQ rely on the result being located in the kernel memory space,
441e5db223SRicardo Neri  * not the actual location of the table. The result is emulated as a hard-coded
451e5db223SRicardo Neri  * value that, lies close to the top of the kernel memory. The limit for the GDT
461e5db223SRicardo Neri  * and the IDT are set to zero.
471e5db223SRicardo Neri  *
481e5db223SRicardo Neri  * Given that sldt and str are not commonly used in programs that run on WineHQ
491e5db223SRicardo Neri  * or DOSEMU2, they are not emulated.
501e5db223SRicardo Neri  *
511e5db223SRicardo Neri  * The instruction smsw is emulated to return the value that the register CR0
521e5db223SRicardo Neri  * has at boot time as set in the head_32.
531e5db223SRicardo Neri  *
541e5db223SRicardo Neri  * Also, emulation is provided only for 32-bit processes; 64-bit processes
551e5db223SRicardo Neri  * that attempt to use the instructions that UMIP protects will receive the
561e5db223SRicardo Neri  * SIGSEGV signal issued as a consequence of the general protection fault.
571e5db223SRicardo Neri  *
581e5db223SRicardo Neri  * Care is taken to appropriately emulate the results when segmentation is
591e5db223SRicardo Neri  * used. That is, rather than relying on USER_DS and USER_CS, the function
601e5db223SRicardo Neri  * insn_get_addr_ref() inspects the segment descriptor pointed by the
611e5db223SRicardo Neri  * registers in pt_regs. This ensures that we correctly obtain the segment
621e5db223SRicardo Neri  * base address and the address and operand sizes even if the user space
631e5db223SRicardo Neri  * application uses a local descriptor table.
641e5db223SRicardo Neri  */
651e5db223SRicardo Neri 
661e5db223SRicardo Neri #define UMIP_DUMMY_GDT_BASE 0xfffe0000
671e5db223SRicardo Neri #define UMIP_DUMMY_IDT_BASE 0xffff0000
681e5db223SRicardo Neri 
691e5db223SRicardo Neri /*
701e5db223SRicardo Neri  * The SGDT and SIDT instructions store the contents of the global descriptor
711e5db223SRicardo Neri  * table and interrupt table registers, respectively. The destination is a
721e5db223SRicardo Neri  * memory operand of X+2 bytes. X bytes are used to store the base address of
731e5db223SRicardo Neri  * the table and 2 bytes are used to store the limit. In 32-bit processes, the
741e5db223SRicardo Neri  * only processes for which emulation is provided, X has a value of 4.
751e5db223SRicardo Neri  */
761e5db223SRicardo Neri #define UMIP_GDT_IDT_BASE_SIZE 4
771e5db223SRicardo Neri #define UMIP_GDT_IDT_LIMIT_SIZE 2
781e5db223SRicardo Neri 
791e5db223SRicardo Neri #define	UMIP_INST_SGDT	0	/* 0F 01 /0 */
801e5db223SRicardo Neri #define	UMIP_INST_SIDT	1	/* 0F 01 /1 */
811e5db223SRicardo Neri #define	UMIP_INST_SMSW	3	/* 0F 01 /4 */
821e5db223SRicardo Neri 
831e5db223SRicardo Neri /**
841e5db223SRicardo Neri  * identify_insn() - Identify a UMIP-protected instruction
851e5db223SRicardo Neri  * @insn:	Instruction structure with opcode and ModRM byte.
861e5db223SRicardo Neri  *
871e5db223SRicardo Neri  * From the opcode and ModRM.reg in @insn identify, if any, a UMIP-protected
881e5db223SRicardo Neri  * instruction that can be emulated.
891e5db223SRicardo Neri  *
901e5db223SRicardo Neri  * Returns:
911e5db223SRicardo Neri  *
921e5db223SRicardo Neri  * On success, a constant identifying a specific UMIP-protected instruction that
931e5db223SRicardo Neri  * can be emulated.
941e5db223SRicardo Neri  *
951e5db223SRicardo Neri  * -EINVAL on error or when not an UMIP-protected instruction that can be
961e5db223SRicardo Neri  * emulated.
971e5db223SRicardo Neri  */
981e5db223SRicardo Neri static int identify_insn(struct insn *insn)
991e5db223SRicardo Neri {
1001e5db223SRicardo Neri 	/* By getting modrm we also get the opcode. */
1011e5db223SRicardo Neri 	insn_get_modrm(insn);
1021e5db223SRicardo Neri 
1031e5db223SRicardo Neri 	if (!insn->modrm.nbytes)
1041e5db223SRicardo Neri 		return -EINVAL;
1051e5db223SRicardo Neri 
1061e5db223SRicardo Neri 	/* All the instructions of interest start with 0x0f. */
1071e5db223SRicardo Neri 	if (insn->opcode.bytes[0] != 0xf)
1081e5db223SRicardo Neri 		return -EINVAL;
1091e5db223SRicardo Neri 
1101e5db223SRicardo Neri 	if (insn->opcode.bytes[1] == 0x1) {
1111e5db223SRicardo Neri 		switch (X86_MODRM_REG(insn->modrm.value)) {
1121e5db223SRicardo Neri 		case 0:
1131e5db223SRicardo Neri 			return UMIP_INST_SGDT;
1141e5db223SRicardo Neri 		case 1:
1151e5db223SRicardo Neri 			return UMIP_INST_SIDT;
1161e5db223SRicardo Neri 		case 4:
1171e5db223SRicardo Neri 			return UMIP_INST_SMSW;
1181e5db223SRicardo Neri 		default:
1191e5db223SRicardo Neri 			return -EINVAL;
1201e5db223SRicardo Neri 		}
1211e5db223SRicardo Neri 	}
1221e5db223SRicardo Neri 
1231e5db223SRicardo Neri 	/* SLDT AND STR are not emulated */
1241e5db223SRicardo Neri 	return -EINVAL;
1251e5db223SRicardo Neri }
1261e5db223SRicardo Neri 
1271e5db223SRicardo Neri /**
1281e5db223SRicardo Neri  * emulate_umip_insn() - Emulate UMIP instructions and return dummy values
1291e5db223SRicardo Neri  * @insn:	Instruction structure with operands
1301e5db223SRicardo Neri  * @umip_inst:	A constant indicating the instruction to emulate
1311e5db223SRicardo Neri  * @data:	Buffer into which the dummy result is stored
1321e5db223SRicardo Neri  * @data_size:	Size of the emulated result
1331e5db223SRicardo Neri  *
1341e5db223SRicardo Neri  * Emulate an instruction protected by UMIP and provide a dummy result. The
1351e5db223SRicardo Neri  * result of the emulation is saved in @data. The size of the results depends
1361e5db223SRicardo Neri  * on both the instruction and type of operand (register vs memory address).
1371e5db223SRicardo Neri  * The size of the result is updated in @data_size. Caller is responsible
1381e5db223SRicardo Neri  * of providing a @data buffer of at least UMIP_GDT_IDT_BASE_SIZE +
1391e5db223SRicardo Neri  * UMIP_GDT_IDT_LIMIT_SIZE bytes.
1401e5db223SRicardo Neri  *
1411e5db223SRicardo Neri  * Returns:
1421e5db223SRicardo Neri  *
1431e5db223SRicardo Neri  * 0 on success, -EINVAL on error while emulating.
1441e5db223SRicardo Neri  */
1451e5db223SRicardo Neri static int emulate_umip_insn(struct insn *insn, int umip_inst,
1461e5db223SRicardo Neri 			     unsigned char *data, int *data_size)
1471e5db223SRicardo Neri {
1481e5db223SRicardo Neri 	unsigned long dummy_base_addr, dummy_value;
1491e5db223SRicardo Neri 	unsigned short dummy_limit = 0;
1501e5db223SRicardo Neri 
1511e5db223SRicardo Neri 	if (!data || !data_size || !insn)
1521e5db223SRicardo Neri 		return -EINVAL;
1531e5db223SRicardo Neri 	/*
1541e5db223SRicardo Neri 	 * These two instructions return the base address and limit of the
1551e5db223SRicardo Neri 	 * global and interrupt descriptor table, respectively. According to the
1561e5db223SRicardo Neri 	 * Intel Software Development manual, the base address can be 24-bit,
1571e5db223SRicardo Neri 	 * 32-bit or 64-bit. Limit is always 16-bit. If the operand size is
1581e5db223SRicardo Neri 	 * 16-bit, the returned value of the base address is supposed to be a
1591e5db223SRicardo Neri 	 * zero-extended 24-byte number. However, it seems that a 32-byte number
1601e5db223SRicardo Neri 	 * is always returned irrespective of the operand size.
1611e5db223SRicardo Neri 	 */
1621e5db223SRicardo Neri 	if (umip_inst == UMIP_INST_SGDT || umip_inst == UMIP_INST_SIDT) {
1631e5db223SRicardo Neri 		/* SGDT and SIDT do not use registers operands. */
1641e5db223SRicardo Neri 		if (X86_MODRM_MOD(insn->modrm.value) == 3)
1651e5db223SRicardo Neri 			return -EINVAL;
1661e5db223SRicardo Neri 
1671e5db223SRicardo Neri 		if (umip_inst == UMIP_INST_SGDT)
1681e5db223SRicardo Neri 			dummy_base_addr = UMIP_DUMMY_GDT_BASE;
1691e5db223SRicardo Neri 		else
1701e5db223SRicardo Neri 			dummy_base_addr = UMIP_DUMMY_IDT_BASE;
1711e5db223SRicardo Neri 
1721e5db223SRicardo Neri 		*data_size = UMIP_GDT_IDT_LIMIT_SIZE + UMIP_GDT_IDT_BASE_SIZE;
1731e5db223SRicardo Neri 
1741e5db223SRicardo Neri 		memcpy(data + 2, &dummy_base_addr, UMIP_GDT_IDT_BASE_SIZE);
1751e5db223SRicardo Neri 		memcpy(data, &dummy_limit, UMIP_GDT_IDT_LIMIT_SIZE);
1761e5db223SRicardo Neri 
1771e5db223SRicardo Neri 	} else if (umip_inst == UMIP_INST_SMSW) {
1781e5db223SRicardo Neri 		dummy_value = CR0_STATE;
1791e5db223SRicardo Neri 
1801e5db223SRicardo Neri 		/*
1811e5db223SRicardo Neri 		 * Even though the CR0 register has 4 bytes, the number
1821e5db223SRicardo Neri 		 * of bytes to be copied in the result buffer is determined
1831e5db223SRicardo Neri 		 * by whether the operand is a register or a memory location.
1841e5db223SRicardo Neri 		 * If operand is a register, return as many bytes as the operand
1851e5db223SRicardo Neri 		 * size. If operand is memory, return only the two least
1861e5db223SRicardo Neri 		 * siginificant bytes of CR0.
1871e5db223SRicardo Neri 		 */
1881e5db223SRicardo Neri 		if (X86_MODRM_MOD(insn->modrm.value) == 3)
1891e5db223SRicardo Neri 			*data_size = insn->opnd_bytes;
1901e5db223SRicardo Neri 		else
1911e5db223SRicardo Neri 			*data_size = 2;
1921e5db223SRicardo Neri 
1931e5db223SRicardo Neri 		memcpy(data, &dummy_value, *data_size);
1941e5db223SRicardo Neri 	/* STR and SLDT  are not emulated */
1951e5db223SRicardo Neri 	} else {
1961e5db223SRicardo Neri 		return -EINVAL;
1971e5db223SRicardo Neri 	}
1981e5db223SRicardo Neri 
1991e5db223SRicardo Neri 	return 0;
2001e5db223SRicardo Neri }
2011e5db223SRicardo Neri 
2021e5db223SRicardo Neri /**
203*c6a960bbSRicardo Neri  * force_sig_info_umip_fault() - Force a SIGSEGV with SEGV_MAPERR
204*c6a960bbSRicardo Neri  * @addr:	Address that caused the signal
205*c6a960bbSRicardo Neri  * @regs:	Register set containing the instruction pointer
206*c6a960bbSRicardo Neri  *
207*c6a960bbSRicardo Neri  * Force a SIGSEGV signal with SEGV_MAPERR as the error code. This function is
208*c6a960bbSRicardo Neri  * intended to be used to provide a segmentation fault when the result of the
209*c6a960bbSRicardo Neri  * UMIP emulation could not be copied to the user space memory.
210*c6a960bbSRicardo Neri  *
211*c6a960bbSRicardo Neri  * Returns: none
212*c6a960bbSRicardo Neri  */
213*c6a960bbSRicardo Neri static void force_sig_info_umip_fault(void __user *addr, struct pt_regs *regs)
214*c6a960bbSRicardo Neri {
215*c6a960bbSRicardo Neri 	siginfo_t info;
216*c6a960bbSRicardo Neri 	struct task_struct *tsk = current;
217*c6a960bbSRicardo Neri 
218*c6a960bbSRicardo Neri 	tsk->thread.cr2		= (unsigned long)addr;
219*c6a960bbSRicardo Neri 	tsk->thread.error_code	= X86_PF_USER | X86_PF_WRITE;
220*c6a960bbSRicardo Neri 	tsk->thread.trap_nr	= X86_TRAP_PF;
221*c6a960bbSRicardo Neri 
222*c6a960bbSRicardo Neri 	info.si_signo	= SIGSEGV;
223*c6a960bbSRicardo Neri 	info.si_errno	= 0;
224*c6a960bbSRicardo Neri 	info.si_code	= SEGV_MAPERR;
225*c6a960bbSRicardo Neri 	info.si_addr	= addr;
226*c6a960bbSRicardo Neri 	force_sig_info(SIGSEGV, &info, tsk);
227*c6a960bbSRicardo Neri 
228*c6a960bbSRicardo Neri 	if (!(show_unhandled_signals && unhandled_signal(tsk, SIGSEGV)))
229*c6a960bbSRicardo Neri 		return;
230*c6a960bbSRicardo Neri 
231*c6a960bbSRicardo Neri 	pr_err_ratelimited("%s[%d] umip emulation segfault ip:%lx sp:%lx error:%x in %lx\n",
232*c6a960bbSRicardo Neri 			   tsk->comm, task_pid_nr(tsk), regs->ip,
233*c6a960bbSRicardo Neri 			   regs->sp, X86_PF_USER | X86_PF_WRITE,
234*c6a960bbSRicardo Neri 			   regs->ip);
235*c6a960bbSRicardo Neri }
236*c6a960bbSRicardo Neri 
237*c6a960bbSRicardo Neri /**
2381e5db223SRicardo Neri  * fixup_umip_exception() - Fixup a general protection fault caused by UMIP
2391e5db223SRicardo Neri  * @regs:	Registers as saved when entering the #GP handler
2401e5db223SRicardo Neri  *
2411e5db223SRicardo Neri  * The instructions sgdt, sidt, str, smsw, sldt cause a general protection
2421e5db223SRicardo Neri  * fault if executed with CPL > 0 (i.e., from user space). If the offending
2431e5db223SRicardo Neri  * user-space process is not in long mode, this function fixes the exception
2441e5db223SRicardo Neri  * up and provides dummy results for sgdt, sidt and smsw; str and sldt are not
2451e5db223SRicardo Neri  * fixed up. Also long mode user-space processes are not fixed up.
2461e5db223SRicardo Neri  *
2471e5db223SRicardo Neri  * If operands are memory addresses, results are copied to user-space memory as
2481e5db223SRicardo Neri  * indicated by the instruction pointed by eIP using the registers indicated in
2491e5db223SRicardo Neri  * the instruction operands. If operands are registers, results are copied into
2501e5db223SRicardo Neri  * the context that was saved when entering kernel mode.
2511e5db223SRicardo Neri  *
2521e5db223SRicardo Neri  * Returns:
2531e5db223SRicardo Neri  *
2541e5db223SRicardo Neri  * True if emulation was successful; false if not.
2551e5db223SRicardo Neri  */
2561e5db223SRicardo Neri bool fixup_umip_exception(struct pt_regs *regs)
2571e5db223SRicardo Neri {
2581e5db223SRicardo Neri 	int not_copied, nr_copied, reg_offset, dummy_data_size, umip_inst;
2591e5db223SRicardo Neri 	unsigned long seg_base = 0, *reg_addr;
2601e5db223SRicardo Neri 	/* 10 bytes is the maximum size of the result of UMIP instructions */
2611e5db223SRicardo Neri 	unsigned char dummy_data[10] = { 0 };
2621e5db223SRicardo Neri 	unsigned char buf[MAX_INSN_SIZE];
2631e5db223SRicardo Neri 	void __user *uaddr;
2641e5db223SRicardo Neri 	struct insn insn;
2651e5db223SRicardo Neri 	char seg_defs;
2661e5db223SRicardo Neri 
2671e5db223SRicardo Neri 	if (!regs)
2681e5db223SRicardo Neri 		return false;
2691e5db223SRicardo Neri 
2701e5db223SRicardo Neri 	/* Do not emulate 64-bit processes. */
2711e5db223SRicardo Neri 	if (user_64bit_mode(regs))
2721e5db223SRicardo Neri 		return false;
2731e5db223SRicardo Neri 
2741e5db223SRicardo Neri 	/*
2751e5db223SRicardo Neri 	 * If not in user-space long mode, a custom code segment could be in
2761e5db223SRicardo Neri 	 * use. This is true in protected mode (if the process defined a local
2771e5db223SRicardo Neri 	 * descriptor table), or virtual-8086 mode. In most of the cases
2781e5db223SRicardo Neri 	 * seg_base will be zero as in USER_CS.
2791e5db223SRicardo Neri 	 */
2801e5db223SRicardo Neri 	if (!user_64bit_mode(regs))
2811e5db223SRicardo Neri 		seg_base = insn_get_seg_base(regs, INAT_SEG_REG_CS);
2821e5db223SRicardo Neri 
2831e5db223SRicardo Neri 	if (seg_base == -1L)
2841e5db223SRicardo Neri 		return false;
2851e5db223SRicardo Neri 
2861e5db223SRicardo Neri 	not_copied = copy_from_user(buf, (void __user *)(seg_base + regs->ip),
2871e5db223SRicardo Neri 				    sizeof(buf));
2881e5db223SRicardo Neri 	nr_copied = sizeof(buf) - not_copied;
2891e5db223SRicardo Neri 
2901e5db223SRicardo Neri 	/*
2911e5db223SRicardo Neri 	 * The copy_from_user above could have failed if user code is protected
2921e5db223SRicardo Neri 	 * by a memory protection key. Give up on emulation in such a case.
2931e5db223SRicardo Neri 	 * Should we issue a page fault?
2941e5db223SRicardo Neri 	 */
2951e5db223SRicardo Neri 	if (!nr_copied)
2961e5db223SRicardo Neri 		return false;
2971e5db223SRicardo Neri 
2981e5db223SRicardo Neri 	insn_init(&insn, buf, nr_copied, user_64bit_mode(regs));
2991e5db223SRicardo Neri 
3001e5db223SRicardo Neri 	/*
3011e5db223SRicardo Neri 	 * Override the default operand and address sizes with what is specified
3021e5db223SRicardo Neri 	 * in the code segment descriptor. The instruction decoder only sets
3031e5db223SRicardo Neri 	 * the address size it to either 4 or 8 address bytes and does nothing
3041e5db223SRicardo Neri 	 * for the operand bytes. This OK for most of the cases, but we could
3051e5db223SRicardo Neri 	 * have special cases where, for instance, a 16-bit code segment
3061e5db223SRicardo Neri 	 * descriptor is used.
3071e5db223SRicardo Neri 	 * If there is an address override prefix, the instruction decoder
3081e5db223SRicardo Neri 	 * correctly updates these values, even for 16-bit defaults.
3091e5db223SRicardo Neri 	 */
3101e5db223SRicardo Neri 	seg_defs = insn_get_code_seg_params(regs);
3111e5db223SRicardo Neri 	if (seg_defs == -EINVAL)
3121e5db223SRicardo Neri 		return false;
3131e5db223SRicardo Neri 
3141e5db223SRicardo Neri 	insn.addr_bytes = INSN_CODE_SEG_ADDR_SZ(seg_defs);
3151e5db223SRicardo Neri 	insn.opnd_bytes = INSN_CODE_SEG_OPND_SZ(seg_defs);
3161e5db223SRicardo Neri 
3171e5db223SRicardo Neri 	insn_get_length(&insn);
3181e5db223SRicardo Neri 	if (nr_copied < insn.length)
3191e5db223SRicardo Neri 		return false;
3201e5db223SRicardo Neri 
3211e5db223SRicardo Neri 	umip_inst = identify_insn(&insn);
3221e5db223SRicardo Neri 	if (umip_inst < 0)
3231e5db223SRicardo Neri 		return false;
3241e5db223SRicardo Neri 
3251e5db223SRicardo Neri 	if (emulate_umip_insn(&insn, umip_inst, dummy_data, &dummy_data_size))
3261e5db223SRicardo Neri 		return false;
3271e5db223SRicardo Neri 
3281e5db223SRicardo Neri 	/*
3291e5db223SRicardo Neri 	 * If operand is a register, write result to the copy of the register
3301e5db223SRicardo Neri 	 * value that was pushed to the stack when entering into kernel mode.
3311e5db223SRicardo Neri 	 * Upon exit, the value we write will be restored to the actual hardware
3321e5db223SRicardo Neri 	 * register.
3331e5db223SRicardo Neri 	 */
3341e5db223SRicardo Neri 	if (X86_MODRM_MOD(insn.modrm.value) == 3) {
3351e5db223SRicardo Neri 		reg_offset = insn_get_modrm_rm_off(&insn, regs);
3361e5db223SRicardo Neri 
3371e5db223SRicardo Neri 		/*
3381e5db223SRicardo Neri 		 * Negative values are usually errors. In memory addressing,
3391e5db223SRicardo Neri 		 * the exception is -EDOM. Since we expect a register operand,
3401e5db223SRicardo Neri 		 * all negative values are errors.
3411e5db223SRicardo Neri 		 */
3421e5db223SRicardo Neri 		if (reg_offset < 0)
3431e5db223SRicardo Neri 			return false;
3441e5db223SRicardo Neri 
3451e5db223SRicardo Neri 		reg_addr = (unsigned long *)((unsigned long)regs + reg_offset);
3461e5db223SRicardo Neri 		memcpy(reg_addr, dummy_data, dummy_data_size);
3471e5db223SRicardo Neri 	} else {
3481e5db223SRicardo Neri 		uaddr = insn_get_addr_ref(&insn, regs);
3491e5db223SRicardo Neri 		if ((unsigned long)uaddr == -1L)
3501e5db223SRicardo Neri 			return false;
3511e5db223SRicardo Neri 
3521e5db223SRicardo Neri 		nr_copied = copy_to_user(uaddr, dummy_data, dummy_data_size);
353*c6a960bbSRicardo Neri 		if (nr_copied  > 0) {
354*c6a960bbSRicardo Neri 			/*
355*c6a960bbSRicardo Neri 			 * If copy fails, send a signal and tell caller that
356*c6a960bbSRicardo Neri 			 * fault was fixed up.
357*c6a960bbSRicardo Neri 			 */
358*c6a960bbSRicardo Neri 			force_sig_info_umip_fault(uaddr, regs);
359*c6a960bbSRicardo Neri 			return true;
360*c6a960bbSRicardo Neri 		}
3611e5db223SRicardo Neri 	}
3621e5db223SRicardo Neri 
3631e5db223SRicardo Neri 	/* increase IP to let the program keep going */
3641e5db223SRicardo Neri 	regs->ip += insn.length;
3651e5db223SRicardo Neri 	return true;
3661e5db223SRicardo Neri }
367