1f62bae50SIngo Molnar #include <linux/threads.h> 2f62bae50SIngo Molnar #include <linux/cpumask.h> 3f62bae50SIngo Molnar #include <linux/string.h> 4f62bae50SIngo Molnar #include <linux/kernel.h> 5f62bae50SIngo Molnar #include <linux/ctype.h> 6f62bae50SIngo Molnar #include <linux/dmar.h> 7f62bae50SIngo Molnar 8f62bae50SIngo Molnar #include <asm/smp.h> 979deb8e5SCyrill Gorcunov #include <asm/x2apic.h> 10f62bae50SIngo Molnar 11ef1f87aaSSuresh Siddha int x2apic_phys; 12f62bae50SIngo Molnar 131a8880a1SSuresh Siddha static struct apic apic_x2apic_phys; 141a8880a1SSuresh Siddha 15f62bae50SIngo Molnar static int set_x2apic_phys_mode(char *arg) 16f62bae50SIngo Molnar { 17f62bae50SIngo Molnar x2apic_phys = 1; 18f62bae50SIngo Molnar return 0; 19f62bae50SIngo Molnar } 20f62bae50SIngo Molnar early_param("x2apic_phys", set_x2apic_phys_mode); 21f62bae50SIngo Molnar 22cb214edeSStoney Wang static bool x2apic_fadt_phys(void) 23cb214edeSStoney Wang { 24781674fcSJan Kiszka #ifdef CONFIG_ACPI 25cb214edeSStoney Wang if ((acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) && 26cb214edeSStoney Wang (acpi_gbl_FADT.flags & ACPI_FADT_APIC_PHYSICAL)) { 27cb214edeSStoney Wang printk(KERN_DEBUG "System requires x2apic physical mode\n"); 28cb214edeSStoney Wang return true; 29cb214edeSStoney Wang } 30781674fcSJan Kiszka #endif 31cb214edeSStoney Wang return false; 32cb214edeSStoney Wang } 33cb214edeSStoney Wang 34f62bae50SIngo Molnar static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id) 35f62bae50SIngo Molnar { 36cb214edeSStoney Wang return x2apic_enabled() && (x2apic_phys || x2apic_fadt_phys()); 37f62bae50SIngo Molnar } 38f62bae50SIngo Molnar 39*f2bffe8aSThomas Gleixner static void x2apic_send_IPI(int cpu, int vector) 40*f2bffe8aSThomas Gleixner { 41*f2bffe8aSThomas Gleixner u32 dest = per_cpu(x86_cpu_to_apicid, cpu); 42*f2bffe8aSThomas Gleixner 43*f2bffe8aSThomas Gleixner x2apic_wrmsr_fence(); 44*f2bffe8aSThomas Gleixner __x2apic_send_IPI_dest(dest, vector, APIC_DEST_PHYSICAL); 45*f2bffe8aSThomas Gleixner } 46*f2bffe8aSThomas Gleixner 47f62bae50SIngo Molnar static void 48a27d0b5eSSuresh Siddha __x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest) 49f62bae50SIngo Molnar { 50f62bae50SIngo Molnar unsigned long query_cpu; 51a27d0b5eSSuresh Siddha unsigned long this_cpu; 52f62bae50SIngo Molnar unsigned long flags; 53f62bae50SIngo Molnar 54ce4e240cSSuresh Siddha x2apic_wrmsr_fence(); 55ce4e240cSSuresh Siddha 56f62bae50SIngo Molnar local_irq_save(flags); 57a27d0b5eSSuresh Siddha 58a27d0b5eSSuresh Siddha this_cpu = smp_processor_id(); 59f62bae50SIngo Molnar for_each_cpu(query_cpu, mask) { 60a27d0b5eSSuresh Siddha if (apic_dest == APIC_DEST_ALLBUT && this_cpu == query_cpu) 61f62bae50SIngo Molnar continue; 62f62bae50SIngo Molnar __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_apicid, query_cpu), 63f62bae50SIngo Molnar vector, APIC_DEST_PHYSICAL); 64f62bae50SIngo Molnar } 65f62bae50SIngo Molnar local_irq_restore(flags); 66f62bae50SIngo Molnar } 67f62bae50SIngo Molnar 68a27d0b5eSSuresh Siddha static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector) 69a27d0b5eSSuresh Siddha { 70a27d0b5eSSuresh Siddha __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLINC); 71a27d0b5eSSuresh Siddha } 72a27d0b5eSSuresh Siddha 73a27d0b5eSSuresh Siddha static void 74a27d0b5eSSuresh Siddha x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector) 75a27d0b5eSSuresh Siddha { 76a27d0b5eSSuresh Siddha __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT); 77a27d0b5eSSuresh Siddha } 78a27d0b5eSSuresh Siddha 79a27d0b5eSSuresh Siddha static void x2apic_send_IPI_allbutself(int vector) 80a27d0b5eSSuresh Siddha { 81a27d0b5eSSuresh Siddha __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLBUT); 82a27d0b5eSSuresh Siddha } 83a27d0b5eSSuresh Siddha 84f62bae50SIngo Molnar static void x2apic_send_IPI_all(int vector) 85f62bae50SIngo Molnar { 86a27d0b5eSSuresh Siddha __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLINC); 87f62bae50SIngo Molnar } 88f62bae50SIngo Molnar 89f62bae50SIngo Molnar static void init_x2apic_ldr(void) 90f62bae50SIngo Molnar { 91f62bae50SIngo Molnar } 92f62bae50SIngo Molnar 939ebd680bSSuresh Siddha static int x2apic_phys_probe(void) 949ebd680bSSuresh Siddha { 95cb214edeSStoney Wang if (x2apic_mode && (x2apic_phys || x2apic_fadt_phys())) 969ebd680bSSuresh Siddha return 1; 979ebd680bSSuresh Siddha 989ebd680bSSuresh Siddha return apic == &apic_x2apic_phys; 999ebd680bSSuresh Siddha } 1009ebd680bSSuresh Siddha 1011a8880a1SSuresh Siddha static struct apic apic_x2apic_phys = { 102f62bae50SIngo Molnar 103f62bae50SIngo Molnar .name = "physical x2apic", 1049ebd680bSSuresh Siddha .probe = x2apic_phys_probe, 105f62bae50SIngo Molnar .acpi_madt_oem_check = x2apic_acpi_madt_oem_check, 106b7157acfSSteffen Persvold .apic_id_valid = x2apic_apic_id_valid, 107f62bae50SIngo Molnar .apic_id_registered = x2apic_apic_id_registered, 108f62bae50SIngo Molnar 109f62bae50SIngo Molnar .irq_delivery_mode = dest_Fixed, 110f62bae50SIngo Molnar .irq_dest_mode = 0, /* physical */ 111f62bae50SIngo Molnar 112bf721d3aSAlexander Gordeev .target_cpus = online_target_cpus, 113f62bae50SIngo Molnar .disable_esr = 0, 114f62bae50SIngo Molnar .dest_logical = 0, 115f62bae50SIngo Molnar .check_apicid_used = NULL, 116f62bae50SIngo Molnar 1179d8e1066SAlexander Gordeev .vector_allocation_domain = default_vector_allocation_domain, 118f62bae50SIngo Molnar .init_apic_ldr = init_x2apic_ldr, 119f62bae50SIngo Molnar 120f62bae50SIngo Molnar .ioapic_phys_id_map = NULL, 121f62bae50SIngo Molnar .setup_apic_routing = NULL, 122f62bae50SIngo Molnar .cpu_present_to_apicid = default_cpu_present_to_apicid, 123f62bae50SIngo Molnar .apicid_to_cpu_present = NULL, 124f62bae50SIngo Molnar .check_phys_apicid_present = default_check_phys_apicid_present, 125f62bae50SIngo Molnar .phys_pkg_id = x2apic_phys_pkg_id, 126f62bae50SIngo Molnar 12779deb8e5SCyrill Gorcunov .get_apic_id = x2apic_get_apic_id, 12879deb8e5SCyrill Gorcunov .set_apic_id = x2apic_set_apic_id, 129f62bae50SIngo Molnar .apic_id_mask = 0xFFFFFFFFu, 130f62bae50SIngo Molnar 1316398268dSAlexander Gordeev .cpu_mask_to_apicid_and = default_cpu_mask_to_apicid_and, 132f62bae50SIngo Molnar 133*f2bffe8aSThomas Gleixner .send_IPI = x2apic_send_IPI, 134f62bae50SIngo Molnar .send_IPI_mask = x2apic_send_IPI_mask, 135f62bae50SIngo Molnar .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself, 136f62bae50SIngo Molnar .send_IPI_allbutself = x2apic_send_IPI_allbutself, 137f62bae50SIngo Molnar .send_IPI_all = x2apic_send_IPI_all, 138f62bae50SIngo Molnar .send_IPI_self = x2apic_send_IPI_self, 139f62bae50SIngo Molnar 140f62bae50SIngo Molnar .inquire_remote_apic = NULL, 141f62bae50SIngo Molnar 142f62bae50SIngo Molnar .read = native_apic_msr_read, 143f62bae50SIngo Molnar .write = native_apic_msr_write, 1440ab711aeSMichael S. Tsirkin .eoi_write = native_apic_msr_eoi_write, 145f62bae50SIngo Molnar .icr_read = native_x2apic_icr_read, 146f62bae50SIngo Molnar .icr_write = native_x2apic_icr_write, 147f62bae50SIngo Molnar .wait_icr_idle = native_x2apic_wait_icr_idle, 148f62bae50SIngo Molnar .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle, 149f62bae50SIngo Molnar }; 150107e0e0cSSuresh Siddha 151107e0e0cSSuresh Siddha apic_driver(apic_x2apic_phys); 152