1f62bae50SIngo Molnar #include <linux/threads.h> 2f62bae50SIngo Molnar #include <linux/cpumask.h> 3f62bae50SIngo Molnar #include <linux/string.h> 4f62bae50SIngo Molnar #include <linux/kernel.h> 5f62bae50SIngo Molnar #include <linux/ctype.h> 6f62bae50SIngo Molnar #include <linux/init.h> 7f62bae50SIngo Molnar #include <linux/dmar.h> 8f62bae50SIngo Molnar 9f62bae50SIngo Molnar #include <asm/smp.h> 1079deb8e5SCyrill Gorcunov #include <asm/x2apic.h> 11f62bae50SIngo Molnar 12ef1f87aaSSuresh Siddha int x2apic_phys; 13f62bae50SIngo Molnar 141a8880a1SSuresh Siddha static struct apic apic_x2apic_phys; 151a8880a1SSuresh Siddha 16f62bae50SIngo Molnar static int set_x2apic_phys_mode(char *arg) 17f62bae50SIngo Molnar { 18f62bae50SIngo Molnar x2apic_phys = 1; 19f62bae50SIngo Molnar return 0; 20f62bae50SIngo Molnar } 21f62bae50SIngo Molnar early_param("x2apic_phys", set_x2apic_phys_mode); 22f62bae50SIngo Molnar 23f62bae50SIngo Molnar static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id) 24f62bae50SIngo Molnar { 25ef1f87aaSSuresh Siddha if (x2apic_phys) 26ef1f87aaSSuresh Siddha return x2apic_enabled(); 27ea0dcf90SGreg Pearson else if ((acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) && 28ea0dcf90SGreg Pearson (acpi_gbl_FADT.flags & ACPI_FADT_APIC_PHYSICAL) && 29ea0dcf90SGreg Pearson x2apic_enabled()) { 30ea0dcf90SGreg Pearson printk(KERN_DEBUG "System requires x2apic physical mode\n"); 31ea0dcf90SGreg Pearson return 1; 32ea0dcf90SGreg Pearson } 33ef1f87aaSSuresh Siddha else 34f62bae50SIngo Molnar return 0; 35f62bae50SIngo Molnar } 36f62bae50SIngo Molnar 37f62bae50SIngo Molnar static void 38a27d0b5eSSuresh Siddha __x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest) 39f62bae50SIngo Molnar { 40f62bae50SIngo Molnar unsigned long query_cpu; 41a27d0b5eSSuresh Siddha unsigned long this_cpu; 42f62bae50SIngo Molnar unsigned long flags; 43f62bae50SIngo Molnar 44ce4e240cSSuresh Siddha x2apic_wrmsr_fence(); 45ce4e240cSSuresh Siddha 46f62bae50SIngo Molnar local_irq_save(flags); 47a27d0b5eSSuresh Siddha 48a27d0b5eSSuresh Siddha this_cpu = smp_processor_id(); 49f62bae50SIngo Molnar for_each_cpu(query_cpu, mask) { 50a27d0b5eSSuresh Siddha if (apic_dest == APIC_DEST_ALLBUT && this_cpu == query_cpu) 51f62bae50SIngo Molnar continue; 52f62bae50SIngo Molnar __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_apicid, query_cpu), 53f62bae50SIngo Molnar vector, APIC_DEST_PHYSICAL); 54f62bae50SIngo Molnar } 55f62bae50SIngo Molnar local_irq_restore(flags); 56f62bae50SIngo Molnar } 57f62bae50SIngo Molnar 58a27d0b5eSSuresh Siddha static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector) 59a27d0b5eSSuresh Siddha { 60a27d0b5eSSuresh Siddha __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLINC); 61a27d0b5eSSuresh Siddha } 62a27d0b5eSSuresh Siddha 63a27d0b5eSSuresh Siddha static void 64a27d0b5eSSuresh Siddha x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector) 65a27d0b5eSSuresh Siddha { 66a27d0b5eSSuresh Siddha __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT); 67a27d0b5eSSuresh Siddha } 68a27d0b5eSSuresh Siddha 69a27d0b5eSSuresh Siddha static void x2apic_send_IPI_allbutself(int vector) 70a27d0b5eSSuresh Siddha { 71a27d0b5eSSuresh Siddha __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLBUT); 72a27d0b5eSSuresh Siddha } 73a27d0b5eSSuresh Siddha 74f62bae50SIngo Molnar static void x2apic_send_IPI_all(int vector) 75f62bae50SIngo Molnar { 76a27d0b5eSSuresh Siddha __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLINC); 77f62bae50SIngo Molnar } 78f62bae50SIngo Molnar 79f62bae50SIngo Molnar static void init_x2apic_ldr(void) 80f62bae50SIngo Molnar { 81f62bae50SIngo Molnar } 82f62bae50SIngo Molnar 839ebd680bSSuresh Siddha static int x2apic_phys_probe(void) 849ebd680bSSuresh Siddha { 859ebd680bSSuresh Siddha if (x2apic_mode && x2apic_phys) 869ebd680bSSuresh Siddha return 1; 879ebd680bSSuresh Siddha 889ebd680bSSuresh Siddha return apic == &apic_x2apic_phys; 899ebd680bSSuresh Siddha } 909ebd680bSSuresh Siddha 910b8255e6SSuresh Siddha /* 920b8255e6SSuresh Siddha * Each logical cpu is in its own vector allocation domain. 930b8255e6SSuresh Siddha */ 940b8255e6SSuresh Siddha static void x2apic_vector_allocation_domain(int cpu, struct cpumask *retmask) 950b8255e6SSuresh Siddha { 960b8255e6SSuresh Siddha cpumask_clear(retmask); 970b8255e6SSuresh Siddha cpumask_set_cpu(cpu, retmask); 980b8255e6SSuresh Siddha } 990b8255e6SSuresh Siddha 1001a8880a1SSuresh Siddha static struct apic apic_x2apic_phys = { 101f62bae50SIngo Molnar 102f62bae50SIngo Molnar .name = "physical x2apic", 1039ebd680bSSuresh Siddha .probe = x2apic_phys_probe, 104f62bae50SIngo Molnar .acpi_madt_oem_check = x2apic_acpi_madt_oem_check, 105b7157acfSSteffen Persvold .apic_id_valid = x2apic_apic_id_valid, 106f62bae50SIngo Molnar .apic_id_registered = x2apic_apic_id_registered, 107f62bae50SIngo Molnar 108f62bae50SIngo Molnar .irq_delivery_mode = dest_Fixed, 109f62bae50SIngo Molnar .irq_dest_mode = 0, /* physical */ 110f62bae50SIngo Molnar 111bf721d3aSAlexander Gordeev .target_cpus = online_target_cpus, 112f62bae50SIngo Molnar .disable_esr = 0, 113f62bae50SIngo Molnar .dest_logical = 0, 114f62bae50SIngo Molnar .check_apicid_used = NULL, 115f62bae50SIngo Molnar .check_apicid_present = NULL, 116f62bae50SIngo Molnar 117f62bae50SIngo Molnar .vector_allocation_domain = x2apic_vector_allocation_domain, 118f62bae50SIngo Molnar .init_apic_ldr = init_x2apic_ldr, 119f62bae50SIngo Molnar 120f62bae50SIngo Molnar .ioapic_phys_id_map = NULL, 121f62bae50SIngo Molnar .setup_apic_routing = NULL, 122f62bae50SIngo Molnar .multi_timer_check = NULL, 123f62bae50SIngo Molnar .cpu_present_to_apicid = default_cpu_present_to_apicid, 124f62bae50SIngo Molnar .apicid_to_cpu_present = NULL, 125f62bae50SIngo Molnar .setup_portio_remap = NULL, 126f62bae50SIngo Molnar .check_phys_apicid_present = default_check_phys_apicid_present, 127f62bae50SIngo Molnar .enable_apic_mode = NULL, 128f62bae50SIngo Molnar .phys_pkg_id = x2apic_phys_pkg_id, 129f62bae50SIngo Molnar .mps_oem_check = NULL, 130f62bae50SIngo Molnar 13179deb8e5SCyrill Gorcunov .get_apic_id = x2apic_get_apic_id, 13279deb8e5SCyrill Gorcunov .set_apic_id = x2apic_set_apic_id, 133f62bae50SIngo Molnar .apic_id_mask = 0xFFFFFFFFu, 134f62bae50SIngo Molnar 135*6398268dSAlexander Gordeev .cpu_mask_to_apicid = default_cpu_mask_to_apicid, 136*6398268dSAlexander Gordeev .cpu_mask_to_apicid_and = default_cpu_mask_to_apicid_and, 137f62bae50SIngo Molnar 138f62bae50SIngo Molnar .send_IPI_mask = x2apic_send_IPI_mask, 139f62bae50SIngo Molnar .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself, 140f62bae50SIngo Molnar .send_IPI_allbutself = x2apic_send_IPI_allbutself, 141f62bae50SIngo Molnar .send_IPI_all = x2apic_send_IPI_all, 142f62bae50SIngo Molnar .send_IPI_self = x2apic_send_IPI_self, 143f62bae50SIngo Molnar 144f62bae50SIngo Molnar .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW, 145f62bae50SIngo Molnar .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH, 146f62bae50SIngo Molnar .wait_for_init_deassert = NULL, 147f62bae50SIngo Molnar .smp_callin_clear_local_apic = NULL, 148f62bae50SIngo Molnar .inquire_remote_apic = NULL, 149f62bae50SIngo Molnar 150f62bae50SIngo Molnar .read = native_apic_msr_read, 151f62bae50SIngo Molnar .write = native_apic_msr_write, 1520ab711aeSMichael S. Tsirkin .eoi_write = native_apic_msr_eoi_write, 153f62bae50SIngo Molnar .icr_read = native_x2apic_icr_read, 154f62bae50SIngo Molnar .icr_write = native_x2apic_icr_write, 155f62bae50SIngo Molnar .wait_icr_idle = native_x2apic_wait_icr_idle, 156f62bae50SIngo Molnar .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle, 157f62bae50SIngo Molnar }; 158107e0e0cSSuresh Siddha 159107e0e0cSSuresh Siddha apic_driver(apic_x2apic_phys); 160