1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */
21965aae3SH. Peter Anvin #ifndef _ASM_X86_PGTABLE_64_H
31965aae3SH. Peter Anvin #define _ASM_X86_PGTABLE_64_H
4bb898558SAl Viro
5bb898558SAl Viro #include <linux/const.h>
6fb355149SJeremy Fitzhardinge #include <asm/pgtable_64_types.h>
7fb355149SJeremy Fitzhardinge
8bb898558SAl Viro #ifndef __ASSEMBLY__
9bb898558SAl Viro
10bb898558SAl Viro /*
11bb898558SAl Viro * This file contains the functions and defines necessary to modify and use
12bb898558SAl Viro * the x86-64 page table tree.
13bb898558SAl Viro */
14bb898558SAl Viro #include <asm/processor.h>
15bb898558SAl Viro #include <linux/bitops.h>
16bb898558SAl Viro #include <linux/threads.h>
1705ab1d8aSFeng Tang #include <asm/fixmap.h>
18bb898558SAl Viro
19032370b9SKirill A. Shutemov extern p4d_t level4_kernel_pgt[512];
20032370b9SKirill A. Shutemov extern p4d_t level4_ident_pgt[512];
21bb898558SAl Viro extern pud_t level3_kernel_pgt[512];
22bb898558SAl Viro extern pud_t level3_ident_pgt[512];
23bb898558SAl Viro extern pmd_t level2_kernel_pgt[512];
24bb898558SAl Viro extern pmd_t level2_fixmap_pgt[512];
25bb898558SAl Viro extern pmd_t level2_ident_pgt[512];
2605ab1d8aSFeng Tang extern pte_t level1_fixmap_pgt[512 * FIXMAP_PMD_NUM];
2765ade2f8SKirill A. Shutemov extern pgd_t init_top_pgt[];
28bb898558SAl Viro
2965ade2f8SKirill A. Shutemov #define swapper_pg_dir init_top_pgt
30bb898558SAl Viro
31bb898558SAl Viro extern void paging_init(void);
sync_initial_page_table(void)32945fd17aSThomas Gleixner static inline void sync_initial_page_table(void) { }
33bb898558SAl Viro
34bb898558SAl Viro #define pte_ERROR(e) \
35c767a54bSJoe Perches pr_err("%s:%d: bad pte %p(%016lx)\n", \
36bb898558SAl Viro __FILE__, __LINE__, &(e), pte_val(e))
37bb898558SAl Viro #define pmd_ERROR(e) \
38c767a54bSJoe Perches pr_err("%s:%d: bad pmd %p(%016lx)\n", \
39bb898558SAl Viro __FILE__, __LINE__, &(e), pmd_val(e))
40bb898558SAl Viro #define pud_ERROR(e) \
41c767a54bSJoe Perches pr_err("%s:%d: bad pud %p(%016lx)\n", \
42bb898558SAl Viro __FILE__, __LINE__, &(e), pud_val(e))
43b8504058SKirill A. Shutemov
44b8504058SKirill A. Shutemov #if CONFIG_PGTABLE_LEVELS >= 5
45b8504058SKirill A. Shutemov #define p4d_ERROR(e) \
46b8504058SKirill A. Shutemov pr_err("%s:%d: bad p4d %p(%016lx)\n", \
47b8504058SKirill A. Shutemov __FILE__, __LINE__, &(e), p4d_val(e))
48b8504058SKirill A. Shutemov #endif
49b8504058SKirill A. Shutemov
50bb898558SAl Viro #define pgd_ERROR(e) \
51c767a54bSJoe Perches pr_err("%s:%d: bad pgd %p(%016lx)\n", \
52bb898558SAl Viro __FILE__, __LINE__, &(e), pgd_val(e))
53bb898558SAl Viro
54bb898558SAl Viro struct mm_struct;
55bb898558SAl Viro
568898ad58SAnshuman Khandual #define mm_p4d_folded mm_p4d_folded
mm_p4d_folded(struct mm_struct * mm)578898ad58SAnshuman Khandual static inline bool mm_p4d_folded(struct mm_struct *mm)
588898ad58SAnshuman Khandual {
598898ad58SAnshuman Khandual return !pgtable_l5_enabled();
608898ad58SAnshuman Khandual }
618898ad58SAnshuman Khandual
62f2a6a705SKirill A. Shutemov void set_pte_vaddr_p4d(p4d_t *p4d_page, unsigned long vaddr, pte_t new_pte);
63bb898558SAl Viro void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte);
64bb898558SAl Viro
native_set_pte(pte_t * ptep,pte_t pte)659bc4f28aSNadav Amit static inline void native_set_pte(pte_t *ptep, pte_t pte)
669bc4f28aSNadav Amit {
679bc4f28aSNadav Amit WRITE_ONCE(*ptep, pte);
689bc4f28aSNadav Amit }
699bc4f28aSNadav Amit
native_pte_clear(struct mm_struct * mm,unsigned long addr,pte_t * ptep)70bb898558SAl Viro static inline void native_pte_clear(struct mm_struct *mm, unsigned long addr,
71bb898558SAl Viro pte_t *ptep)
72bb898558SAl Viro {
739bc4f28aSNadav Amit native_set_pte(ptep, native_make_pte(0));
74bb898558SAl Viro }
75bb898558SAl Viro
native_set_pte_atomic(pte_t * ptep,pte_t pte)76bb898558SAl Viro static inline void native_set_pte_atomic(pte_t *ptep, pte_t pte)
77bb898558SAl Viro {
78bb898558SAl Viro native_set_pte(ptep, pte);
79bb898558SAl Viro }
80bb898558SAl Viro
native_set_pmd(pmd_t * pmdp,pmd_t pmd)81db3eb96fSAndrea Arcangeli static inline void native_set_pmd(pmd_t *pmdp, pmd_t pmd)
82db3eb96fSAndrea Arcangeli {
839bc4f28aSNadav Amit WRITE_ONCE(*pmdp, pmd);
84db3eb96fSAndrea Arcangeli }
85db3eb96fSAndrea Arcangeli
native_pmd_clear(pmd_t * pmd)86db3eb96fSAndrea Arcangeli static inline void native_pmd_clear(pmd_t *pmd)
87db3eb96fSAndrea Arcangeli {
88db3eb96fSAndrea Arcangeli native_set_pmd(pmd, native_make_pmd(0));
89db3eb96fSAndrea Arcangeli }
90db3eb96fSAndrea Arcangeli
native_ptep_get_and_clear(pte_t * xp)91bb898558SAl Viro static inline pte_t native_ptep_get_and_clear(pte_t *xp)
92bb898558SAl Viro {
93bb898558SAl Viro #ifdef CONFIG_SMP
94bb898558SAl Viro return native_make_pte(xchg(&xp->pte, 0));
95bb898558SAl Viro #else
96bb898558SAl Viro /* native_local_ptep_get_and_clear,
97bb898558SAl Viro but duplicated because of cyclic dependency */
98bb898558SAl Viro pte_t ret = *xp;
99bb898558SAl Viro native_pte_clear(NULL, 0, xp);
100bb898558SAl Viro return ret;
101bb898558SAl Viro #endif
102bb898558SAl Viro }
103bb898558SAl Viro
native_pmdp_get_and_clear(pmd_t * xp)104db3eb96fSAndrea Arcangeli static inline pmd_t native_pmdp_get_and_clear(pmd_t *xp)
105bb898558SAl Viro {
106db3eb96fSAndrea Arcangeli #ifdef CONFIG_SMP
107db3eb96fSAndrea Arcangeli return native_make_pmd(xchg(&xp->pmd, 0));
108db3eb96fSAndrea Arcangeli #else
109db3eb96fSAndrea Arcangeli /* native_local_pmdp_get_and_clear,
110db3eb96fSAndrea Arcangeli but duplicated because of cyclic dependency */
111db3eb96fSAndrea Arcangeli pmd_t ret = *xp;
112db3eb96fSAndrea Arcangeli native_pmd_clear(xp);
113db3eb96fSAndrea Arcangeli return ret;
114db3eb96fSAndrea Arcangeli #endif
115bb898558SAl Viro }
116bb898558SAl Viro
native_set_pud(pud_t * pudp,pud_t pud)117bb898558SAl Viro static inline void native_set_pud(pud_t *pudp, pud_t pud)
118bb898558SAl Viro {
1199bc4f28aSNadav Amit WRITE_ONCE(*pudp, pud);
120bb898558SAl Viro }
121bb898558SAl Viro
native_pud_clear(pud_t * pud)122bb898558SAl Viro static inline void native_pud_clear(pud_t *pud)
123bb898558SAl Viro {
124bb898558SAl Viro native_set_pud(pud, native_make_pud(0));
125bb898558SAl Viro }
126bb898558SAl Viro
native_pudp_get_and_clear(pud_t * xp)127a00cc7d9SMatthew Wilcox static inline pud_t native_pudp_get_and_clear(pud_t *xp)
128a00cc7d9SMatthew Wilcox {
129a00cc7d9SMatthew Wilcox #ifdef CONFIG_SMP
130a00cc7d9SMatthew Wilcox return native_make_pud(xchg(&xp->pud, 0));
131a00cc7d9SMatthew Wilcox #else
132a00cc7d9SMatthew Wilcox /* native_local_pudp_get_and_clear,
133a00cc7d9SMatthew Wilcox * but duplicated because of cyclic dependency
134a00cc7d9SMatthew Wilcox */
135a00cc7d9SMatthew Wilcox pud_t ret = *xp;
136a00cc7d9SMatthew Wilcox
137a00cc7d9SMatthew Wilcox native_pud_clear(xp);
138a00cc7d9SMatthew Wilcox return ret;
139a00cc7d9SMatthew Wilcox #endif
140a00cc7d9SMatthew Wilcox }
141a00cc7d9SMatthew Wilcox
native_set_p4d(p4d_t * p4dp,p4d_t p4d)142b8c1e429SKirill A. Shutemov static inline void native_set_p4d(p4d_t *p4dp, p4d_t p4d)
143f2a6a705SKirill A. Shutemov {
14491f606a8SKirill A. Shutemov pgd_t pgd;
14591f606a8SKirill A. Shutemov
146ed7588d5SKirill A. Shutemov if (pgtable_l5_enabled() || !IS_ENABLED(CONFIG_PAGE_TABLE_ISOLATION)) {
1479bc4f28aSNadav Amit WRITE_ONCE(*p4dp, p4d);
14891f606a8SKirill A. Shutemov return;
14991f606a8SKirill A. Shutemov }
15091f606a8SKirill A. Shutemov
151a5b162b2SKirill A. Shutemov pgd = native_make_pgd(native_p4d_val(p4d));
15223b77288SJoerg Roedel pgd = pti_set_user_pgtbl((pgd_t *)p4dp, pgd);
1539bc4f28aSNadav Amit WRITE_ONCE(*p4dp, native_make_p4d(native_pgd_val(pgd)));
154f2a6a705SKirill A. Shutemov }
155f2a6a705SKirill A. Shutemov
native_p4d_clear(p4d_t * p4d)156b8c1e429SKirill A. Shutemov static inline void native_p4d_clear(p4d_t *p4d)
157f2a6a705SKirill A. Shutemov {
158b8504058SKirill A. Shutemov native_set_p4d(p4d, native_make_p4d(0));
159f2a6a705SKirill A. Shutemov }
160f2a6a705SKirill A. Shutemov
native_set_pgd(pgd_t * pgdp,pgd_t pgd)161bb898558SAl Viro static inline void native_set_pgd(pgd_t *pgdp, pgd_t pgd)
162bb898558SAl Viro {
1639bc4f28aSNadav Amit WRITE_ONCE(*pgdp, pti_set_user_pgtbl(pgdp, pgd));
164bb898558SAl Viro }
165bb898558SAl Viro
native_pgd_clear(pgd_t * pgd)166bb898558SAl Viro static inline void native_pgd_clear(pgd_t *pgd)
167bb898558SAl Viro {
168bb898558SAl Viro native_set_pgd(pgd, native_make_pgd(0));
169bb898558SAl Viro }
170bb898558SAl Viro
171bb898558SAl Viro /*
172bb898558SAl Viro * Conversion functions: convert a page and protection to a page entry,
173bb898558SAl Viro * and a page entry and page directory to the page they refer to.
174bb898558SAl Viro */
175bb898558SAl Viro
1764b8e0328SIngo Molnar /* PGD - Level 4 access */
177bb898558SAl Viro
178bb898558SAl Viro /* PUD - Level 3 access */
179bb898558SAl Viro
180bb898558SAl Viro /* PMD - Level 2 access */
181bb898558SAl Viro
1824b8e0328SIngo Molnar /* PTE - Level 1 access */
183bb898558SAl Viro
18400839ee3SDave Hansen /*
18500839ee3SDave Hansen * Encode and de-code a swap entry
18600839ee3SDave Hansen *
18700839ee3SDave Hansen * | ... | 11| 10| 9|8|7|6|5| 4| 3|2| 1|0| <- bit number
18800839ee3SDave Hansen * | ... |SW3|SW2|SW1|G|L|D|A|CD|WT|U| W|P| <- bit names
1893e20889cSDavid Hildenbrand * | TYPE (59-63) | ~OFFSET (9-58) |0|0|X|X| X| E|F|SD|0| <- swp entry
19000839ee3SDave Hansen *
19100839ee3SDave Hansen * G (8) is aliased and used as a PROT_NONE indicator for
19200839ee3SDave Hansen * !present ptes. We need to start storing swap entries above
19300839ee3SDave Hansen * there. We also need to avoid using A and D because of an
19400839ee3SDave Hansen * erratum where they can be incorrectly set by hardware on
19500839ee3SDave Hansen * non-present PTEs.
196eee4818bSNaoya Horiguchi *
1975a281062SAndrea Arcangeli * SD Bits 1-4 are not used in non-present format and available for
1985a281062SAndrea Arcangeli * special use described below:
1995a281062SAndrea Arcangeli *
200eee4818bSNaoya Horiguchi * SD (1) in swp entry is used to store soft dirty bit, which helps us
201eee4818bSNaoya Horiguchi * remember soft dirty over page migration
202eee4818bSNaoya Horiguchi *
2035a281062SAndrea Arcangeli * F (2) in swp entry is used to record when a pagetable is
2045a281062SAndrea Arcangeli * writeprotected by userfaultfd WP support.
2055a281062SAndrea Arcangeli *
2063e20889cSDavid Hildenbrand * E (3) in swp entry is used to rememeber PG_anon_exclusive.
2073e20889cSDavid Hildenbrand *
208eee4818bSNaoya Horiguchi * Bit 7 in swp entry should be 0 because pmd_present checks not only P,
209eee4818bSNaoya Horiguchi * but also L and G.
2102f22b4cdSLinus Torvalds *
2112f22b4cdSLinus Torvalds * The offset is inverted by a binary not operation to make the high
2122f22b4cdSLinus Torvalds * physical bits set.
21300839ee3SDave Hansen */
2140a191362SKirill A. Shutemov #define SWP_TYPE_BITS 5
215bcd11afaSLinus Torvalds
216bcd11afaSLinus Torvalds #define SWP_OFFSET_FIRST_BIT (_PAGE_BIT_PROTNONE + 1)
217bcd11afaSLinus Torvalds
218bcd11afaSLinus Torvalds /* We always extract/encode the offset by shifting it all the way up, and then down again */
219bcd11afaSLinus Torvalds #define SWP_OFFSET_SHIFT (SWP_OFFSET_FIRST_BIT+SWP_TYPE_BITS)
2201796316aSJan Beulich
2211796316aSJan Beulich #define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS)
2221796316aSJan Beulich
223bcd11afaSLinus Torvalds /* Extract the high bits for type */
224bcd11afaSLinus Torvalds #define __swp_type(x) ((x).val >> (64 - SWP_TYPE_BITS))
225bcd11afaSLinus Torvalds
226bcd11afaSLinus Torvalds /* Shift up (to get rid of type), then down to get value */
2272f22b4cdSLinus Torvalds #define __swp_offset(x) (~(x).val << SWP_TYPE_BITS >> SWP_OFFSET_SHIFT)
228bcd11afaSLinus Torvalds
229bcd11afaSLinus Torvalds /*
230bcd11afaSLinus Torvalds * Shift the offset up "too far" by TYPE bits, then down again
2312f22b4cdSLinus Torvalds * The offset is inverted by a binary not operation to make the high
2322f22b4cdSLinus Torvalds * physical bits set.
233bcd11afaSLinus Torvalds */
2341796316aSJan Beulich #define __swp_entry(type, offset) ((swp_entry_t) { \
2352f22b4cdSLinus Torvalds (~(unsigned long)(offset) << SWP_OFFSET_SHIFT >> SWP_TYPE_BITS) \
236bcd11afaSLinus Torvalds | ((unsigned long)(type) << (64-SWP_TYPE_BITS)) })
237bcd11afaSLinus Torvalds
238bb898558SAl Viro #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val((pte)) })
239616b8371SZi Yan #define __pmd_to_swp_entry(pmd) ((swp_entry_t) { pmd_val((pmd)) })
240*0f88130eSJuergen Gross #define __swp_entry_to_pte(x) (__pte((x).val))
241*0f88130eSJuergen Gross #define __swp_entry_to_pmd(x) (__pmd((x).val))
242bb898558SAl Viro
243bb898558SAl Viro extern void cleanup_highmap(void);
244bb898558SAl Viro
245bb898558SAl Viro #define HAVE_ARCH_UNMAPPED_AREA
246bb898558SAl Viro #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
247bb898558SAl Viro
248bb898558SAl Viro #define PAGE_AGP PAGE_KERNEL_NOCACHE
249bb898558SAl Viro #define HAVE_PAGE_AGP 1
250bb898558SAl Viro
251bb898558SAl Viro /* fs/proc/kcore.c */
252bb898558SAl Viro #define kc_vaddr_to_offset(v) ((v) & __VIRTUAL_MASK)
2539063c61fSLinus Torvalds #define kc_offset_to_vaddr(o) ((o) | ~__VIRTUAL_MASK)
254bb898558SAl Viro
255bb898558SAl Viro #define __HAVE_ARCH_PTE_SAME
2565f6e8da7SAndrea Arcangeli
257fb50b020SAlexander Duyck #define vmemmap ((struct page *)VMEMMAP_START)
258fb50b020SAlexander Duyck
259fb50b020SAlexander Duyck extern void init_extra_mapping_uc(unsigned long phys, unsigned long size);
260fb50b020SAlexander Duyck extern void init_extra_mapping_wb(unsigned long phys, unsigned long size);
261fb50b020SAlexander Duyck
262e585513bSKirill A. Shutemov #define gup_fast_permitted gup_fast_permitted
gup_fast_permitted(unsigned long start,unsigned long end)26326f4c328SChristoph Hellwig static inline bool gup_fast_permitted(unsigned long start, unsigned long end)
264e585513bSKirill A. Shutemov {
265e585513bSKirill A. Shutemov if (end >> __VIRTUAL_MASK_SHIFT)
266e585513bSKirill A. Shutemov return false;
267e585513bSKirill A. Shutemov return true;
268e585513bSKirill A. Shutemov }
269e585513bSKirill A. Shutemov
2706b28bacaSAndi Kleen #include <asm/pgtable-invert.h>
2716b28bacaSAndi Kleen
272e585513bSKirill A. Shutemov #endif /* !__ASSEMBLY__ */
2731965aae3SH. Peter Anvin #endif /* _ASM_X86_PGTABLE_64_H */
274