1bb898558SAl Viro /* Generic MTRR (Memory Type Range Register) ioctls.
2bb898558SAl Viro
3bb898558SAl Viro Copyright (C) 1997-1999 Richard Gooch
4bb898558SAl Viro
5bb898558SAl Viro This library is free software; you can redistribute it and/or
6bb898558SAl Viro modify it under the terms of the GNU Library General Public
7bb898558SAl Viro License as published by the Free Software Foundation; either
8bb898558SAl Viro version 2 of the License, or (at your option) any later version.
9bb898558SAl Viro
10bb898558SAl Viro This library is distributed in the hope that it will be useful,
11bb898558SAl Viro but WITHOUT ANY WARRANTY; without even the implied warranty of
12bb898558SAl Viro MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13bb898558SAl Viro Library General Public License for more details.
14bb898558SAl Viro
15bb898558SAl Viro You should have received a copy of the GNU Library General Public
16bb898558SAl Viro License along with this library; if not, write to the Free
17bb898558SAl Viro Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18bb898558SAl Viro
19bb898558SAl Viro Richard Gooch may be reached by email at rgooch@atnf.csiro.au
20bb898558SAl Viro The postal address is:
21bb898558SAl Viro Richard Gooch, c/o ATNF, P. O. Box 76, Epping, N.S.W., 2121, Australia.
22bb898558SAl Viro */
231965aae3SH. Peter Anvin #ifndef _ASM_X86_MTRR_H
241965aae3SH. Peter Anvin #define _ASM_X86_MTRR_H
25bb898558SAl Viro
26d053b481SJuergen Gross #include <linux/bits.h>
27af170c50SDavid Howells #include <uapi/asm/mtrr.h>
28bb898558SAl Viro
29d053b481SJuergen Gross /* Defines for hardware MTRR registers. */
30d053b481SJuergen Gross #define MTRR_CAP_VCNT GENMASK(7, 0)
31d053b481SJuergen Gross #define MTRR_CAP_FIX BIT_MASK(8)
32d053b481SJuergen Gross #define MTRR_CAP_WC BIT_MASK(10)
33d053b481SJuergen Gross
34d053b481SJuergen Gross #define MTRR_DEF_TYPE_TYPE GENMASK(7, 0)
35d053b481SJuergen Gross #define MTRR_DEF_TYPE_FE BIT_MASK(10)
36d053b481SJuergen Gross #define MTRR_DEF_TYPE_E BIT_MASK(11)
37d053b481SJuergen Gross
38d053b481SJuergen Gross #define MTRR_DEF_TYPE_ENABLE (MTRR_DEF_TYPE_FE | MTRR_DEF_TYPE_E)
39d053b481SJuergen Gross #define MTRR_DEF_TYPE_DISABLE ~(MTRR_DEF_TYPE_TYPE | MTRR_DEF_TYPE_ENABLE)
40d053b481SJuergen Gross
41d053b481SJuergen Gross #define MTRR_PHYSBASE_TYPE GENMASK(7, 0)
42d053b481SJuergen Gross #define MTRR_PHYSBASE_RSVD GENMASK(11, 8)
43d053b481SJuergen Gross
44d053b481SJuergen Gross #define MTRR_PHYSMASK_RSVD GENMASK(10, 0)
45d053b481SJuergen Gross #define MTRR_PHYSMASK_V BIT_MASK(11)
46d053b481SJuergen Gross
47d053b481SJuergen Gross struct mtrr_state_type {
48d053b481SJuergen Gross struct mtrr_var_range var_ranges[MTRR_MAX_VAR_RANGES];
49d053b481SJuergen Gross mtrr_type fixed_ranges[MTRR_NUM_FIXED_RANGES];
50d053b481SJuergen Gross unsigned char enabled;
51d053b481SJuergen Gross bool have_fixed;
52d053b481SJuergen Gross mtrr_type def_type;
53d053b481SJuergen Gross };
54d053b481SJuergen Gross
55d0d98eedSAndy Lutomirski /*
56d0d98eedSAndy Lutomirski * The following functions are for use by other drivers that cannot use
57d0d98eedSAndy Lutomirski * arch_phys_wc_add and arch_phys_wc_del.
58d0d98eedSAndy Lutomirski */
59bb898558SAl Viro # ifdef CONFIG_MTRR
600b9a6a8bSJuergen Gross void mtrr_bp_init(void);
6129055dc7SJuergen Gross void mtrr_overwrite_state(struct mtrr_var_range *var, unsigned int num_var,
6229055dc7SJuergen Gross mtrr_type def_type);
63b73522e0SToshi Kani extern u8 mtrr_type_lookup(u64 addr, u64 end, u8 *uniform);
64bb898558SAl Viro extern void mtrr_save_fixed_ranges(void *);
65bb898558SAl Viro extern void mtrr_save_state(void);
66bb898558SAl Viro extern int mtrr_add(unsigned long base, unsigned long size,
67bb898558SAl Viro unsigned int type, bool increment);
68bb898558SAl Viro extern int mtrr_add_page(unsigned long base, unsigned long size,
69bb898558SAl Viro unsigned int type, bool increment);
70bb898558SAl Viro extern int mtrr_del(int reg, unsigned long base, unsigned long size);
71bb898558SAl Viro extern int mtrr_del_page(int reg, unsigned long base, unsigned long size);
72d0af9eedSSuresh Siddha extern void mtrr_bp_restore(void);
73bb898558SAl Viro extern int mtrr_trim_uncached_memory(unsigned long end_pfn);
74bb898558SAl Viro extern int amd_special_default_mtrr(void);
754ad7149eSJuergen Gross void mtrr_disable(void);
764ad7149eSJuergen Gross void mtrr_enable(void);
777d71db53SJuergen Gross void mtrr_generic_set_state(void);
78bb898558SAl Viro # else
mtrr_overwrite_state(struct mtrr_var_range * var,unsigned int num_var,mtrr_type def_type)7929055dc7SJuergen Gross static inline void mtrr_overwrite_state(struct mtrr_var_range *var,
8029055dc7SJuergen Gross unsigned int num_var,
8129055dc7SJuergen Gross mtrr_type def_type)
8229055dc7SJuergen Gross {
8329055dc7SJuergen Gross }
8429055dc7SJuergen Gross
mtrr_type_lookup(u64 addr,u64 end,u8 * uniform)85b73522e0SToshi Kani static inline u8 mtrr_type_lookup(u64 addr, u64 end, u8 *uniform)
86bb898558SAl Viro {
87bb898558SAl Viro /*
88*973df194SJuergen Gross * Return the default MTRR type, without any known other types in
89*973df194SJuergen Gross * that range.
90bb898558SAl Viro */
91*973df194SJuergen Gross *uniform = 1;
92*973df194SJuergen Gross
93*973df194SJuergen Gross return MTRR_TYPE_UNCACHABLE;
94bb898558SAl Viro }
95bb898558SAl Viro #define mtrr_save_fixed_ranges(arg) do {} while (0)
96bb898558SAl Viro #define mtrr_save_state() do {} while (0)
mtrr_add(unsigned long base,unsigned long size,unsigned int type,bool increment)97bb898558SAl Viro static inline int mtrr_add(unsigned long base, unsigned long size,
98bb898558SAl Viro unsigned int type, bool increment)
99bb898558SAl Viro {
100bb898558SAl Viro return -ENODEV;
101bb898558SAl Viro }
mtrr_add_page(unsigned long base,unsigned long size,unsigned int type,bool increment)102bb898558SAl Viro static inline int mtrr_add_page(unsigned long base, unsigned long size,
103bb898558SAl Viro unsigned int type, bool increment)
104bb898558SAl Viro {
105bb898558SAl Viro return -ENODEV;
106bb898558SAl Viro }
mtrr_del(int reg,unsigned long base,unsigned long size)107bb898558SAl Viro static inline int mtrr_del(int reg, unsigned long base, unsigned long size)
108bb898558SAl Viro {
109bb898558SAl Viro return -ENODEV;
110bb898558SAl Viro }
mtrr_del_page(int reg,unsigned long base,unsigned long size)111bb898558SAl Viro static inline int mtrr_del_page(int reg, unsigned long base, unsigned long size)
112bb898558SAl Viro {
113bb898558SAl Viro return -ENODEV;
114bb898558SAl Viro }
mtrr_trim_uncached_memory(unsigned long end_pfn)115bb898558SAl Viro static inline int mtrr_trim_uncached_memory(unsigned long end_pfn)
116bb898558SAl Viro {
117bb898558SAl Viro return 0;
118bb898558SAl Viro }
1190b9a6a8bSJuergen Gross #define mtrr_bp_init() do {} while (0)
120d0af9eedSSuresh Siddha #define mtrr_bp_restore() do {} while (0)
1214ad7149eSJuergen Gross #define mtrr_disable() do {} while (0)
1224ad7149eSJuergen Gross #define mtrr_enable() do {} while (0)
1237d71db53SJuergen Gross #define mtrr_generic_set_state() do {} while (0)
124bb898558SAl Viro # endif
125bb898558SAl Viro
126bb898558SAl Viro #ifdef CONFIG_COMPAT
127bb898558SAl Viro #include <linux/compat.h>
128bb898558SAl Viro
129bb898558SAl Viro struct mtrr_sentry32 {
130bb898558SAl Viro compat_ulong_t base; /* Base address */
131bb898558SAl Viro compat_uint_t size; /* Size of region */
132bb898558SAl Viro compat_uint_t type; /* Type of region */
133bb898558SAl Viro };
134bb898558SAl Viro
135bb898558SAl Viro struct mtrr_gentry32 {
136bb898558SAl Viro compat_ulong_t regnum; /* Register number */
137bb898558SAl Viro compat_uint_t base; /* Base address */
138bb898558SAl Viro compat_uint_t size; /* Size of region */
139bb898558SAl Viro compat_uint_t type; /* Type of region */
140bb898558SAl Viro };
141bb898558SAl Viro
142bb898558SAl Viro #define MTRR_IOCTL_BASE 'M'
143bb898558SAl Viro
144bb898558SAl Viro #define MTRRIOC32_ADD_ENTRY _IOW(MTRR_IOCTL_BASE, 0, struct mtrr_sentry32)
145bb898558SAl Viro #define MTRRIOC32_SET_ENTRY _IOW(MTRR_IOCTL_BASE, 1, struct mtrr_sentry32)
146bb898558SAl Viro #define MTRRIOC32_DEL_ENTRY _IOW(MTRR_IOCTL_BASE, 2, struct mtrr_sentry32)
147bb898558SAl Viro #define MTRRIOC32_GET_ENTRY _IOWR(MTRR_IOCTL_BASE, 3, struct mtrr_gentry32)
148bb898558SAl Viro #define MTRRIOC32_KILL_ENTRY _IOW(MTRR_IOCTL_BASE, 4, struct mtrr_sentry32)
149bb898558SAl Viro #define MTRRIOC32_ADD_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 5, struct mtrr_sentry32)
150bb898558SAl Viro #define MTRRIOC32_SET_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 6, struct mtrr_sentry32)
151bb898558SAl Viro #define MTRRIOC32_DEL_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 7, struct mtrr_sentry32)
152bb898558SAl Viro #define MTRRIOC32_GET_PAGE_ENTRY _IOWR(MTRR_IOCTL_BASE, 8, struct mtrr_gentry32)
153bb898558SAl Viro #define MTRRIOC32_KILL_PAGE_ENTRY \
154bb898558SAl Viro _IOW(MTRR_IOCTL_BASE, 9, struct mtrr_sentry32)
155bb898558SAl Viro #endif /* CONFIG_COMPAT */
156bb898558SAl Viro
1579b3aca62SToshi Kani /* Bit fields for enabled in struct mtrr_state_type */
158d053b481SJuergen Gross #define MTRR_STATE_SHIFT 10
159d053b481SJuergen Gross #define MTRR_STATE_MTRR_FIXED_ENABLED (MTRR_DEF_TYPE_FE >> MTRR_STATE_SHIFT)
160d053b481SJuergen Gross #define MTRR_STATE_MTRR_ENABLED (MTRR_DEF_TYPE_E >> MTRR_STATE_SHIFT)
1619b3aca62SToshi Kani
1621965aae3SH. Peter Anvin #endif /* _ASM_X86_MTRR_H */
163