1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_X86_MPSPEC_H 3 #define _ASM_X86_MPSPEC_H 4 5 6 #include <asm/mpspec_def.h> 7 #include <asm/x86_init.h> 8 #include <asm/apicdef.h> 9 10 extern int pic_mode; 11 12 #ifdef CONFIG_X86_32 13 14 /* 15 * Summit or generic (i.e. installer) kernels need lots of bus entries. 16 * Maximum 256 PCI busses, plus 1 ISA bus in each of 4 cabinets. 17 */ 18 #if CONFIG_BASE_SMALL == 0 19 # define MAX_MP_BUSSES 260 20 #else 21 # define MAX_MP_BUSSES 32 22 #endif 23 24 #define MAX_IRQ_SOURCES 256 25 26 extern unsigned int def_to_bigsmp; 27 28 #else /* CONFIG_X86_64: */ 29 30 #define MAX_MP_BUSSES 256 31 /* Each PCI slot may be a combo card with its own bus. 4 IRQ pins per slot. */ 32 #define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4) 33 34 #endif /* CONFIG_X86_64 */ 35 36 #ifdef CONFIG_EISA 37 extern int mp_bus_id_to_type[MAX_MP_BUSSES]; 38 #endif 39 40 extern DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES); 41 42 extern unsigned int boot_cpu_physical_apicid; 43 extern u8 boot_cpu_apic_version; 44 45 #ifdef CONFIG_X86_LOCAL_APIC 46 extern int smp_found_config; 47 #else 48 # define smp_found_config 0 49 #endif 50 51 static inline void get_smp_config(void) 52 { 53 x86_init.mpparse.get_smp_config(0); 54 } 55 56 static inline void early_get_smp_config(void) 57 { 58 x86_init.mpparse.get_smp_config(1); 59 } 60 61 static inline void find_smp_config(void) 62 { 63 x86_init.mpparse.find_smp_config(); 64 } 65 66 #ifdef CONFIG_X86_MPPARSE 67 extern void e820__memblock_alloc_reserved_mpc_new(void); 68 extern int enable_update_mptable; 69 extern void default_find_smp_config(void); 70 extern void default_get_smp_config(unsigned int early); 71 #else 72 static inline void e820__memblock_alloc_reserved_mpc_new(void) { } 73 #define enable_update_mptable 0 74 #define default_find_smp_config x86_init_noop 75 #define default_get_smp_config x86_init_uint_noop 76 #endif 77 78 int generic_processor_info(int apicid); 79 80 #define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_LOCAL_APIC) 81 82 struct physid_mask { 83 unsigned long mask[PHYSID_ARRAY_SIZE]; 84 }; 85 86 typedef struct physid_mask physid_mask_t; 87 88 #define physid_set(physid, map) set_bit(physid, (map).mask) 89 #define physid_isset(physid, map) test_bit(physid, (map).mask) 90 91 #define physids_or(dst, src1, src2) \ 92 bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_LOCAL_APIC) 93 94 #define physids_clear(map) \ 95 bitmap_zero((map).mask, MAX_LOCAL_APIC) 96 97 #define physids_empty(map) \ 98 bitmap_empty((map).mask, MAX_LOCAL_APIC) 99 100 static inline void physids_promote(unsigned long physids, physid_mask_t *map) 101 { 102 physids_clear(*map); 103 map->mask[0] = physids; 104 } 105 106 static inline void physid_set_mask_of_physid(int physid, physid_mask_t *map) 107 { 108 physids_clear(*map); 109 physid_set(physid, *map); 110 } 111 112 #define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} } 113 #define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} } 114 115 extern physid_mask_t phys_cpu_present_map; 116 117 #endif /* _ASM_X86_MPSPEC_H */ 118