1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_X86_MPSPEC_H 3 #define _ASM_X86_MPSPEC_H 4 5 6 #include <asm/mpspec_def.h> 7 #include <asm/x86_init.h> 8 #include <asm/apicdef.h> 9 10 extern int pic_mode; 11 12 #ifdef CONFIG_X86_32 13 14 /* 15 * Summit or generic (i.e. installer) kernels need lots of bus entries. 16 * Maximum 256 PCI busses, plus 1 ISA bus in each of 4 cabinets. 17 */ 18 #if CONFIG_BASE_SMALL == 0 19 # define MAX_MP_BUSSES 260 20 #else 21 # define MAX_MP_BUSSES 32 22 #endif 23 24 #define MAX_IRQ_SOURCES 256 25 26 extern unsigned int def_to_bigsmp; 27 28 #else /* CONFIG_X86_64: */ 29 30 #define MAX_MP_BUSSES 256 31 /* Each PCI slot may be a combo card with its own bus. 4 IRQ pins per slot. */ 32 #define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4) 33 34 #endif /* CONFIG_X86_64 */ 35 36 #ifdef CONFIG_EISA 37 extern int mp_bus_id_to_type[MAX_MP_BUSSES]; 38 #endif 39 40 extern DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES); 41 42 extern unsigned int boot_cpu_physical_apicid; 43 extern u8 boot_cpu_apic_version; 44 extern unsigned long mp_lapic_addr; 45 46 #ifdef CONFIG_X86_LOCAL_APIC 47 extern int smp_found_config; 48 #else 49 # define smp_found_config 0 50 #endif 51 52 static inline void get_smp_config(void) 53 { 54 x86_init.mpparse.get_smp_config(0); 55 } 56 57 static inline void early_get_smp_config(void) 58 { 59 x86_init.mpparse.get_smp_config(1); 60 } 61 62 static inline void find_smp_config(void) 63 { 64 x86_init.mpparse.find_smp_config(); 65 } 66 67 #ifdef CONFIG_X86_MPPARSE 68 extern void e820__memblock_alloc_reserved_mpc_new(void); 69 extern int enable_update_mptable; 70 extern void default_find_smp_config(void); 71 extern void default_get_smp_config(unsigned int early); 72 #else 73 static inline void e820__memblock_alloc_reserved_mpc_new(void) { } 74 #define enable_update_mptable 0 75 #define default_find_smp_config x86_init_noop 76 #define default_get_smp_config x86_init_uint_noop 77 #endif 78 79 int generic_processor_info(int apicid); 80 81 #define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_LOCAL_APIC) 82 83 struct physid_mask { 84 unsigned long mask[PHYSID_ARRAY_SIZE]; 85 }; 86 87 typedef struct physid_mask physid_mask_t; 88 89 #define physid_set(physid, map) set_bit(physid, (map).mask) 90 #define physid_isset(physid, map) test_bit(physid, (map).mask) 91 92 #define physids_or(dst, src1, src2) \ 93 bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_LOCAL_APIC) 94 95 #define physids_clear(map) \ 96 bitmap_zero((map).mask, MAX_LOCAL_APIC) 97 98 #define physids_empty(map) \ 99 bitmap_empty((map).mask, MAX_LOCAL_APIC) 100 101 static inline void physids_promote(unsigned long physids, physid_mask_t *map) 102 { 103 physids_clear(*map); 104 map->mask[0] = physids; 105 } 106 107 static inline void physid_set_mask_of_physid(int physid, physid_mask_t *map) 108 { 109 physids_clear(*map); 110 physid_set(physid, *map); 111 } 112 113 #define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} } 114 #define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} } 115 116 extern physid_mask_t phys_cpu_present_map; 117 118 #endif /* _ASM_X86_MPSPEC_H */ 119