1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Kernel-based Virtual Machine driver for Linux 4 * 5 * This header defines architecture specific interfaces, x86 version 6 */ 7 8 #ifndef _ASM_X86_KVM_HOST_H 9 #define _ASM_X86_KVM_HOST_H 10 11 #include <linux/types.h> 12 #include <linux/mm.h> 13 #include <linux/mmu_notifier.h> 14 #include <linux/tracepoint.h> 15 #include <linux/cpumask.h> 16 #include <linux/irq_work.h> 17 #include <linux/irq.h> 18 19 #include <linux/kvm.h> 20 #include <linux/kvm_para.h> 21 #include <linux/kvm_types.h> 22 #include <linux/perf_event.h> 23 #include <linux/pvclock_gtod.h> 24 #include <linux/clocksource.h> 25 #include <linux/irqbypass.h> 26 #include <linux/hyperv.h> 27 28 #include <asm/apic.h> 29 #include <asm/pvclock-abi.h> 30 #include <asm/desc.h> 31 #include <asm/mtrr.h> 32 #include <asm/msr-index.h> 33 #include <asm/asm.h> 34 #include <asm/kvm_page_track.h> 35 #include <asm/kvm_vcpu_regs.h> 36 #include <asm/hyperv-tlfs.h> 37 38 #define __KVM_HAVE_ARCH_VCPU_DEBUGFS 39 40 #define KVM_MAX_VCPUS 288 41 #define KVM_SOFT_MAX_VCPUS 240 42 #define KVM_MAX_VCPU_ID 1023 43 /* memory slots that are not exposed to userspace */ 44 #define KVM_PRIVATE_MEM_SLOTS 3 45 46 #define KVM_HALT_POLL_NS_DEFAULT 200000 47 48 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 49 50 #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \ 51 KVM_DIRTY_LOG_INITIALLY_SET) 52 53 #define KVM_BUS_LOCK_DETECTION_VALID_MODE (KVM_BUS_LOCK_DETECTION_OFF | \ 54 KVM_BUS_LOCK_DETECTION_EXIT) 55 56 /* x86-specific vcpu->requests bit members */ 57 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0) 58 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1) 59 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2) 60 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3) 61 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4) 62 #define KVM_REQ_LOAD_MMU_PGD KVM_ARCH_REQ(5) 63 #define KVM_REQ_EVENT KVM_ARCH_REQ(6) 64 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7) 65 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8) 66 #define KVM_REQ_NMI KVM_ARCH_REQ(9) 67 #define KVM_REQ_PMU KVM_ARCH_REQ(10) 68 #define KVM_REQ_PMI KVM_ARCH_REQ(11) 69 #define KVM_REQ_SMI KVM_ARCH_REQ(12) 70 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13) 71 #define KVM_REQ_MCLOCK_INPROGRESS \ 72 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 73 #define KVM_REQ_SCAN_IOAPIC \ 74 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 75 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16) 76 #define KVM_REQ_APIC_PAGE_RELOAD \ 77 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 78 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18) 79 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19) 80 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20) 81 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21) 82 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22) 83 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23) 84 #define KVM_REQ_GET_NESTED_STATE_PAGES KVM_ARCH_REQ(24) 85 #define KVM_REQ_APICV_UPDATE \ 86 KVM_ARCH_REQ_FLAGS(25, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 87 #define KVM_REQ_TLB_FLUSH_CURRENT KVM_ARCH_REQ(26) 88 #define KVM_REQ_HV_TLB_FLUSH \ 89 KVM_ARCH_REQ_FLAGS(27, KVM_REQUEST_NO_WAKEUP) 90 #define KVM_REQ_APF_READY KVM_ARCH_REQ(28) 91 #define KVM_REQ_MSR_FILTER_CHANGED KVM_ARCH_REQ(29) 92 93 #define CR0_RESERVED_BITS \ 94 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 95 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 96 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 97 98 #define CR4_RESERVED_BITS \ 99 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 100 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 101 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 102 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 103 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \ 104 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP)) 105 106 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 107 108 109 110 #define INVALID_PAGE (~(hpa_t)0) 111 #define VALID_PAGE(x) ((x) != INVALID_PAGE) 112 113 #define UNMAPPED_GVA (~(gpa_t)0) 114 115 /* KVM Hugepage definitions for x86 */ 116 #define KVM_MAX_HUGEPAGE_LEVEL PG_LEVEL_1G 117 #define KVM_NR_PAGE_SIZES (KVM_MAX_HUGEPAGE_LEVEL - PG_LEVEL_4K + 1) 118 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 119 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 120 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 121 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 122 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 123 124 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level) 125 { 126 /* KVM_HPAGE_GFN_SHIFT(PG_LEVEL_4K) must be 0. */ 127 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) - 128 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level)); 129 } 130 131 #define KVM_PERMILLE_MMU_PAGES 20 132 #define KVM_MIN_ALLOC_MMU_PAGES 64UL 133 #define KVM_MMU_HASH_SHIFT 12 134 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 135 #define KVM_MIN_FREE_MMU_PAGES 5 136 #define KVM_REFILL_PAGES 25 137 #define KVM_MAX_CPUID_ENTRIES 256 138 #define KVM_NR_FIXED_MTRR_REGION 88 139 #define KVM_NR_VAR_MTRR 8 140 141 #define ASYNC_PF_PER_VCPU 64 142 143 enum kvm_reg { 144 VCPU_REGS_RAX = __VCPU_REGS_RAX, 145 VCPU_REGS_RCX = __VCPU_REGS_RCX, 146 VCPU_REGS_RDX = __VCPU_REGS_RDX, 147 VCPU_REGS_RBX = __VCPU_REGS_RBX, 148 VCPU_REGS_RSP = __VCPU_REGS_RSP, 149 VCPU_REGS_RBP = __VCPU_REGS_RBP, 150 VCPU_REGS_RSI = __VCPU_REGS_RSI, 151 VCPU_REGS_RDI = __VCPU_REGS_RDI, 152 #ifdef CONFIG_X86_64 153 VCPU_REGS_R8 = __VCPU_REGS_R8, 154 VCPU_REGS_R9 = __VCPU_REGS_R9, 155 VCPU_REGS_R10 = __VCPU_REGS_R10, 156 VCPU_REGS_R11 = __VCPU_REGS_R11, 157 VCPU_REGS_R12 = __VCPU_REGS_R12, 158 VCPU_REGS_R13 = __VCPU_REGS_R13, 159 VCPU_REGS_R14 = __VCPU_REGS_R14, 160 VCPU_REGS_R15 = __VCPU_REGS_R15, 161 #endif 162 VCPU_REGS_RIP, 163 NR_VCPU_REGS, 164 165 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 166 VCPU_EXREG_CR0, 167 VCPU_EXREG_CR3, 168 VCPU_EXREG_CR4, 169 VCPU_EXREG_RFLAGS, 170 VCPU_EXREG_SEGMENTS, 171 VCPU_EXREG_EXIT_INFO_1, 172 VCPU_EXREG_EXIT_INFO_2, 173 }; 174 175 enum { 176 VCPU_SREG_ES, 177 VCPU_SREG_CS, 178 VCPU_SREG_SS, 179 VCPU_SREG_DS, 180 VCPU_SREG_FS, 181 VCPU_SREG_GS, 182 VCPU_SREG_TR, 183 VCPU_SREG_LDTR, 184 }; 185 186 enum exit_fastpath_completion { 187 EXIT_FASTPATH_NONE, 188 EXIT_FASTPATH_REENTER_GUEST, 189 EXIT_FASTPATH_EXIT_HANDLED, 190 }; 191 typedef enum exit_fastpath_completion fastpath_t; 192 193 struct x86_emulate_ctxt; 194 struct x86_exception; 195 enum x86_intercept; 196 enum x86_intercept_stage; 197 198 #define KVM_NR_DB_REGS 4 199 200 #define DR6_BD (1 << 13) 201 #define DR6_BS (1 << 14) 202 #define DR6_BT (1 << 15) 203 #define DR6_RTM (1 << 16) 204 /* 205 * DR6_ACTIVE_LOW combines fixed-1 and active-low bits. 206 * We can regard all the bits in DR6_FIXED_1 as active_low bits; 207 * they will never be 0 for now, but when they are defined 208 * in the future it will require no code change. 209 * 210 * DR6_ACTIVE_LOW is also used as the init/reset value for DR6. 211 */ 212 #define DR6_ACTIVE_LOW 0xffff0ff0 213 #define DR6_VOLATILE 0x0001e00f 214 #define DR6_FIXED_1 (DR6_ACTIVE_LOW & ~DR6_VOLATILE) 215 216 #define DR7_BP_EN_MASK 0x000000ff 217 #define DR7_GE (1 << 9) 218 #define DR7_GD (1 << 13) 219 #define DR7_FIXED_1 0x00000400 220 #define DR7_VOLATILE 0xffff2bff 221 222 #define PFERR_PRESENT_BIT 0 223 #define PFERR_WRITE_BIT 1 224 #define PFERR_USER_BIT 2 225 #define PFERR_RSVD_BIT 3 226 #define PFERR_FETCH_BIT 4 227 #define PFERR_PK_BIT 5 228 #define PFERR_GUEST_FINAL_BIT 32 229 #define PFERR_GUEST_PAGE_BIT 33 230 231 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT) 232 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT) 233 #define PFERR_USER_MASK (1U << PFERR_USER_BIT) 234 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT) 235 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT) 236 #define PFERR_PK_MASK (1U << PFERR_PK_BIT) 237 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT) 238 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT) 239 240 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \ 241 PFERR_WRITE_MASK | \ 242 PFERR_PRESENT_MASK) 243 244 /* apic attention bits */ 245 #define KVM_APIC_CHECK_VAPIC 0 246 /* 247 * The following bit is set with PV-EOI, unset on EOI. 248 * We detect PV-EOI changes by guest by comparing 249 * this bit with PV-EOI in guest memory. 250 * See the implementation in apic_update_pv_eoi. 251 */ 252 #define KVM_APIC_PV_EOI_PENDING 1 253 254 struct kvm_kernel_irq_routing_entry; 255 256 /* 257 * the pages used as guest page table on soft mmu are tracked by 258 * kvm_memory_slot.arch.gfn_track which is 16 bits, so the role bits used 259 * by indirect shadow page can not be more than 15 bits. 260 * 261 * Currently, we used 14 bits that are @level, @gpte_is_8_bytes, @quadrant, @access, 262 * @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp. 263 */ 264 union kvm_mmu_page_role { 265 u32 word; 266 struct { 267 unsigned level:4; 268 unsigned gpte_is_8_bytes:1; 269 unsigned quadrant:2; 270 unsigned direct:1; 271 unsigned access:3; 272 unsigned invalid:1; 273 unsigned nxe:1; 274 unsigned cr0_wp:1; 275 unsigned smep_andnot_wp:1; 276 unsigned smap_andnot_wp:1; 277 unsigned ad_disabled:1; 278 unsigned guest_mode:1; 279 unsigned :6; 280 281 /* 282 * This is left at the top of the word so that 283 * kvm_memslots_for_spte_role can extract it with a 284 * simple shift. While there is room, give it a whole 285 * byte so it is also faster to load it from memory. 286 */ 287 unsigned smm:8; 288 }; 289 }; 290 291 union kvm_mmu_extended_role { 292 /* 293 * This structure complements kvm_mmu_page_role caching everything needed for 294 * MMU configuration. If nothing in both these structures changed, MMU 295 * re-configuration can be skipped. @valid bit is set on first usage so we don't 296 * treat all-zero structure as valid data. 297 */ 298 u32 word; 299 struct { 300 unsigned int valid:1; 301 unsigned int execonly:1; 302 unsigned int cr0_pg:1; 303 unsigned int cr4_pae:1; 304 unsigned int cr4_pse:1; 305 unsigned int cr4_pke:1; 306 unsigned int cr4_smap:1; 307 unsigned int cr4_smep:1; 308 unsigned int maxphyaddr:6; 309 }; 310 }; 311 312 union kvm_mmu_role { 313 u64 as_u64; 314 struct { 315 union kvm_mmu_page_role base; 316 union kvm_mmu_extended_role ext; 317 }; 318 }; 319 320 struct kvm_rmap_head { 321 unsigned long val; 322 }; 323 324 struct kvm_pio_request { 325 unsigned long linear_rip; 326 unsigned long count; 327 int in; 328 int port; 329 int size; 330 }; 331 332 #define PT64_ROOT_MAX_LEVEL 5 333 334 struct rsvd_bits_validate { 335 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL]; 336 u64 bad_mt_xwr; 337 }; 338 339 struct kvm_mmu_root_info { 340 gpa_t pgd; 341 hpa_t hpa; 342 }; 343 344 #define KVM_MMU_ROOT_INFO_INVALID \ 345 ((struct kvm_mmu_root_info) { .pgd = INVALID_PAGE, .hpa = INVALID_PAGE }) 346 347 #define KVM_MMU_NUM_PREV_ROOTS 3 348 349 #define KVM_HAVE_MMU_RWLOCK 350 351 struct kvm_mmu_page; 352 353 /* 354 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit, 355 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the 356 * current mmu mode. 357 */ 358 struct kvm_mmu { 359 unsigned long (*get_guest_pgd)(struct kvm_vcpu *vcpu); 360 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 361 int (*page_fault)(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u32 err, 362 bool prefault); 363 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 364 struct x86_exception *fault); 365 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gpa_t gva_or_gpa, 366 u32 access, struct x86_exception *exception); 367 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 368 struct x86_exception *exception); 369 int (*sync_page)(struct kvm_vcpu *vcpu, 370 struct kvm_mmu_page *sp); 371 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa); 372 hpa_t root_hpa; 373 gpa_t root_pgd; 374 union kvm_mmu_role mmu_role; 375 u8 root_level; 376 u8 shadow_root_level; 377 u8 ept_ad; 378 bool direct_map; 379 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS]; 380 381 /* 382 * Bitmap; bit set = permission fault 383 * Byte index: page fault error code [4:1] 384 * Bit index: pte permissions in ACC_* format 385 */ 386 u8 permissions[16]; 387 388 /* 389 * The pkru_mask indicates if protection key checks are needed. It 390 * consists of 16 domains indexed by page fault error code bits [4:1], 391 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables. 392 * Each domain has 2 bits which are ANDed with AD and WD from PKRU. 393 */ 394 u32 pkru_mask; 395 396 u64 *pae_root; 397 u64 *lm_root; 398 399 /* 400 * check zero bits on shadow page table entries, these 401 * bits include not only hardware reserved bits but also 402 * the bits spte never used. 403 */ 404 struct rsvd_bits_validate shadow_zero_check; 405 406 struct rsvd_bits_validate guest_rsvd_check; 407 408 /* Can have large pages at levels 2..last_nonleaf_level-1. */ 409 u8 last_nonleaf_level; 410 411 bool nx; 412 413 u64 pdptrs[4]; /* pae */ 414 }; 415 416 struct kvm_tlb_range { 417 u64 start_gfn; 418 u64 pages; 419 }; 420 421 enum pmc_type { 422 KVM_PMC_GP = 0, 423 KVM_PMC_FIXED, 424 }; 425 426 struct kvm_pmc { 427 enum pmc_type type; 428 u8 idx; 429 u64 counter; 430 u64 eventsel; 431 struct perf_event *perf_event; 432 struct kvm_vcpu *vcpu; 433 /* 434 * eventsel value for general purpose counters, 435 * ctrl value for fixed counters. 436 */ 437 u64 current_config; 438 }; 439 440 struct kvm_pmu { 441 unsigned nr_arch_gp_counters; 442 unsigned nr_arch_fixed_counters; 443 unsigned available_event_types; 444 u64 fixed_ctr_ctrl; 445 u64 global_ctrl; 446 u64 global_status; 447 u64 global_ovf_ctrl; 448 u64 counter_bitmask[2]; 449 u64 global_ctrl_mask; 450 u64 global_ovf_ctrl_mask; 451 u64 reserved_bits; 452 u8 version; 453 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 454 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED]; 455 struct irq_work irq_work; 456 DECLARE_BITMAP(reprogram_pmi, X86_PMC_IDX_MAX); 457 DECLARE_BITMAP(all_valid_pmc_idx, X86_PMC_IDX_MAX); 458 DECLARE_BITMAP(pmc_in_use, X86_PMC_IDX_MAX); 459 460 /* 461 * The gate to release perf_events not marked in 462 * pmc_in_use only once in a vcpu time slice. 463 */ 464 bool need_cleanup; 465 466 /* 467 * The total number of programmed perf_events and it helps to avoid 468 * redundant check before cleanup if guest don't use vPMU at all. 469 */ 470 u8 event_count; 471 }; 472 473 struct kvm_pmu_ops; 474 475 enum { 476 KVM_DEBUGREG_BP_ENABLED = 1, 477 KVM_DEBUGREG_WONT_EXIT = 2, 478 KVM_DEBUGREG_RELOAD = 4, 479 }; 480 481 struct kvm_mtrr_range { 482 u64 base; 483 u64 mask; 484 struct list_head node; 485 }; 486 487 struct kvm_mtrr { 488 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR]; 489 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION]; 490 u64 deftype; 491 492 struct list_head head; 493 }; 494 495 /* Hyper-V SynIC timer */ 496 struct kvm_vcpu_hv_stimer { 497 struct hrtimer timer; 498 int index; 499 union hv_stimer_config config; 500 u64 count; 501 u64 exp_time; 502 struct hv_message msg; 503 bool msg_pending; 504 }; 505 506 /* Hyper-V synthetic interrupt controller (SynIC)*/ 507 struct kvm_vcpu_hv_synic { 508 u64 version; 509 u64 control; 510 u64 msg_page; 511 u64 evt_page; 512 atomic64_t sint[HV_SYNIC_SINT_COUNT]; 513 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT]; 514 DECLARE_BITMAP(auto_eoi_bitmap, 256); 515 DECLARE_BITMAP(vec_bitmap, 256); 516 bool active; 517 bool dont_zero_synic_pages; 518 }; 519 520 /* Hyper-V per vcpu emulation context */ 521 struct kvm_vcpu_hv { 522 struct kvm_vcpu *vcpu; 523 u32 vp_index; 524 u64 hv_vapic; 525 s64 runtime_offset; 526 struct kvm_vcpu_hv_synic synic; 527 struct kvm_hyperv_exit exit; 528 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT]; 529 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT); 530 cpumask_t tlb_flush; 531 }; 532 533 /* Xen HVM per vcpu emulation context */ 534 struct kvm_vcpu_xen { 535 u64 hypercall_rip; 536 bool vcpu_info_set; 537 bool vcpu_time_info_set; 538 struct gfn_to_hva_cache vcpu_info_cache; 539 struct gfn_to_hva_cache vcpu_time_info_cache; 540 }; 541 542 struct kvm_vcpu_arch { 543 /* 544 * rip and regs accesses must go through 545 * kvm_{register,rip}_{read,write} functions. 546 */ 547 unsigned long regs[NR_VCPU_REGS]; 548 u32 regs_avail; 549 u32 regs_dirty; 550 551 unsigned long cr0; 552 unsigned long cr0_guest_owned_bits; 553 unsigned long cr2; 554 unsigned long cr3; 555 unsigned long cr4; 556 unsigned long cr4_guest_owned_bits; 557 unsigned long cr4_guest_rsvd_bits; 558 unsigned long cr8; 559 u32 host_pkru; 560 u32 pkru; 561 u32 hflags; 562 u64 efer; 563 u64 apic_base; 564 struct kvm_lapic *apic; /* kernel irqchip context */ 565 bool apicv_active; 566 bool load_eoi_exitmap_pending; 567 DECLARE_BITMAP(ioapic_handled_vectors, 256); 568 unsigned long apic_attention; 569 int32_t apic_arb_prio; 570 int mp_state; 571 u64 ia32_misc_enable_msr; 572 u64 smbase; 573 u64 smi_count; 574 bool tpr_access_reporting; 575 bool xsaves_enabled; 576 u64 ia32_xss; 577 u64 microcode_version; 578 u64 arch_capabilities; 579 u64 perf_capabilities; 580 581 /* 582 * Paging state of the vcpu 583 * 584 * If the vcpu runs in guest mode with two level paging this still saves 585 * the paging mode of the l1 guest. This context is always used to 586 * handle faults. 587 */ 588 struct kvm_mmu *mmu; 589 590 /* Non-nested MMU for L1 */ 591 struct kvm_mmu root_mmu; 592 593 /* L1 MMU when running nested */ 594 struct kvm_mmu guest_mmu; 595 596 /* 597 * Paging state of an L2 guest (used for nested npt) 598 * 599 * This context will save all necessary information to walk page tables 600 * of an L2 guest. This context is only initialized for page table 601 * walking and not for faulting since we never handle l2 page faults on 602 * the host. 603 */ 604 struct kvm_mmu nested_mmu; 605 606 /* 607 * Pointer to the mmu context currently used for 608 * gva_to_gpa translations. 609 */ 610 struct kvm_mmu *walk_mmu; 611 612 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 613 struct kvm_mmu_memory_cache mmu_shadow_page_cache; 614 struct kvm_mmu_memory_cache mmu_gfn_array_cache; 615 struct kvm_mmu_memory_cache mmu_page_header_cache; 616 617 /* 618 * QEMU userspace and the guest each have their own FPU state. 619 * In vcpu_run, we switch between the user and guest FPU contexts. 620 * While running a VCPU, the VCPU thread will have the guest FPU 621 * context. 622 * 623 * Note that while the PKRU state lives inside the fpu registers, 624 * it is switched out separately at VMENTER and VMEXIT time. The 625 * "guest_fpu" state here contains the guest FPU context, with the 626 * host PRKU bits. 627 */ 628 struct fpu *user_fpu; 629 struct fpu *guest_fpu; 630 631 u64 xcr0; 632 u64 guest_supported_xcr0; 633 634 struct kvm_pio_request pio; 635 void *pio_data; 636 void *guest_ins_data; 637 638 u8 event_exit_inst_len; 639 640 struct kvm_queued_exception { 641 bool pending; 642 bool injected; 643 bool has_error_code; 644 u8 nr; 645 u32 error_code; 646 unsigned long payload; 647 bool has_payload; 648 u8 nested_apf; 649 } exception; 650 651 struct kvm_queued_interrupt { 652 bool injected; 653 bool soft; 654 u8 nr; 655 } interrupt; 656 657 int halt_request; /* real mode on Intel only */ 658 659 int cpuid_nent; 660 struct kvm_cpuid_entry2 *cpuid_entries; 661 662 u64 reserved_gpa_bits; 663 int maxphyaddr; 664 int max_tdp_level; 665 666 /* emulate context */ 667 668 struct x86_emulate_ctxt *emulate_ctxt; 669 bool emulate_regs_need_sync_to_vcpu; 670 bool emulate_regs_need_sync_from_vcpu; 671 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 672 673 gpa_t time; 674 struct pvclock_vcpu_time_info hv_clock; 675 unsigned int hw_tsc_khz; 676 struct gfn_to_hva_cache pv_time; 677 bool pv_time_enabled; 678 /* set guest stopped flag in pvclock flags field */ 679 bool pvclock_set_guest_stopped_request; 680 681 struct { 682 u8 preempted; 683 u64 msr_val; 684 u64 last_steal; 685 struct gfn_to_pfn_cache cache; 686 } st; 687 688 u64 l1_tsc_offset; 689 u64 tsc_offset; 690 u64 last_guest_tsc; 691 u64 last_host_tsc; 692 u64 tsc_offset_adjustment; 693 u64 this_tsc_nsec; 694 u64 this_tsc_write; 695 u64 this_tsc_generation; 696 bool tsc_catchup; 697 bool tsc_always_catchup; 698 s8 virtual_tsc_shift; 699 u32 virtual_tsc_mult; 700 u32 virtual_tsc_khz; 701 s64 ia32_tsc_adjust_msr; 702 u64 msr_ia32_power_ctl; 703 u64 tsc_scaling_ratio; 704 705 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 706 unsigned nmi_pending; /* NMI queued after currently running handler */ 707 bool nmi_injected; /* Trying to inject an NMI this entry */ 708 bool smi_pending; /* SMI queued after currently running handler */ 709 710 struct kvm_mtrr mtrr_state; 711 u64 pat; 712 713 unsigned switch_db_regs; 714 unsigned long db[KVM_NR_DB_REGS]; 715 unsigned long dr6; 716 unsigned long dr7; 717 unsigned long eff_db[KVM_NR_DB_REGS]; 718 unsigned long guest_debug_dr7; 719 u64 msr_platform_info; 720 u64 msr_misc_features_enables; 721 722 u64 mcg_cap; 723 u64 mcg_status; 724 u64 mcg_ctl; 725 u64 mcg_ext_ctl; 726 u64 *mce_banks; 727 728 /* Cache MMIO info */ 729 u64 mmio_gva; 730 unsigned mmio_access; 731 gfn_t mmio_gfn; 732 u64 mmio_gen; 733 734 struct kvm_pmu pmu; 735 736 /* used for guest single stepping over the given code position */ 737 unsigned long singlestep_rip; 738 739 bool hyperv_enabled; 740 struct kvm_vcpu_hv *hyperv; 741 struct kvm_vcpu_xen xen; 742 743 cpumask_var_t wbinvd_dirty_mask; 744 745 unsigned long last_retry_eip; 746 unsigned long last_retry_addr; 747 748 struct { 749 bool halted; 750 gfn_t gfns[ASYNC_PF_PER_VCPU]; 751 struct gfn_to_hva_cache data; 752 u64 msr_en_val; /* MSR_KVM_ASYNC_PF_EN */ 753 u64 msr_int_val; /* MSR_KVM_ASYNC_PF_INT */ 754 u16 vec; 755 u32 id; 756 bool send_user_only; 757 u32 host_apf_flags; 758 unsigned long nested_apf_token; 759 bool delivery_as_pf_vmexit; 760 bool pageready_pending; 761 } apf; 762 763 /* OSVW MSRs (AMD only) */ 764 struct { 765 u64 length; 766 u64 status; 767 } osvw; 768 769 struct { 770 u64 msr_val; 771 struct gfn_to_hva_cache data; 772 } pv_eoi; 773 774 u64 msr_kvm_poll_control; 775 776 /* 777 * Indicates the guest is trying to write a gfn that contains one or 778 * more of the PTEs used to translate the write itself, i.e. the access 779 * is changing its own translation in the guest page tables. KVM exits 780 * to userspace if emulation of the faulting instruction fails and this 781 * flag is set, as KVM cannot make forward progress. 782 * 783 * If emulation fails for a write to guest page tables, KVM unprotects 784 * (zaps) the shadow page for the target gfn and resumes the guest to 785 * retry the non-emulatable instruction (on hardware). Unprotecting the 786 * gfn doesn't allow forward progress for a self-changing access because 787 * doing so also zaps the translation for the gfn, i.e. retrying the 788 * instruction will hit a !PRESENT fault, which results in a new shadow 789 * page and sends KVM back to square one. 790 */ 791 bool write_fault_to_shadow_pgtable; 792 793 /* set at EPT violation at this point */ 794 unsigned long exit_qualification; 795 796 /* pv related host specific info */ 797 struct { 798 bool pv_unhalted; 799 } pv; 800 801 int pending_ioapic_eoi; 802 int pending_external_vector; 803 804 /* be preempted when it's in kernel-mode(cpl=0) */ 805 bool preempted_in_kernel; 806 807 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */ 808 bool l1tf_flush_l1d; 809 810 /* Host CPU on which VM-entry was most recently attempted */ 811 unsigned int last_vmentry_cpu; 812 813 /* AMD MSRC001_0015 Hardware Configuration */ 814 u64 msr_hwcr; 815 816 /* pv related cpuid info */ 817 struct { 818 /* 819 * value of the eax register in the KVM_CPUID_FEATURES CPUID 820 * leaf. 821 */ 822 u32 features; 823 824 /* 825 * indicates whether pv emulation should be disabled if features 826 * are not present in the guest's cpuid 827 */ 828 bool enforce; 829 } pv_cpuid; 830 831 /* Protected Guests */ 832 bool guest_state_protected; 833 }; 834 835 struct kvm_lpage_info { 836 int disallow_lpage; 837 }; 838 839 struct kvm_arch_memory_slot { 840 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES]; 841 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 842 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX]; 843 }; 844 845 /* 846 * We use as the mode the number of bits allocated in the LDR for the 847 * logical processor ID. It happens that these are all powers of two. 848 * This makes it is very easy to detect cases where the APICs are 849 * configured for multiple modes; in that case, we cannot use the map and 850 * hence cannot use kvm_irq_delivery_to_apic_fast either. 851 */ 852 #define KVM_APIC_MODE_XAPIC_CLUSTER 4 853 #define KVM_APIC_MODE_XAPIC_FLAT 8 854 #define KVM_APIC_MODE_X2APIC 16 855 856 struct kvm_apic_map { 857 struct rcu_head rcu; 858 u8 mode; 859 u32 max_apic_id; 860 union { 861 struct kvm_lapic *xapic_flat_map[8]; 862 struct kvm_lapic *xapic_cluster_map[16][4]; 863 }; 864 struct kvm_lapic *phys_map[]; 865 }; 866 867 /* Hyper-V synthetic debugger (SynDbg)*/ 868 struct kvm_hv_syndbg { 869 struct { 870 u64 control; 871 u64 status; 872 u64 send_page; 873 u64 recv_page; 874 u64 pending_page; 875 } control; 876 u64 options; 877 }; 878 879 /* Hyper-V emulation context */ 880 struct kvm_hv { 881 struct mutex hv_lock; 882 u64 hv_guest_os_id; 883 u64 hv_hypercall; 884 u64 hv_tsc_page; 885 886 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */ 887 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS]; 888 u64 hv_crash_ctl; 889 890 struct ms_hyperv_tsc_page tsc_ref; 891 892 struct idr conn_to_evt; 893 894 u64 hv_reenlightenment_control; 895 u64 hv_tsc_emulation_control; 896 u64 hv_tsc_emulation_status; 897 898 /* How many vCPUs have VP index != vCPU index */ 899 atomic_t num_mismatched_vp_indexes; 900 901 struct hv_partition_assist_pg *hv_pa_pg; 902 struct kvm_hv_syndbg hv_syndbg; 903 }; 904 905 struct msr_bitmap_range { 906 u32 flags; 907 u32 nmsrs; 908 u32 base; 909 unsigned long *bitmap; 910 }; 911 912 /* Xen emulation context */ 913 struct kvm_xen { 914 bool long_mode; 915 bool shinfo_set; 916 u8 upcall_vector; 917 struct gfn_to_hva_cache shinfo_cache; 918 }; 919 920 enum kvm_irqchip_mode { 921 KVM_IRQCHIP_NONE, 922 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */ 923 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */ 924 }; 925 926 #define APICV_INHIBIT_REASON_DISABLE 0 927 #define APICV_INHIBIT_REASON_HYPERV 1 928 #define APICV_INHIBIT_REASON_NESTED 2 929 #define APICV_INHIBIT_REASON_IRQWIN 3 930 #define APICV_INHIBIT_REASON_PIT_REINJ 4 931 #define APICV_INHIBIT_REASON_X2APIC 5 932 933 struct kvm_arch { 934 unsigned long n_used_mmu_pages; 935 unsigned long n_requested_mmu_pages; 936 unsigned long n_max_mmu_pages; 937 unsigned int indirect_shadow_pages; 938 u8 mmu_valid_gen; 939 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 940 /* 941 * Hash table of struct kvm_mmu_page. 942 */ 943 struct list_head active_mmu_pages; 944 struct list_head zapped_obsolete_pages; 945 struct list_head lpage_disallowed_mmu_pages; 946 struct kvm_page_track_notifier_node mmu_sp_tracker; 947 struct kvm_page_track_notifier_head track_notifier_head; 948 949 struct list_head assigned_dev_head; 950 struct iommu_domain *iommu_domain; 951 bool iommu_noncoherent; 952 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA 953 atomic_t noncoherent_dma_count; 954 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE 955 atomic_t assigned_device_count; 956 struct kvm_pic *vpic; 957 struct kvm_ioapic *vioapic; 958 struct kvm_pit *vpit; 959 atomic_t vapics_in_nmi_mode; 960 struct mutex apic_map_lock; 961 struct kvm_apic_map *apic_map; 962 atomic_t apic_map_dirty; 963 964 bool apic_access_page_done; 965 unsigned long apicv_inhibit_reasons; 966 967 gpa_t wall_clock; 968 969 bool mwait_in_guest; 970 bool hlt_in_guest; 971 bool pause_in_guest; 972 bool cstate_in_guest; 973 974 unsigned long irq_sources_bitmap; 975 s64 kvmclock_offset; 976 raw_spinlock_t tsc_write_lock; 977 u64 last_tsc_nsec; 978 u64 last_tsc_write; 979 u32 last_tsc_khz; 980 u64 cur_tsc_nsec; 981 u64 cur_tsc_write; 982 u64 cur_tsc_offset; 983 u64 cur_tsc_generation; 984 int nr_vcpus_matched_tsc; 985 986 spinlock_t pvclock_gtod_sync_lock; 987 bool use_master_clock; 988 u64 master_kernel_ns; 989 u64 master_cycle_now; 990 struct delayed_work kvmclock_update_work; 991 struct delayed_work kvmclock_sync_work; 992 993 struct kvm_xen_hvm_config xen_hvm_config; 994 995 /* reads protected by irq_srcu, writes by irq_lock */ 996 struct hlist_head mask_notifier_list; 997 998 struct kvm_hv hyperv; 999 struct kvm_xen xen; 1000 1001 #ifdef CONFIG_KVM_MMU_AUDIT 1002 int audit_point; 1003 #endif 1004 1005 bool backwards_tsc_observed; 1006 bool boot_vcpu_runs_old_kvmclock; 1007 u32 bsp_vcpu_id; 1008 1009 u64 disabled_quirks; 1010 1011 enum kvm_irqchip_mode irqchip_mode; 1012 u8 nr_reserved_ioapic_pins; 1013 1014 bool disabled_lapic_found; 1015 1016 bool x2apic_format; 1017 bool x2apic_broadcast_quirk_disabled; 1018 1019 bool guest_can_read_msr_platform_info; 1020 bool exception_payload_enabled; 1021 1022 /* Deflect RDMSR and WRMSR to user space when they trigger a #GP */ 1023 u32 user_space_msr_mask; 1024 1025 struct { 1026 u8 count; 1027 bool default_allow:1; 1028 struct msr_bitmap_range ranges[16]; 1029 } msr_filter; 1030 1031 bool bus_lock_detection_enabled; 1032 1033 struct kvm_pmu_event_filter *pmu_event_filter; 1034 struct task_struct *nx_lpage_recovery_thread; 1035 1036 #ifdef CONFIG_X86_64 1037 /* 1038 * Whether the TDP MMU is enabled for this VM. This contains a 1039 * snapshot of the TDP MMU module parameter from when the VM was 1040 * created and remains unchanged for the life of the VM. If this is 1041 * true, TDP MMU handler functions will run for various MMU 1042 * operations. 1043 */ 1044 bool tdp_mmu_enabled; 1045 1046 /* 1047 * List of struct kvmp_mmu_pages being used as roots. 1048 * All struct kvm_mmu_pages in the list should have 1049 * tdp_mmu_page set. 1050 * All struct kvm_mmu_pages in the list should have a positive 1051 * root_count except when a thread holds the MMU lock and is removing 1052 * an entry from the list. 1053 */ 1054 struct list_head tdp_mmu_roots; 1055 1056 /* 1057 * List of struct kvmp_mmu_pages not being used as roots. 1058 * All struct kvm_mmu_pages in the list should have 1059 * tdp_mmu_page set and a root_count of 0. 1060 */ 1061 struct list_head tdp_mmu_pages; 1062 1063 /* 1064 * Protects accesses to the following fields when the MMU lock 1065 * is held in read mode: 1066 * - tdp_mmu_pages (above) 1067 * - the link field of struct kvm_mmu_pages used by the TDP MMU 1068 * - lpage_disallowed_mmu_pages 1069 * - the lpage_disallowed_link field of struct kvm_mmu_pages used 1070 * by the TDP MMU 1071 * It is acceptable, but not necessary, to acquire this lock when 1072 * the thread holds the MMU lock in write mode. 1073 */ 1074 spinlock_t tdp_mmu_pages_lock; 1075 #endif /* CONFIG_X86_64 */ 1076 }; 1077 1078 struct kvm_vm_stat { 1079 ulong mmu_shadow_zapped; 1080 ulong mmu_pte_write; 1081 ulong mmu_pde_zapped; 1082 ulong mmu_flooded; 1083 ulong mmu_recycled; 1084 ulong mmu_cache_miss; 1085 ulong mmu_unsync; 1086 ulong remote_tlb_flush; 1087 ulong lpages; 1088 ulong nx_lpage_splits; 1089 ulong max_mmu_page_hash_collisions; 1090 }; 1091 1092 struct kvm_vcpu_stat { 1093 u64 pf_fixed; 1094 u64 pf_guest; 1095 u64 tlb_flush; 1096 u64 invlpg; 1097 1098 u64 exits; 1099 u64 io_exits; 1100 u64 mmio_exits; 1101 u64 signal_exits; 1102 u64 irq_window_exits; 1103 u64 nmi_window_exits; 1104 u64 l1d_flush; 1105 u64 halt_exits; 1106 u64 halt_successful_poll; 1107 u64 halt_attempted_poll; 1108 u64 halt_poll_invalid; 1109 u64 halt_wakeup; 1110 u64 request_irq_exits; 1111 u64 irq_exits; 1112 u64 host_state_reload; 1113 u64 fpu_reload; 1114 u64 insn_emulation; 1115 u64 insn_emulation_fail; 1116 u64 hypercalls; 1117 u64 irq_injections; 1118 u64 nmi_injections; 1119 u64 req_event; 1120 u64 halt_poll_success_ns; 1121 u64 halt_poll_fail_ns; 1122 }; 1123 1124 struct x86_instruction_info; 1125 1126 struct msr_data { 1127 bool host_initiated; 1128 u32 index; 1129 u64 data; 1130 }; 1131 1132 struct kvm_lapic_irq { 1133 u32 vector; 1134 u16 delivery_mode; 1135 u16 dest_mode; 1136 bool level; 1137 u16 trig_mode; 1138 u32 shorthand; 1139 u32 dest_id; 1140 bool msi_redir_hint; 1141 }; 1142 1143 static inline u16 kvm_lapic_irq_dest_mode(bool dest_mode_logical) 1144 { 1145 return dest_mode_logical ? APIC_DEST_LOGICAL : APIC_DEST_PHYSICAL; 1146 } 1147 1148 struct kvm_x86_ops { 1149 int (*hardware_enable)(void); 1150 void (*hardware_disable)(void); 1151 void (*hardware_unsetup)(void); 1152 bool (*cpu_has_accelerated_tpr)(void); 1153 bool (*has_emulated_msr)(struct kvm *kvm, u32 index); 1154 void (*vcpu_after_set_cpuid)(struct kvm_vcpu *vcpu); 1155 1156 unsigned int vm_size; 1157 int (*vm_init)(struct kvm *kvm); 1158 void (*vm_destroy)(struct kvm *kvm); 1159 1160 /* Create, but do not attach this VCPU */ 1161 int (*vcpu_create)(struct kvm_vcpu *vcpu); 1162 void (*vcpu_free)(struct kvm_vcpu *vcpu); 1163 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event); 1164 1165 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); 1166 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 1167 void (*vcpu_put)(struct kvm_vcpu *vcpu); 1168 1169 void (*update_exception_bitmap)(struct kvm_vcpu *vcpu); 1170 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1171 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1172 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 1173 void (*get_segment)(struct kvm_vcpu *vcpu, 1174 struct kvm_segment *var, int seg); 1175 int (*get_cpl)(struct kvm_vcpu *vcpu); 1176 void (*set_segment)(struct kvm_vcpu *vcpu, 1177 struct kvm_segment *var, int seg); 1178 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 1179 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 1180 bool (*is_valid_cr4)(struct kvm_vcpu *vcpu, unsigned long cr0); 1181 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 1182 int (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 1183 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1184 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1185 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1186 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1187 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu); 1188 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 1189 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 1190 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 1191 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 1192 1193 void (*tlb_flush_all)(struct kvm_vcpu *vcpu); 1194 void (*tlb_flush_current)(struct kvm_vcpu *vcpu); 1195 int (*tlb_remote_flush)(struct kvm *kvm); 1196 int (*tlb_remote_flush_with_range)(struct kvm *kvm, 1197 struct kvm_tlb_range *range); 1198 1199 /* 1200 * Flush any TLB entries associated with the given GVA. 1201 * Does not need to flush GPA->HPA mappings. 1202 * Can potentially get non-canonical addresses through INVLPGs, which 1203 * the implementation may choose to ignore if appropriate. 1204 */ 1205 void (*tlb_flush_gva)(struct kvm_vcpu *vcpu, gva_t addr); 1206 1207 /* 1208 * Flush any TLB entries created by the guest. Like tlb_flush_gva(), 1209 * does not need to flush GPA->HPA mappings. 1210 */ 1211 void (*tlb_flush_guest)(struct kvm_vcpu *vcpu); 1212 1213 enum exit_fastpath_completion (*run)(struct kvm_vcpu *vcpu); 1214 int (*handle_exit)(struct kvm_vcpu *vcpu, 1215 enum exit_fastpath_completion exit_fastpath); 1216 int (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 1217 void (*update_emulated_instruction)(struct kvm_vcpu *vcpu); 1218 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 1219 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu); 1220 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 1221 unsigned char *hypercall_addr); 1222 void (*set_irq)(struct kvm_vcpu *vcpu); 1223 void (*set_nmi)(struct kvm_vcpu *vcpu); 1224 void (*queue_exception)(struct kvm_vcpu *vcpu); 1225 void (*cancel_injection)(struct kvm_vcpu *vcpu); 1226 int (*interrupt_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1227 int (*nmi_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1228 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 1229 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 1230 void (*enable_nmi_window)(struct kvm_vcpu *vcpu); 1231 void (*enable_irq_window)(struct kvm_vcpu *vcpu); 1232 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 1233 bool (*check_apicv_inhibit_reasons)(ulong bit); 1234 void (*pre_update_apicv_exec_ctrl)(struct kvm *kvm, bool activate); 1235 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu); 1236 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 1237 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr); 1238 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu); 1239 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 1240 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu); 1241 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu); 1242 int (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector); 1243 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 1244 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 1245 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr); 1246 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 1247 1248 void (*load_mmu_pgd)(struct kvm_vcpu *vcpu, unsigned long pgd, 1249 int pgd_level); 1250 1251 bool (*has_wbinvd_exit)(void); 1252 1253 /* Returns actual tsc_offset set in active VMCS */ 1254 u64 (*write_l1_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 1255 1256 /* 1257 * Retrieve somewhat arbitrary exit information. Intended to be used 1258 * only from within tracepoints to avoid VMREADs when tracing is off. 1259 */ 1260 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2, 1261 u32 *exit_int_info, u32 *exit_int_info_err_code); 1262 1263 int (*check_intercept)(struct kvm_vcpu *vcpu, 1264 struct x86_instruction_info *info, 1265 enum x86_intercept_stage stage, 1266 struct x86_exception *exception); 1267 void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu); 1268 1269 void (*request_immediate_exit)(struct kvm_vcpu *vcpu); 1270 1271 void (*sched_in)(struct kvm_vcpu *kvm, int cpu); 1272 1273 /* 1274 * Arch-specific dirty logging hooks. These hooks are only supposed to 1275 * be valid if the specific arch has hardware-accelerated dirty logging 1276 * mechanism. Currently only for PML on VMX. 1277 * 1278 * - slot_enable_log_dirty: 1279 * called when enabling log dirty mode for the slot. 1280 * - slot_disable_log_dirty: 1281 * called when disabling log dirty mode for the slot. 1282 * also called when slot is created with log dirty disabled. 1283 * - flush_log_dirty: 1284 * called before reporting dirty_bitmap to userspace. 1285 * - enable_log_dirty_pt_masked: 1286 * called when reenabling log dirty for the GFNs in the mask after 1287 * corresponding bits are cleared in slot->dirty_bitmap. 1288 */ 1289 void (*slot_enable_log_dirty)(struct kvm *kvm, 1290 struct kvm_memory_slot *slot); 1291 void (*slot_disable_log_dirty)(struct kvm *kvm, 1292 struct kvm_memory_slot *slot); 1293 void (*flush_log_dirty)(struct kvm *kvm); 1294 void (*enable_log_dirty_pt_masked)(struct kvm *kvm, 1295 struct kvm_memory_slot *slot, 1296 gfn_t offset, unsigned long mask); 1297 int (*cpu_dirty_log_size)(void); 1298 1299 /* pmu operations of sub-arch */ 1300 const struct kvm_pmu_ops *pmu_ops; 1301 const struct kvm_x86_nested_ops *nested_ops; 1302 1303 /* 1304 * Architecture specific hooks for vCPU blocking due to 1305 * HLT instruction. 1306 * Returns for .pre_block(): 1307 * - 0 means continue to block the vCPU. 1308 * - 1 means we cannot block the vCPU since some event 1309 * happens during this period, such as, 'ON' bit in 1310 * posted-interrupts descriptor is set. 1311 */ 1312 int (*pre_block)(struct kvm_vcpu *vcpu); 1313 void (*post_block)(struct kvm_vcpu *vcpu); 1314 1315 void (*vcpu_blocking)(struct kvm_vcpu *vcpu); 1316 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu); 1317 1318 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq, 1319 uint32_t guest_irq, bool set); 1320 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu); 1321 bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu); 1322 1323 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc, 1324 bool *expired); 1325 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu); 1326 1327 void (*setup_mce)(struct kvm_vcpu *vcpu); 1328 1329 int (*smi_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1330 int (*pre_enter_smm)(struct kvm_vcpu *vcpu, char *smstate); 1331 int (*pre_leave_smm)(struct kvm_vcpu *vcpu, const char *smstate); 1332 void (*enable_smi_window)(struct kvm_vcpu *vcpu); 1333 1334 int (*mem_enc_op)(struct kvm *kvm, void __user *argp); 1335 int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1336 int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1337 1338 int (*get_msr_feature)(struct kvm_msr_entry *entry); 1339 1340 bool (*can_emulate_instruction)(struct kvm_vcpu *vcpu, void *insn, int insn_len); 1341 1342 bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu); 1343 int (*enable_direct_tlbflush)(struct kvm_vcpu *vcpu); 1344 1345 void (*migrate_timers)(struct kvm_vcpu *vcpu); 1346 void (*msr_filter_changed)(struct kvm_vcpu *vcpu); 1347 int (*complete_emulated_msr)(struct kvm_vcpu *vcpu, int err); 1348 1349 void (*vcpu_deliver_sipi_vector)(struct kvm_vcpu *vcpu, u8 vector); 1350 }; 1351 1352 struct kvm_x86_nested_ops { 1353 int (*check_events)(struct kvm_vcpu *vcpu); 1354 bool (*hv_timer_pending)(struct kvm_vcpu *vcpu); 1355 int (*get_state)(struct kvm_vcpu *vcpu, 1356 struct kvm_nested_state __user *user_kvm_nested_state, 1357 unsigned user_data_size); 1358 int (*set_state)(struct kvm_vcpu *vcpu, 1359 struct kvm_nested_state __user *user_kvm_nested_state, 1360 struct kvm_nested_state *kvm_state); 1361 bool (*get_nested_state_pages)(struct kvm_vcpu *vcpu); 1362 int (*write_log_dirty)(struct kvm_vcpu *vcpu, gpa_t l2_gpa); 1363 1364 int (*enable_evmcs)(struct kvm_vcpu *vcpu, 1365 uint16_t *vmcs_version); 1366 uint16_t (*get_evmcs_version)(struct kvm_vcpu *vcpu); 1367 }; 1368 1369 struct kvm_x86_init_ops { 1370 int (*cpu_has_kvm_support)(void); 1371 int (*disabled_by_bios)(void); 1372 int (*check_processor_compatibility)(void); 1373 int (*hardware_setup)(void); 1374 1375 struct kvm_x86_ops *runtime_ops; 1376 }; 1377 1378 struct kvm_arch_async_pf { 1379 u32 token; 1380 gfn_t gfn; 1381 unsigned long cr3; 1382 bool direct_map; 1383 }; 1384 1385 extern u64 __read_mostly host_efer; 1386 extern bool __read_mostly allow_smaller_maxphyaddr; 1387 extern struct kvm_x86_ops kvm_x86_ops; 1388 1389 #define KVM_X86_OP(func) \ 1390 DECLARE_STATIC_CALL(kvm_x86_##func, *(((struct kvm_x86_ops *)0)->func)); 1391 #define KVM_X86_OP_NULL KVM_X86_OP 1392 #include <asm/kvm-x86-ops.h> 1393 1394 static inline void kvm_ops_static_call_update(void) 1395 { 1396 #define KVM_X86_OP(func) \ 1397 static_call_update(kvm_x86_##func, kvm_x86_ops.func); 1398 #define KVM_X86_OP_NULL KVM_X86_OP 1399 #include <asm/kvm-x86-ops.h> 1400 } 1401 1402 #define __KVM_HAVE_ARCH_VM_ALLOC 1403 static inline struct kvm *kvm_arch_alloc_vm(void) 1404 { 1405 return __vmalloc(kvm_x86_ops.vm_size, GFP_KERNEL_ACCOUNT | __GFP_ZERO); 1406 } 1407 void kvm_arch_free_vm(struct kvm *kvm); 1408 1409 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB 1410 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm) 1411 { 1412 if (kvm_x86_ops.tlb_remote_flush && 1413 !static_call(kvm_x86_tlb_remote_flush)(kvm)) 1414 return 0; 1415 else 1416 return -ENOTSUPP; 1417 } 1418 1419 int kvm_mmu_module_init(void); 1420 void kvm_mmu_module_exit(void); 1421 1422 void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 1423 int kvm_mmu_create(struct kvm_vcpu *vcpu); 1424 void kvm_mmu_init_vm(struct kvm *kvm); 1425 void kvm_mmu_uninit_vm(struct kvm *kvm); 1426 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, 1427 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask, 1428 u64 acc_track_mask, u64 me_mask); 1429 1430 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 1431 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 1432 struct kvm_memory_slot *memslot, 1433 int start_level); 1434 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 1435 const struct kvm_memory_slot *memslot); 1436 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 1437 struct kvm_memory_slot *memslot); 1438 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm, 1439 struct kvm_memory_slot *memslot); 1440 void kvm_mmu_slot_set_dirty(struct kvm *kvm, 1441 struct kvm_memory_slot *memslot); 1442 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm, 1443 struct kvm_memory_slot *slot, 1444 gfn_t gfn_offset, unsigned long mask); 1445 void kvm_mmu_zap_all(struct kvm *kvm); 1446 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen); 1447 unsigned long kvm_mmu_calculate_default_mmu_pages(struct kvm *kvm); 1448 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages); 1449 1450 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3); 1451 bool pdptrs_changed(struct kvm_vcpu *vcpu); 1452 1453 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 1454 const void *val, int bytes); 1455 1456 struct kvm_irq_mask_notifier { 1457 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked); 1458 int irq; 1459 struct hlist_node link; 1460 }; 1461 1462 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, 1463 struct kvm_irq_mask_notifier *kimn); 1464 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, 1465 struct kvm_irq_mask_notifier *kimn); 1466 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, 1467 bool mask); 1468 1469 extern bool tdp_enabled; 1470 1471 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 1472 1473 /* control of guest tsc rate supported? */ 1474 extern bool kvm_has_tsc_control; 1475 /* maximum supported tsc_khz for guests */ 1476 extern u32 kvm_max_guest_tsc_khz; 1477 /* number of bits of the fractional part of the TSC scaling ratio */ 1478 extern u8 kvm_tsc_scaling_ratio_frac_bits; 1479 /* maximum allowed value of TSC scaling ratio */ 1480 extern u64 kvm_max_tsc_scaling_ratio; 1481 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */ 1482 extern u64 kvm_default_tsc_scaling_ratio; 1483 /* bus lock detection supported? */ 1484 extern bool kvm_has_bus_lock_exit; 1485 1486 extern u64 kvm_mce_cap_supported; 1487 1488 /* 1489 * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing 1490 * userspace I/O) to indicate that the emulation context 1491 * should be resued as is, i.e. skip initialization of 1492 * emulation context, instruction fetch and decode. 1493 * 1494 * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware. 1495 * Indicates that only select instructions (tagged with 1496 * EmulateOnUD) should be emulated (to minimize the emulator 1497 * attack surface). See also EMULTYPE_TRAP_UD_FORCED. 1498 * 1499 * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to 1500 * decode the instruction length. For use *only* by 1501 * kvm_x86_ops.skip_emulated_instruction() implementations. 1502 * 1503 * EMULTYPE_ALLOW_RETRY_PF - Set when the emulator should resume the guest to 1504 * retry native execution under certain conditions, 1505 * Can only be set in conjunction with EMULTYPE_PF. 1506 * 1507 * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was 1508 * triggered by KVM's magic "force emulation" prefix, 1509 * which is opt in via module param (off by default). 1510 * Bypasses EmulateOnUD restriction despite emulating 1511 * due to an intercepted #UD (see EMULTYPE_TRAP_UD). 1512 * Used to test the full emulator from userspace. 1513 * 1514 * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware 1515 * backdoor emulation, which is opt in via module param. 1516 * VMware backoor emulation handles select instructions 1517 * and reinjects the #GP for all other cases. 1518 * 1519 * EMULTYPE_PF - Set when emulating MMIO by way of an intercepted #PF, in which 1520 * case the CR2/GPA value pass on the stack is valid. 1521 */ 1522 #define EMULTYPE_NO_DECODE (1 << 0) 1523 #define EMULTYPE_TRAP_UD (1 << 1) 1524 #define EMULTYPE_SKIP (1 << 2) 1525 #define EMULTYPE_ALLOW_RETRY_PF (1 << 3) 1526 #define EMULTYPE_TRAP_UD_FORCED (1 << 4) 1527 #define EMULTYPE_VMWARE_GP (1 << 5) 1528 #define EMULTYPE_PF (1 << 6) 1529 1530 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type); 1531 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu, 1532 void *insn, int insn_len); 1533 1534 void kvm_enable_efer_bits(u64); 1535 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 1536 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data, bool host_initiated); 1537 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data); 1538 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data); 1539 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu); 1540 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu); 1541 1542 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in); 1543 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 1544 int kvm_emulate_halt(struct kvm_vcpu *vcpu); 1545 int kvm_vcpu_halt(struct kvm_vcpu *vcpu); 1546 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu); 1547 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 1548 1549 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 1550 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 1551 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); 1552 1553 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 1554 int reason, bool has_error_code, u32 error_code); 1555 1556 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu); 1557 1558 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0); 1559 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4); 1560 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 1561 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 1562 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 1563 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 1564 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 1565 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 1566 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 1567 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 1568 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); 1569 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr); 1570 1571 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1572 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1573 1574 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 1575 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 1576 bool kvm_rdpmc(struct kvm_vcpu *vcpu); 1577 1578 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1579 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1580 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr, unsigned long payload); 1581 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1582 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1583 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 1584 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu, 1585 struct x86_exception *fault); 1586 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1587 gfn_t gfn, void *data, int offset, int len, 1588 u32 access); 1589 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 1590 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr); 1591 1592 static inline int __kvm_irq_line_state(unsigned long *irq_state, 1593 int irq_source_id, int level) 1594 { 1595 /* Logical OR for level trig interrupt */ 1596 if (level) 1597 __set_bit(irq_source_id, irq_state); 1598 else 1599 __clear_bit(irq_source_id, irq_state); 1600 1601 return !!(*irq_state); 1602 } 1603 1604 #define KVM_MMU_ROOT_CURRENT BIT(0) 1605 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i) 1606 #define KVM_MMU_ROOTS_ALL (~0UL) 1607 1608 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 1609 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 1610 1611 void kvm_inject_nmi(struct kvm_vcpu *vcpu); 1612 1613 void kvm_update_dr7(struct kvm_vcpu *vcpu); 1614 1615 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 1616 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); 1617 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); 1618 int kvm_mmu_load(struct kvm_vcpu *vcpu); 1619 void kvm_mmu_unload(struct kvm_vcpu *vcpu); 1620 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); 1621 void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1622 ulong roots_to_free); 1623 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1624 struct x86_exception *exception); 1625 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 1626 struct x86_exception *exception); 1627 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 1628 struct x86_exception *exception); 1629 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 1630 struct x86_exception *exception); 1631 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 1632 struct x86_exception *exception); 1633 1634 bool kvm_apicv_activated(struct kvm *kvm); 1635 void kvm_apicv_init(struct kvm *kvm, bool enable); 1636 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu); 1637 void kvm_request_apicv_update(struct kvm *kvm, bool activate, 1638 unsigned long bit); 1639 1640 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 1641 1642 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code, 1643 void *insn, int insn_len); 1644 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 1645 void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1646 gva_t gva, hpa_t root_hpa); 1647 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid); 1648 void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd, bool skip_tlb_flush, 1649 bool skip_mmu_sync); 1650 1651 void kvm_configure_mmu(bool enable_tdp, int tdp_max_root_level, 1652 int tdp_huge_page_level); 1653 1654 static inline u16 kvm_read_ldt(void) 1655 { 1656 u16 ldt; 1657 asm("sldt %0" : "=g"(ldt)); 1658 return ldt; 1659 } 1660 1661 static inline void kvm_load_ldt(u16 sel) 1662 { 1663 asm("lldt %0" : : "rm"(sel)); 1664 } 1665 1666 #ifdef CONFIG_X86_64 1667 static inline unsigned long read_msr(unsigned long msr) 1668 { 1669 u64 value; 1670 1671 rdmsrl(msr, value); 1672 return value; 1673 } 1674 #endif 1675 1676 static inline u32 get_rdx_init_val(void) 1677 { 1678 return 0x600; /* P6 family */ 1679 } 1680 1681 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 1682 { 1683 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 1684 } 1685 1686 #define TSS_IOPB_BASE_OFFSET 0x66 1687 #define TSS_BASE_SIZE 0x68 1688 #define TSS_IOPB_SIZE (65536 / 8) 1689 #define TSS_REDIRECTION_SIZE (256 / 8) 1690 #define RMODE_TSS_SIZE \ 1691 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 1692 1693 enum { 1694 TASK_SWITCH_CALL = 0, 1695 TASK_SWITCH_IRET = 1, 1696 TASK_SWITCH_JMP = 2, 1697 TASK_SWITCH_GATE = 3, 1698 }; 1699 1700 #define HF_GIF_MASK (1 << 0) 1701 #define HF_NMI_MASK (1 << 3) 1702 #define HF_IRET_MASK (1 << 4) 1703 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 1704 #define HF_SMM_MASK (1 << 6) 1705 #define HF_SMM_INSIDE_NMI_MASK (1 << 7) 1706 1707 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE 1708 #define KVM_ADDRESS_SPACE_NUM 2 1709 1710 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0) 1711 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm) 1712 1713 asmlinkage void kvm_spurious_fault(void); 1714 1715 /* 1716 * Hardware virtualization extension instructions may fault if a 1717 * reboot turns off virtualization while processes are running. 1718 * Usually after catching the fault we just panic; during reboot 1719 * instead the instruction is ignored. 1720 */ 1721 #define __kvm_handle_fault_on_reboot(insn) \ 1722 "666: \n\t" \ 1723 insn "\n\t" \ 1724 "jmp 668f \n\t" \ 1725 "667: \n\t" \ 1726 "1: \n\t" \ 1727 ".pushsection .discard.instr_begin \n\t" \ 1728 ".long 1b - . \n\t" \ 1729 ".popsection \n\t" \ 1730 "call kvm_spurious_fault \n\t" \ 1731 "1: \n\t" \ 1732 ".pushsection .discard.instr_end \n\t" \ 1733 ".long 1b - . \n\t" \ 1734 ".popsection \n\t" \ 1735 "668: \n\t" \ 1736 _ASM_EXTABLE(666b, 667b) 1737 1738 #define KVM_ARCH_WANT_MMU_NOTIFIER 1739 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end, 1740 unsigned flags); 1741 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); 1742 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 1743 int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); 1744 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1745 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1746 int kvm_cpu_has_extint(struct kvm_vcpu *v); 1747 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1748 int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1749 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event); 1750 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu); 1751 1752 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low, 1753 unsigned long ipi_bitmap_high, u32 min, 1754 unsigned long icr, int op_64_bit); 1755 1756 void kvm_define_user_return_msr(unsigned index, u32 msr); 1757 int kvm_set_user_return_msr(unsigned index, u64 val, u64 mask); 1758 1759 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc); 1760 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc); 1761 1762 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); 1763 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1764 1765 void kvm_make_mclock_inprogress_request(struct kvm *kvm); 1766 void kvm_make_scan_ioapic_request(struct kvm *kvm); 1767 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm, 1768 unsigned long *vcpu_bitmap); 1769 1770 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1771 struct kvm_async_pf *work); 1772 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1773 struct kvm_async_pf *work); 1774 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1775 struct kvm_async_pf *work); 1776 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu); 1777 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu); 1778 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1779 1780 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu); 1781 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1782 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu); 1783 1784 int kvm_is_in_guest(void); 1785 1786 void __user *__x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, 1787 u32 size); 1788 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu); 1789 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu); 1790 1791 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq, 1792 struct kvm_vcpu **dest_vcpu); 1793 1794 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e, 1795 struct kvm_lapic_irq *irq); 1796 1797 static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq) 1798 { 1799 /* We can only post Fixed and LowPrio IRQs */ 1800 return (irq->delivery_mode == APIC_DM_FIXED || 1801 irq->delivery_mode == APIC_DM_LOWEST); 1802 } 1803 1804 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) 1805 { 1806 static_call_cond(kvm_x86_vcpu_blocking)(vcpu); 1807 } 1808 1809 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) 1810 { 1811 static_call_cond(kvm_x86_vcpu_unblocking)(vcpu); 1812 } 1813 1814 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} 1815 1816 static inline int kvm_cpu_get_apicid(int mps_cpu) 1817 { 1818 #ifdef CONFIG_X86_LOCAL_APIC 1819 return default_cpu_present_to_apicid(mps_cpu); 1820 #else 1821 WARN_ON_ONCE(1); 1822 return BAD_APICID; 1823 #endif 1824 } 1825 1826 #define put_smstate(type, buf, offset, val) \ 1827 *(type *)((buf) + (offset) - 0x7e00) = val 1828 1829 #define GET_SMSTATE(type, buf, offset) \ 1830 (*(type *)((buf) + (offset) - 0x7e00)) 1831 1832 int kvm_cpu_dirty_log_size(void); 1833 1834 #endif /* _ASM_X86_KVM_HOST_H */ 1835