1*45051539SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 28a8f422dSSuresh Siddha /* 38a8f422dSSuresh Siddha * Copyright (C) 2012 Advanced Micro Devices, Inc. 48a8f422dSSuresh Siddha * Author: Joerg Roedel <joerg.roedel@amd.com> 58a8f422dSSuresh Siddha * 68a8f422dSSuresh Siddha * This header file contains the interface of the interrupt remapping code to 78a8f422dSSuresh Siddha * the x86 interrupt management code. 88a8f422dSSuresh Siddha */ 98a8f422dSSuresh Siddha 108a8f422dSSuresh Siddha #ifndef __X86_IRQ_REMAPPING_H 118a8f422dSSuresh Siddha #define __X86_IRQ_REMAPPING_H 128a8f422dSSuresh Siddha 13d746d1ebSJiang Liu #include <asm/irqdomain.h> 14947045a2SJiang Liu #include <asm/hw_irq.h> 15399988eeSSuresh Siddha #include <asm/io_apic.h> 168a8f422dSSuresh Siddha 1735d3d814SJoerg Roedel struct msi_msg; 18947045a2SJiang Liu struct irq_alloc_info; 1935d3d814SJoerg Roedel 206f281923SFeng Wu enum irq_remap_cap { 216f281923SFeng Wu IRQ_POSTING_CAP = 0, 226f281923SFeng Wu }; 236f281923SFeng Wu 24818b7587SSuravee Suthikulpanit enum { 25818b7587SSuravee Suthikulpanit IRQ_REMAP_XAPIC_MODE, 26818b7587SSuravee Suthikulpanit IRQ_REMAP_X2APIC_MODE, 27818b7587SSuravee Suthikulpanit }; 28818b7587SSuravee Suthikulpanit 2918cd52c4SPaolo Bonzini struct vcpu_data { 3018cd52c4SPaolo Bonzini u64 pi_desc_addr; /* Physical address of PI Descriptor */ 3118cd52c4SPaolo Bonzini u32 vector; /* Guest vector of the interrupt */ 3218cd52c4SPaolo Bonzini }; 3318cd52c4SPaolo Bonzini 34399988eeSSuresh Siddha #ifdef CONFIG_IRQ_REMAP 358a8f422dSSuresh Siddha 3626b86092SSohil Mehta extern raw_spinlock_t irq_2_ir_lock; 3726b86092SSohil Mehta 38959c870fSFeng Wu extern bool irq_remapping_cap(enum irq_remap_cap cap); 3903bbcb2eSNeil Horman extern void set_irq_remapping_broken(void); 408a8f422dSSuresh Siddha extern int irq_remapping_prepare(void); 418a8f422dSSuresh Siddha extern int irq_remapping_enable(void); 428a8f422dSSuresh Siddha extern void irq_remapping_disable(void); 438a8f422dSSuresh Siddha extern int irq_remapping_reenable(int); 448a8f422dSSuresh Siddha extern int irq_remap_enable_fault_handling(void); 456a9f5de2SJoerg Roedel extern void panic_if_irq_remap(const char *msg); 469b1b0e42SJoerg Roedel 47947045a2SJiang Liu /* Get parent irqdomain for interrupt remapping irqdomain */ arch_get_ir_parent_domain(void)48947045a2SJiang Liustatic inline struct irq_domain *arch_get_ir_parent_domain(void) 49947045a2SJiang Liu { 50947045a2SJiang Liu return x86_vector_domain; 51947045a2SJiang Liu } 52947045a2SJiang Liu 538a8f422dSSuresh Siddha #else /* CONFIG_IRQ_REMAP */ 548a8f422dSSuresh Siddha irq_remapping_cap(enum irq_remap_cap cap)55959c870fSFeng Wustatic inline bool irq_remapping_cap(enum irq_remap_cap cap) { return 0; } set_irq_remapping_broken(void)5603bbcb2eSNeil Hormanstatic inline void set_irq_remapping_broken(void) { } irq_remapping_prepare(void)578a8f422dSSuresh Siddhastatic inline int irq_remapping_prepare(void) { return -ENODEV; } irq_remapping_enable(void)588a8f422dSSuresh Siddhastatic inline int irq_remapping_enable(void) { return -ENODEV; } irq_remapping_disable(void)598a8f422dSSuresh Siddhastatic inline void irq_remapping_disable(void) { } irq_remapping_reenable(int eim)608a8f422dSSuresh Siddhastatic inline int irq_remapping_reenable(int eim) { return -ENODEV; } irq_remap_enable_fault_handling(void)618a8f422dSSuresh Siddhastatic inline int irq_remap_enable_fault_handling(void) { return -ENODEV; } 626a9f5de2SJoerg Roedel panic_if_irq_remap(const char * msg)636a9f5de2SJoerg Roedelstatic inline void panic_if_irq_remap(const char *msg) 646a9f5de2SJoerg Roedel { 656a9f5de2SJoerg Roedel } 669b1b0e42SJoerg Roedel 678a8f422dSSuresh Siddha #endif /* CONFIG_IRQ_REMAP */ 688a8f422dSSuresh Siddha #endif /* __X86_IRQ_REMAPPING_H */ 69