1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */
224cc12b1STakao Indoh #ifndef _ASM_X86_INTEL_PT_H
324cc12b1STakao Indoh #define _ASM_X86_INTEL_PT_H
424cc12b1STakao Indoh
5f6d079ceSChao Peng #define PT_CPUID_LEAVES 2
6163b0991SIngo Molnar #define PT_CPUID_REGS_NUM 4 /* number of registers (eax, ebx, ecx, edx) */
7f6d079ceSChao Peng
8f6d079ceSChao Peng enum pt_capabilities {
9f6d079ceSChao Peng PT_CAP_max_subleaf = 0,
10f6d079ceSChao Peng PT_CAP_cr3_filtering,
11f6d079ceSChao Peng PT_CAP_psb_cyc,
12f6d079ceSChao Peng PT_CAP_ip_filtering,
13f6d079ceSChao Peng PT_CAP_mtc,
14f6d079ceSChao Peng PT_CAP_ptwrite,
15f6d079ceSChao Peng PT_CAP_power_event_trace,
1628c24dedSAlexander Shishkin PT_CAP_event_trace,
17*161a9a33SAlexander Shishkin PT_CAP_tnt_disable,
18f6d079ceSChao Peng PT_CAP_topa_output,
19f6d079ceSChao Peng PT_CAP_topa_multiple_entries,
20f6d079ceSChao Peng PT_CAP_single_range_output,
21e0018afeSLuwei Kang PT_CAP_output_subsys,
22f6d079ceSChao Peng PT_CAP_payloads_lip,
23f6d079ceSChao Peng PT_CAP_num_address_ranges,
24f6d079ceSChao Peng PT_CAP_mtc_periods,
25f6d079ceSChao Peng PT_CAP_cycle_thresholds,
26f6d079ceSChao Peng PT_CAP_psb_periods,
27f6d079ceSChao Peng };
28f6d079ceSChao Peng
2924cc12b1STakao Indoh #if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_INTEL)
3024cc12b1STakao Indoh void cpu_emergency_stop_pt(void);
31f6d079ceSChao Peng extern u32 intel_pt_validate_hw_cap(enum pt_capabilities cap);
3261be2998SLuwei Kang extern u32 intel_pt_validate_cap(u32 *caps, enum pt_capabilities cap);
3342880f72SAlexander Shishkin extern int is_intel_pt_event(struct perf_event *event);
3424cc12b1STakao Indoh #else
cpu_emergency_stop_pt(void)3524cc12b1STakao Indoh static inline void cpu_emergency_stop_pt(void) {}
intel_pt_validate_hw_cap(enum pt_capabilities cap)36f6d079ceSChao Peng static inline u32 intel_pt_validate_hw_cap(enum pt_capabilities cap) { return 0; }
intel_pt_validate_cap(u32 * caps,enum pt_capabilities capability)3761be2998SLuwei Kang static inline u32 intel_pt_validate_cap(u32 *caps, enum pt_capabilities capability) { return 0; }
is_intel_pt_event(struct perf_event * event)3842880f72SAlexander Shishkin static inline int is_intel_pt_event(struct perf_event *event) { return 0; }
3924cc12b1STakao Indoh #endif
4024cc12b1STakao Indoh
4124cc12b1STakao Indoh #endif /* _ASM_X86_INTEL_PT_H */
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