11965aae3SH. Peter Anvin #ifndef _ASM_X86_I8259_H 21965aae3SH. Peter Anvin #define _ASM_X86_I8259_H 3bb898558SAl Viro 4bb898558SAl Viro #include <linux/delay.h> 5bb898558SAl Viro 6bb898558SAl Viro extern unsigned int cached_irq_mask; 7bb898558SAl Viro 8bb898558SAl Viro #define __byte(x, y) (((unsigned char *)&(y))[x]) 9bb898558SAl Viro #define cached_master_mask (__byte(0, cached_irq_mask)) 10bb898558SAl Viro #define cached_slave_mask (__byte(1, cached_irq_mask)) 11bb898558SAl Viro 12bb898558SAl Viro /* i8259A PIC registers */ 13bb898558SAl Viro #define PIC_MASTER_CMD 0x20 14bb898558SAl Viro #define PIC_MASTER_IMR 0x21 15bb898558SAl Viro #define PIC_MASTER_ISR PIC_MASTER_CMD 16bb898558SAl Viro #define PIC_MASTER_POLL PIC_MASTER_ISR 17bb898558SAl Viro #define PIC_MASTER_OCW3 PIC_MASTER_ISR 18bb898558SAl Viro #define PIC_SLAVE_CMD 0xa0 19bb898558SAl Viro #define PIC_SLAVE_IMR 0xa1 20bb898558SAl Viro 21bb898558SAl Viro /* i8259A PIC related value */ 22bb898558SAl Viro #define PIC_CASCADE_IR 2 23bb898558SAl Viro #define MASTER_ICW4_DEFAULT 0x01 24bb898558SAl Viro #define SLAVE_ICW4_DEFAULT 0x01 25bb898558SAl Viro #define PIC_ICW4_AEOI 2 26bb898558SAl Viro 27bb898558SAl Viro extern spinlock_t i8259A_lock; 28bb898558SAl Viro 29bb898558SAl Viro extern void init_8259A(int auto_eoi); 30bb898558SAl Viro extern void enable_8259A_irq(unsigned int irq); 31bb898558SAl Viro extern void disable_8259A_irq(unsigned int irq); 32bb898558SAl Viro extern unsigned int startup_8259A_irq(unsigned int irq); 33bb898558SAl Viro 34bb898558SAl Viro /* the PIC may need a careful delay on some platforms, hence specific calls */ 35bb898558SAl Viro static inline unsigned char inb_pic(unsigned int port) 36bb898558SAl Viro { 37bb898558SAl Viro unsigned char value = inb(port); 38bb898558SAl Viro 39bb898558SAl Viro /* 40bb898558SAl Viro * delay for some accesses to PIC on motherboard or in chipset 41bb898558SAl Viro * must be at least one microsecond, so be safe here: 42bb898558SAl Viro */ 43bb898558SAl Viro udelay(2); 44bb898558SAl Viro 45bb898558SAl Viro return value; 46bb898558SAl Viro } 47bb898558SAl Viro 48bb898558SAl Viro static inline void outb_pic(unsigned char value, unsigned int port) 49bb898558SAl Viro { 50bb898558SAl Viro outb(value, port); 51bb898558SAl Viro /* 52bb898558SAl Viro * delay for some accesses to PIC on motherboard or in chipset 53bb898558SAl Viro * must be at least one microsecond, so be safe here: 54bb898558SAl Viro */ 55bb898558SAl Viro udelay(2); 56bb898558SAl Viro } 57bb898558SAl Viro 58bb898558SAl Viro extern struct irq_chip i8259A_chip; 59bb898558SAl Viro 60*ef354866SJacob Pan struct legacy_pic { 61*ef354866SJacob Pan int nr_legacy_irqs; 62*ef354866SJacob Pan struct irq_chip *chip; 63*ef354866SJacob Pan void (*mask_all)(void); 64*ef354866SJacob Pan void (*restore_mask)(void); 65*ef354866SJacob Pan void (*init)(int auto_eoi); 66*ef354866SJacob Pan int (*irq_pending)(unsigned int irq); 67*ef354866SJacob Pan void (*make_irq)(unsigned int irq); 68*ef354866SJacob Pan }; 69*ef354866SJacob Pan 70*ef354866SJacob Pan extern struct legacy_pic *legacy_pic; 71*ef354866SJacob Pan extern struct legacy_pic null_legacy_pic; 72*ef354866SJacob Pan 73bb898558SAl Viro extern void mask_8259A(void); 74bb898558SAl Viro extern void unmask_8259A(void); 75bb898558SAl Viro 761965aae3SH. Peter Anvin #endif /* _ASM_X86_I8259_H */ 77