1*bb898558SAl Viro #ifndef ASM_X86__I8259_H 2*bb898558SAl Viro #define ASM_X86__I8259_H 3*bb898558SAl Viro 4*bb898558SAl Viro #include <linux/delay.h> 5*bb898558SAl Viro 6*bb898558SAl Viro extern unsigned int cached_irq_mask; 7*bb898558SAl Viro 8*bb898558SAl Viro #define __byte(x, y) (((unsigned char *)&(y))[x]) 9*bb898558SAl Viro #define cached_master_mask (__byte(0, cached_irq_mask)) 10*bb898558SAl Viro #define cached_slave_mask (__byte(1, cached_irq_mask)) 11*bb898558SAl Viro 12*bb898558SAl Viro /* i8259A PIC registers */ 13*bb898558SAl Viro #define PIC_MASTER_CMD 0x20 14*bb898558SAl Viro #define PIC_MASTER_IMR 0x21 15*bb898558SAl Viro #define PIC_MASTER_ISR PIC_MASTER_CMD 16*bb898558SAl Viro #define PIC_MASTER_POLL PIC_MASTER_ISR 17*bb898558SAl Viro #define PIC_MASTER_OCW3 PIC_MASTER_ISR 18*bb898558SAl Viro #define PIC_SLAVE_CMD 0xa0 19*bb898558SAl Viro #define PIC_SLAVE_IMR 0xa1 20*bb898558SAl Viro 21*bb898558SAl Viro /* i8259A PIC related value */ 22*bb898558SAl Viro #define PIC_CASCADE_IR 2 23*bb898558SAl Viro #define MASTER_ICW4_DEFAULT 0x01 24*bb898558SAl Viro #define SLAVE_ICW4_DEFAULT 0x01 25*bb898558SAl Viro #define PIC_ICW4_AEOI 2 26*bb898558SAl Viro 27*bb898558SAl Viro extern spinlock_t i8259A_lock; 28*bb898558SAl Viro 29*bb898558SAl Viro extern void init_8259A(int auto_eoi); 30*bb898558SAl Viro extern void enable_8259A_irq(unsigned int irq); 31*bb898558SAl Viro extern void disable_8259A_irq(unsigned int irq); 32*bb898558SAl Viro extern unsigned int startup_8259A_irq(unsigned int irq); 33*bb898558SAl Viro 34*bb898558SAl Viro /* the PIC may need a careful delay on some platforms, hence specific calls */ 35*bb898558SAl Viro static inline unsigned char inb_pic(unsigned int port) 36*bb898558SAl Viro { 37*bb898558SAl Viro unsigned char value = inb(port); 38*bb898558SAl Viro 39*bb898558SAl Viro /* 40*bb898558SAl Viro * delay for some accesses to PIC on motherboard or in chipset 41*bb898558SAl Viro * must be at least one microsecond, so be safe here: 42*bb898558SAl Viro */ 43*bb898558SAl Viro udelay(2); 44*bb898558SAl Viro 45*bb898558SAl Viro return value; 46*bb898558SAl Viro } 47*bb898558SAl Viro 48*bb898558SAl Viro static inline void outb_pic(unsigned char value, unsigned int port) 49*bb898558SAl Viro { 50*bb898558SAl Viro outb(value, port); 51*bb898558SAl Viro /* 52*bb898558SAl Viro * delay for some accesses to PIC on motherboard or in chipset 53*bb898558SAl Viro * must be at least one microsecond, so be safe here: 54*bb898558SAl Viro */ 55*bb898558SAl Viro udelay(2); 56*bb898558SAl Viro } 57*bb898558SAl Viro 58*bb898558SAl Viro extern struct irq_chip i8259A_chip; 59*bb898558SAl Viro 60*bb898558SAl Viro extern void mask_8259A(void); 61*bb898558SAl Viro extern void unmask_8259A(void); 62*bb898558SAl Viro 63*bb898558SAl Viro #endif /* ASM_X86__I8259_H */ 64