xref: /openbmc/linux/arch/x86/include/asm/hpet.h (revision cdd38c5f1ce4398ec58fec95904b75824daab7b5)
1*b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */
21965aae3SH. Peter Anvin #ifndef _ASM_X86_HPET_H
31965aae3SH. Peter Anvin #define _ASM_X86_HPET_H
4bb898558SAl Viro 
5bb898558SAl Viro #include <linux/msi.h>
6bb898558SAl Viro 
7bb898558SAl Viro #ifdef CONFIG_HPET_TIMER
8bb898558SAl Viro 
9bb898558SAl Viro #define HPET_MMAP_SIZE		1024
10bb898558SAl Viro 
11bb898558SAl Viro #define HPET_ID			0x000
12bb898558SAl Viro #define HPET_PERIOD		0x004
13bb898558SAl Viro #define HPET_CFG		0x010
14bb898558SAl Viro #define HPET_STATUS		0x020
15bb898558SAl Viro #define HPET_COUNTER		0x0f0
16bb898558SAl Viro 
17bb898558SAl Viro #define HPET_Tn_CFG(n)		(0x100 + 0x20 * n)
18bb898558SAl Viro #define HPET_Tn_CMP(n)		(0x108 + 0x20 * n)
19bb898558SAl Viro #define HPET_Tn_ROUTE(n)	(0x110 + 0x20 * n)
20bb898558SAl Viro 
21bb898558SAl Viro #define HPET_T0_CFG		0x100
22bb898558SAl Viro #define HPET_T0_CMP		0x108
23bb898558SAl Viro #define HPET_T0_ROUTE		0x110
24bb898558SAl Viro #define HPET_T1_CFG		0x120
25bb898558SAl Viro #define HPET_T1_CMP		0x128
26bb898558SAl Viro #define HPET_T1_ROUTE		0x130
27bb898558SAl Viro #define HPET_T2_CFG		0x140
28bb898558SAl Viro #define HPET_T2_CMP		0x148
29bb898558SAl Viro #define HPET_T2_ROUTE		0x150
30bb898558SAl Viro 
31bb898558SAl Viro #define HPET_ID_REV		0x000000ff
32bb898558SAl Viro #define HPET_ID_NUMBER		0x00001f00
33bb898558SAl Viro #define HPET_ID_64BIT		0x00002000
34bb898558SAl Viro #define HPET_ID_LEGSUP		0x00008000
35bb898558SAl Viro #define HPET_ID_VENDOR		0xffff0000
36bb898558SAl Viro #define	HPET_ID_NUMBER_SHIFT	8
37bb898558SAl Viro #define HPET_ID_VENDOR_SHIFT	16
38bb898558SAl Viro 
39bb898558SAl Viro #define HPET_CFG_ENABLE		0x001
40bb898558SAl Viro #define HPET_CFG_LEGACY		0x002
41bb898558SAl Viro #define	HPET_LEGACY_8254	2
42bb898558SAl Viro #define	HPET_LEGACY_RTC		8
43bb898558SAl Viro 
44bb898558SAl Viro #define HPET_TN_LEVEL		0x0002
45bb898558SAl Viro #define HPET_TN_ENABLE		0x0004
46bb898558SAl Viro #define HPET_TN_PERIODIC	0x0008
47bb898558SAl Viro #define HPET_TN_PERIODIC_CAP	0x0010
48bb898558SAl Viro #define HPET_TN_64BIT_CAP	0x0020
49bb898558SAl Viro #define HPET_TN_SETVAL		0x0040
50bb898558SAl Viro #define HPET_TN_32BIT		0x0100
51bb898558SAl Viro #define HPET_TN_ROUTE		0x3e00
52bb898558SAl Viro #define HPET_TN_FSB		0x4000
53bb898558SAl Viro #define HPET_TN_FSB_CAP		0x8000
54bb898558SAl Viro #define HPET_TN_ROUTE_SHIFT	9
55bb898558SAl Viro 
56bb898558SAl Viro /* Max HPET Period is 10^8 femto sec as in HPET spec */
57bb898558SAl Viro #define HPET_MAX_PERIOD		100000000UL
58bb898558SAl Viro /*
59bb898558SAl Viro  * Min HPET period is 10^5 femto sec just for safety. If it is less than this,
60bb898558SAl Viro  * then 32 bit HPET counter wrapsaround in less than 0.5 sec.
61bb898558SAl Viro  */
62bb898558SAl Viro #define HPET_MIN_PERIOD		100000UL
63bb898558SAl Viro 
64bb898558SAl Viro /* hpet memory map physical address */
65bb898558SAl Viro extern unsigned long hpet_address;
66bb898558SAl Viro extern unsigned long force_hpet_address;
673d45ac4bSJan Beulich extern bool boot_hpet_disable;
68c8bc6f3cSSuresh Siddha extern u8 hpet_blockid;
693d45ac4bSJan Beulich extern bool hpet_force_user;
703d45ac4bSJan Beulich extern bool hpet_msi_disable;
71bb898558SAl Viro extern int is_hpet_enabled(void);
72bb898558SAl Viro extern int hpet_enable(void);
73bb898558SAl Viro extern void hpet_disable(void);
745946fa3dSJan Beulich extern unsigned int hpet_readl(unsigned int a);
75bb898558SAl Viro extern void force_hpet_resume(void);
76bb898558SAl Viro 
77bb898558SAl Viro #ifdef CONFIG_HPET_EMULATE_RTC
78bb898558SAl Viro 
79bb898558SAl Viro #include <linux/interrupt.h>
80bb898558SAl Viro 
81bb898558SAl Viro typedef irqreturn_t (*rtc_irq_handler)(int interrupt, void *cookie);
82bb898558SAl Viro extern int hpet_mask_rtc_irq_bit(unsigned long bit_mask);
83bb898558SAl Viro extern int hpet_set_rtc_irq_bit(unsigned long bit_mask);
84bb898558SAl Viro extern int hpet_set_alarm_time(unsigned char hrs, unsigned char min,
85bb898558SAl Viro 			       unsigned char sec);
86bb898558SAl Viro extern int hpet_set_periodic_freq(unsigned long freq);
87bb898558SAl Viro extern int hpet_rtc_dropped_irq(void);
88bb898558SAl Viro extern int hpet_rtc_timer_init(void);
89bb898558SAl Viro extern irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id);
90bb898558SAl Viro extern int hpet_register_irq_handler(rtc_irq_handler handler);
91bb898558SAl Viro extern void hpet_unregister_irq_handler(rtc_irq_handler handler);
92bb898558SAl Viro 
93bb898558SAl Viro #endif /* CONFIG_HPET_EMULATE_RTC */
94bb898558SAl Viro 
95bb898558SAl Viro #else /* CONFIG_HPET_TIMER */
96bb898558SAl Viro 
hpet_enable(void)97bb898558SAl Viro static inline int hpet_enable(void) { return 0; }
is_hpet_enabled(void)98bb898558SAl Viro static inline int is_hpet_enabled(void) { return 0; }
99bb898558SAl Viro #define hpet_readl(a) 0
10071054d88SJoerg Roedel #define default_setup_hpet_msi	NULL
101bb898558SAl Viro 
102bb898558SAl Viro #endif
1031965aae3SH. Peter Anvin #endif /* _ASM_X86_HPET_H */
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