168091ee7SSuravee Suthikulpanit /* SPDX-License-Identifier: GPL-2.0 */ 268091ee7SSuravee Suthikulpanit #ifndef _ASM_X86_CACHEINFO_H 368091ee7SSuravee Suthikulpanit #define _ASM_X86_CACHEINFO_H 468091ee7SSuravee Suthikulpanit 545fa71f1SJuergen Gross /* Kernel controls MTRR and/or PAT MSRs. */ 645fa71f1SJuergen Gross extern unsigned int memory_caching_control; 745fa71f1SJuergen Gross #define CACHE_MTRR 0x01 845fa71f1SJuergen Gross #define CACHE_PAT 0x02 945fa71f1SJuergen Gross 10028c221eSYazen Ghannam void cacheinfo_amd_init_llc_id(struct cpuinfo_x86 *c, int cpu); 11028c221eSYazen Ghannam void cacheinfo_hygon_init_llc_id(struct cpuinfo_x86 *c, int cpu); 1268091ee7SSuravee Suthikulpanit 13d5f66d5dSJuergen Gross void cache_disable(void); 14d5f66d5dSJuergen Gross void cache_enable(void); 15955d0e08SJuergen Gross void set_cache_aps_delayed_init(bool val); 16955d0e08SJuergen Gross bool get_cache_aps_delayed_init(void); 17*0b9a6a8bSJuergen Gross void cache_bp_init(void); 18*0b9a6a8bSJuergen Gross void cache_bp_restore(void); 19*0b9a6a8bSJuergen Gross void cache_aps_init(void); 20d5f66d5dSJuergen Gross 2168091ee7SSuravee Suthikulpanit #endif /* _ASM_X86_CACHEINFO_H */ 22