xref: /openbmc/linux/arch/x86/crypto/sm3_avx_glue.c (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)
1*930ab34dSTianjia Zhang /* SPDX-License-Identifier: GPL-2.0-or-later */
2*930ab34dSTianjia Zhang /*
3*930ab34dSTianjia Zhang  * SM3 Secure Hash Algorithm, AVX assembler accelerated.
4*930ab34dSTianjia Zhang  * specified in: https://datatracker.ietf.org/doc/html/draft-sca-cfrg-sm3-02
5*930ab34dSTianjia Zhang  *
6*930ab34dSTianjia Zhang  * Copyright (C) 2021 Tianjia Zhang <tianjia.zhang@linux.alibaba.com>
7*930ab34dSTianjia Zhang  */
8*930ab34dSTianjia Zhang 
9*930ab34dSTianjia Zhang #define pr_fmt(fmt)	KBUILD_MODNAME ": " fmt
10*930ab34dSTianjia Zhang 
11*930ab34dSTianjia Zhang #include <crypto/internal/hash.h>
12*930ab34dSTianjia Zhang #include <crypto/internal/simd.h>
13*930ab34dSTianjia Zhang #include <linux/init.h>
14*930ab34dSTianjia Zhang #include <linux/module.h>
15*930ab34dSTianjia Zhang #include <linux/types.h>
16*930ab34dSTianjia Zhang #include <crypto/sm3.h>
17*930ab34dSTianjia Zhang #include <crypto/sm3_base.h>
18*930ab34dSTianjia Zhang #include <asm/simd.h>
19*930ab34dSTianjia Zhang 
20*930ab34dSTianjia Zhang asmlinkage void sm3_transform_avx(struct sm3_state *state,
21*930ab34dSTianjia Zhang 			const u8 *data, int nblocks);
22*930ab34dSTianjia Zhang 
sm3_avx_update(struct shash_desc * desc,const u8 * data,unsigned int len)23*930ab34dSTianjia Zhang static int sm3_avx_update(struct shash_desc *desc, const u8 *data,
24*930ab34dSTianjia Zhang 			 unsigned int len)
25*930ab34dSTianjia Zhang {
26*930ab34dSTianjia Zhang 	struct sm3_state *sctx = shash_desc_ctx(desc);
27*930ab34dSTianjia Zhang 
28*930ab34dSTianjia Zhang 	if (!crypto_simd_usable() ||
29*930ab34dSTianjia Zhang 			(sctx->count % SM3_BLOCK_SIZE) + len < SM3_BLOCK_SIZE) {
30*930ab34dSTianjia Zhang 		sm3_update(sctx, data, len);
31*930ab34dSTianjia Zhang 		return 0;
32*930ab34dSTianjia Zhang 	}
33*930ab34dSTianjia Zhang 
34*930ab34dSTianjia Zhang 	/*
35*930ab34dSTianjia Zhang 	 * Make sure struct sm3_state begins directly with the SM3
36*930ab34dSTianjia Zhang 	 * 256-bit internal state, as this is what the asm functions expect.
37*930ab34dSTianjia Zhang 	 */
38*930ab34dSTianjia Zhang 	BUILD_BUG_ON(offsetof(struct sm3_state, state) != 0);
39*930ab34dSTianjia Zhang 
40*930ab34dSTianjia Zhang 	kernel_fpu_begin();
41*930ab34dSTianjia Zhang 	sm3_base_do_update(desc, data, len, sm3_transform_avx);
42*930ab34dSTianjia Zhang 	kernel_fpu_end();
43*930ab34dSTianjia Zhang 
44*930ab34dSTianjia Zhang 	return 0;
45*930ab34dSTianjia Zhang }
46*930ab34dSTianjia Zhang 
sm3_avx_finup(struct shash_desc * desc,const u8 * data,unsigned int len,u8 * out)47*930ab34dSTianjia Zhang static int sm3_avx_finup(struct shash_desc *desc, const u8 *data,
48*930ab34dSTianjia Zhang 		      unsigned int len, u8 *out)
49*930ab34dSTianjia Zhang {
50*930ab34dSTianjia Zhang 	if (!crypto_simd_usable()) {
51*930ab34dSTianjia Zhang 		struct sm3_state *sctx = shash_desc_ctx(desc);
52*930ab34dSTianjia Zhang 
53*930ab34dSTianjia Zhang 		if (len)
54*930ab34dSTianjia Zhang 			sm3_update(sctx, data, len);
55*930ab34dSTianjia Zhang 
56*930ab34dSTianjia Zhang 		sm3_final(sctx, out);
57*930ab34dSTianjia Zhang 		return 0;
58*930ab34dSTianjia Zhang 	}
59*930ab34dSTianjia Zhang 
60*930ab34dSTianjia Zhang 	kernel_fpu_begin();
61*930ab34dSTianjia Zhang 	if (len)
62*930ab34dSTianjia Zhang 		sm3_base_do_update(desc, data, len, sm3_transform_avx);
63*930ab34dSTianjia Zhang 	sm3_base_do_finalize(desc, sm3_transform_avx);
64*930ab34dSTianjia Zhang 	kernel_fpu_end();
65*930ab34dSTianjia Zhang 
66*930ab34dSTianjia Zhang 	return sm3_base_finish(desc, out);
67*930ab34dSTianjia Zhang }
68*930ab34dSTianjia Zhang 
sm3_avx_final(struct shash_desc * desc,u8 * out)69*930ab34dSTianjia Zhang static int sm3_avx_final(struct shash_desc *desc, u8 *out)
70*930ab34dSTianjia Zhang {
71*930ab34dSTianjia Zhang 	if (!crypto_simd_usable()) {
72*930ab34dSTianjia Zhang 		sm3_final(shash_desc_ctx(desc), out);
73*930ab34dSTianjia Zhang 		return 0;
74*930ab34dSTianjia Zhang 	}
75*930ab34dSTianjia Zhang 
76*930ab34dSTianjia Zhang 	kernel_fpu_begin();
77*930ab34dSTianjia Zhang 	sm3_base_do_finalize(desc, sm3_transform_avx);
78*930ab34dSTianjia Zhang 	kernel_fpu_end();
79*930ab34dSTianjia Zhang 
80*930ab34dSTianjia Zhang 	return sm3_base_finish(desc, out);
81*930ab34dSTianjia Zhang }
82*930ab34dSTianjia Zhang 
83*930ab34dSTianjia Zhang static struct shash_alg sm3_avx_alg = {
84*930ab34dSTianjia Zhang 	.digestsize	=	SM3_DIGEST_SIZE,
85*930ab34dSTianjia Zhang 	.init		=	sm3_base_init,
86*930ab34dSTianjia Zhang 	.update		=	sm3_avx_update,
87*930ab34dSTianjia Zhang 	.final		=	sm3_avx_final,
88*930ab34dSTianjia Zhang 	.finup		=	sm3_avx_finup,
89*930ab34dSTianjia Zhang 	.descsize	=	sizeof(struct sm3_state),
90*930ab34dSTianjia Zhang 	.base		=	{
91*930ab34dSTianjia Zhang 		.cra_name	=	"sm3",
92*930ab34dSTianjia Zhang 		.cra_driver_name =	"sm3-avx",
93*930ab34dSTianjia Zhang 		.cra_priority	=	300,
94*930ab34dSTianjia Zhang 		.cra_blocksize	=	SM3_BLOCK_SIZE,
95*930ab34dSTianjia Zhang 		.cra_module	=	THIS_MODULE,
96*930ab34dSTianjia Zhang 	}
97*930ab34dSTianjia Zhang };
98*930ab34dSTianjia Zhang 
sm3_avx_mod_init(void)99*930ab34dSTianjia Zhang static int __init sm3_avx_mod_init(void)
100*930ab34dSTianjia Zhang {
101*930ab34dSTianjia Zhang 	const char *feature_name;
102*930ab34dSTianjia Zhang 
103*930ab34dSTianjia Zhang 	if (!boot_cpu_has(X86_FEATURE_AVX)) {
104*930ab34dSTianjia Zhang 		pr_info("AVX instruction are not detected.\n");
105*930ab34dSTianjia Zhang 		return -ENODEV;
106*930ab34dSTianjia Zhang 	}
107*930ab34dSTianjia Zhang 
108*930ab34dSTianjia Zhang 	if (!boot_cpu_has(X86_FEATURE_BMI2)) {
109*930ab34dSTianjia Zhang 		pr_info("BMI2 instruction are not detected.\n");
110*930ab34dSTianjia Zhang 		return -ENODEV;
111*930ab34dSTianjia Zhang 	}
112*930ab34dSTianjia Zhang 
113*930ab34dSTianjia Zhang 	if (!cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM,
114*930ab34dSTianjia Zhang 				&feature_name)) {
115*930ab34dSTianjia Zhang 		pr_info("CPU feature '%s' is not supported.\n", feature_name);
116*930ab34dSTianjia Zhang 		return -ENODEV;
117*930ab34dSTianjia Zhang 	}
118*930ab34dSTianjia Zhang 
119*930ab34dSTianjia Zhang 	return crypto_register_shash(&sm3_avx_alg);
120*930ab34dSTianjia Zhang }
121*930ab34dSTianjia Zhang 
sm3_avx_mod_exit(void)122*930ab34dSTianjia Zhang static void __exit sm3_avx_mod_exit(void)
123*930ab34dSTianjia Zhang {
124*930ab34dSTianjia Zhang 	crypto_unregister_shash(&sm3_avx_alg);
125*930ab34dSTianjia Zhang }
126*930ab34dSTianjia Zhang 
127*930ab34dSTianjia Zhang module_init(sm3_avx_mod_init);
128*930ab34dSTianjia Zhang module_exit(sm3_avx_mod_exit);
129*930ab34dSTianjia Zhang 
130*930ab34dSTianjia Zhang MODULE_LICENSE("GPL v2");
131*930ab34dSTianjia Zhang MODULE_AUTHOR("Tianjia Zhang <tianjia.zhang@linux.alibaba.com>");
132*930ab34dSTianjia Zhang MODULE_DESCRIPTION("SM3 Secure Hash Algorithm, AVX assembler accelerated");
133*930ab34dSTianjia Zhang MODULE_ALIAS_CRYPTO("sm3");
134*930ab34dSTianjia Zhang MODULE_ALIAS_CRYPTO("sm3-avx");
135