xref: /openbmc/linux/arch/x86/crypto/sha256_ssse3_glue.c (revision 1a445e8efaa4334457c4d1f48a5d1d829b503f0c)
18275d1aaSTim Chen /*
28275d1aaSTim Chen  * Cryptographic API.
38275d1aaSTim Chen  *
48275d1aaSTim Chen  * Glue code for the SHA256 Secure Hash Algorithm assembler
58275d1aaSTim Chen  * implementation using supplemental SSE3 / AVX / AVX2 instructions.
68275d1aaSTim Chen  *
78275d1aaSTim Chen  * This file is based on sha256_generic.c
88275d1aaSTim Chen  *
98275d1aaSTim Chen  * Copyright (C) 2013 Intel Corporation.
108275d1aaSTim Chen  *
118275d1aaSTim Chen  * Author:
128275d1aaSTim Chen  *     Tim Chen <tim.c.chen@linux.intel.com>
138275d1aaSTim Chen  *
148275d1aaSTim Chen  * This program is free software; you can redistribute it and/or modify it
158275d1aaSTim Chen  * under the terms of the GNU General Public License as published by the Free
168275d1aaSTim Chen  * Software Foundation; either version 2 of the License, or (at your option)
178275d1aaSTim Chen  * any later version.
188275d1aaSTim Chen  *
198275d1aaSTim Chen  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
208275d1aaSTim Chen  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
218275d1aaSTim Chen  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
228275d1aaSTim Chen  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
238275d1aaSTim Chen  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
248275d1aaSTim Chen  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
258275d1aaSTim Chen  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
268275d1aaSTim Chen  * SOFTWARE.
278275d1aaSTim Chen  */
288275d1aaSTim Chen 
298275d1aaSTim Chen 
308275d1aaSTim Chen #define pr_fmt(fmt)	KBUILD_MODNAME ": " fmt
318275d1aaSTim Chen 
328275d1aaSTim Chen #include <crypto/internal/hash.h>
338275d1aaSTim Chen #include <linux/init.h>
348275d1aaSTim Chen #include <linux/module.h>
358275d1aaSTim Chen #include <linux/mm.h>
368275d1aaSTim Chen #include <linux/cryptohash.h>
378275d1aaSTim Chen #include <linux/types.h>
388275d1aaSTim Chen #include <crypto/sha.h>
391631030aSArd Biesheuvel #include <crypto/sha256_base.h>
40df6b35f4SIngo Molnar #include <asm/fpu/api.h>
418275d1aaSTim Chen #include <linux/string.h>
428275d1aaSTim Chen 
431631030aSArd Biesheuvel asmlinkage void sha256_transform_ssse3(u32 *digest, const char *data,
448275d1aaSTim Chen 				       u64 rounds);
455dda42fcStim typedef void (sha256_transform_fn)(u32 *digest, const char *data, u64 rounds);
468275d1aaSTim Chen 
475dda42fcStim static int sha256_update(struct shash_desc *desc, const u8 *data,
485dda42fcStim 			 unsigned int len, sha256_transform_fn *sha256_xform)
498275d1aaSTim Chen {
508275d1aaSTim Chen 	struct sha256_state *sctx = shash_desc_ctx(desc);
518275d1aaSTim Chen 
521631030aSArd Biesheuvel 	if (!irq_fpu_usable() ||
531631030aSArd Biesheuvel 	    (sctx->count % SHA256_BLOCK_SIZE) + len < SHA256_BLOCK_SIZE)
541631030aSArd Biesheuvel 		return crypto_sha256_update(desc, data, len);
551631030aSArd Biesheuvel 
561631030aSArd Biesheuvel 	/* make sure casting to sha256_block_fn() is safe */
571631030aSArd Biesheuvel 	BUILD_BUG_ON(offsetof(struct sha256_state, state) != 0);
581631030aSArd Biesheuvel 
591631030aSArd Biesheuvel 	kernel_fpu_begin();
601631030aSArd Biesheuvel 	sha256_base_do_update(desc, data, len,
615dda42fcStim 			      (sha256_block_fn *)sha256_xform);
621631030aSArd Biesheuvel 	kernel_fpu_end();
638275d1aaSTim Chen 
648275d1aaSTim Chen 	return 0;
658275d1aaSTim Chen }
668275d1aaSTim Chen 
675dda42fcStim static int sha256_finup(struct shash_desc *desc, const u8 *data,
685dda42fcStim 	      unsigned int len, u8 *out, sha256_transform_fn *sha256_xform)
691631030aSArd Biesheuvel {
701631030aSArd Biesheuvel 	if (!irq_fpu_usable())
711631030aSArd Biesheuvel 		return crypto_sha256_finup(desc, data, len, out);
721631030aSArd Biesheuvel 
738275d1aaSTim Chen 	kernel_fpu_begin();
741631030aSArd Biesheuvel 	if (len)
751631030aSArd Biesheuvel 		sha256_base_do_update(desc, data, len,
765dda42fcStim 				      (sha256_block_fn *)sha256_xform);
775dda42fcStim 	sha256_base_do_finalize(desc, (sha256_block_fn *)sha256_xform);
788275d1aaSTim Chen 	kernel_fpu_end();
798275d1aaSTim Chen 
801631030aSArd Biesheuvel 	return sha256_base_finish(desc, out);
818275d1aaSTim Chen }
828275d1aaSTim Chen 
835dda42fcStim static int sha256_ssse3_update(struct shash_desc *desc, const u8 *data,
845dda42fcStim 			 unsigned int len)
855dda42fcStim {
865dda42fcStim 	return sha256_update(desc, data, len, sha256_transform_ssse3);
875dda42fcStim }
885dda42fcStim 
895dda42fcStim static int sha256_ssse3_finup(struct shash_desc *desc, const u8 *data,
905dda42fcStim 	      unsigned int len, u8 *out)
915dda42fcStim {
925dda42fcStim 	return sha256_finup(desc, data, len, out, sha256_transform_ssse3);
935dda42fcStim }
945dda42fcStim 
958275d1aaSTim Chen /* Add padding and return the message digest. */
968275d1aaSTim Chen static int sha256_ssse3_final(struct shash_desc *desc, u8 *out)
978275d1aaSTim Chen {
981631030aSArd Biesheuvel 	return sha256_ssse3_finup(desc, NULL, 0, out);
99a710f761SJussi Kivilinna }
100a710f761SJussi Kivilinna 
1015dda42fcStim static struct shash_alg sha256_ssse3_algs[] = { {
1028275d1aaSTim Chen 	.digestsize	=	SHA256_DIGEST_SIZE,
1031631030aSArd Biesheuvel 	.init		=	sha256_base_init,
1048275d1aaSTim Chen 	.update		=	sha256_ssse3_update,
1058275d1aaSTim Chen 	.final		=	sha256_ssse3_final,
1061631030aSArd Biesheuvel 	.finup		=	sha256_ssse3_finup,
1078275d1aaSTim Chen 	.descsize	=	sizeof(struct sha256_state),
1088275d1aaSTim Chen 	.base		=	{
1098275d1aaSTim Chen 		.cra_name	=	"sha256",
1108275d1aaSTim Chen 		.cra_driver_name =	"sha256-ssse3",
1118275d1aaSTim Chen 		.cra_priority	=	150,
1128275d1aaSTim Chen 		.cra_flags	=	CRYPTO_ALG_TYPE_SHASH,
1138275d1aaSTim Chen 		.cra_blocksize	=	SHA256_BLOCK_SIZE,
1148275d1aaSTim Chen 		.cra_module	=	THIS_MODULE,
1158275d1aaSTim Chen 	}
116a710f761SJussi Kivilinna }, {
117a710f761SJussi Kivilinna 	.digestsize	=	SHA224_DIGEST_SIZE,
1181631030aSArd Biesheuvel 	.init		=	sha224_base_init,
119a710f761SJussi Kivilinna 	.update		=	sha256_ssse3_update,
1201631030aSArd Biesheuvel 	.final		=	sha256_ssse3_final,
1211631030aSArd Biesheuvel 	.finup		=	sha256_ssse3_finup,
122a710f761SJussi Kivilinna 	.descsize	=	sizeof(struct sha256_state),
123a710f761SJussi Kivilinna 	.base		=	{
124a710f761SJussi Kivilinna 		.cra_name	=	"sha224",
125a710f761SJussi Kivilinna 		.cra_driver_name =	"sha224-ssse3",
126a710f761SJussi Kivilinna 		.cra_priority	=	150,
127a710f761SJussi Kivilinna 		.cra_flags	=	CRYPTO_ALG_TYPE_SHASH,
128a710f761SJussi Kivilinna 		.cra_blocksize	=	SHA224_BLOCK_SIZE,
129a710f761SJussi Kivilinna 		.cra_module	=	THIS_MODULE,
130a710f761SJussi Kivilinna 	}
131a710f761SJussi Kivilinna } };
1328275d1aaSTim Chen 
1335dda42fcStim static int register_sha256_ssse3(void)
1345dda42fcStim {
1355dda42fcStim 	if (boot_cpu_has(X86_FEATURE_SSSE3))
1365dda42fcStim 		return crypto_register_shashes(sha256_ssse3_algs,
1375dda42fcStim 				ARRAY_SIZE(sha256_ssse3_algs));
1385dda42fcStim 	return 0;
1395dda42fcStim }
1405dda42fcStim 
1415dda42fcStim static void unregister_sha256_ssse3(void)
1425dda42fcStim {
1435dda42fcStim 	if (boot_cpu_has(X86_FEATURE_SSSE3))
1445dda42fcStim 		crypto_unregister_shashes(sha256_ssse3_algs,
1455dda42fcStim 				ARRAY_SIZE(sha256_ssse3_algs));
1465dda42fcStim }
1475dda42fcStim 
1488275d1aaSTim Chen #ifdef CONFIG_AS_AVX
1495dda42fcStim asmlinkage void sha256_transform_avx(u32 *digest, const char *data,
1505dda42fcStim 				     u64 rounds);
1515dda42fcStim 
1525dda42fcStim static int sha256_avx_update(struct shash_desc *desc, const u8 *data,
1535dda42fcStim 			 unsigned int len)
1545dda42fcStim {
1555dda42fcStim 	return sha256_update(desc, data, len, sha256_transform_avx);
1565dda42fcStim }
1575dda42fcStim 
1585dda42fcStim static int sha256_avx_finup(struct shash_desc *desc, const u8 *data,
1595dda42fcStim 		      unsigned int len, u8 *out)
1605dda42fcStim {
1615dda42fcStim 	return sha256_finup(desc, data, len, out, sha256_transform_avx);
1625dda42fcStim }
1635dda42fcStim 
1645dda42fcStim static int sha256_avx_final(struct shash_desc *desc, u8 *out)
1655dda42fcStim {
1665dda42fcStim 	return sha256_avx_finup(desc, NULL, 0, out);
1675dda42fcStim }
1685dda42fcStim 
1695dda42fcStim static struct shash_alg sha256_avx_algs[] = { {
1705dda42fcStim 	.digestsize	=	SHA256_DIGEST_SIZE,
1715dda42fcStim 	.init		=	sha256_base_init,
1725dda42fcStim 	.update		=	sha256_avx_update,
1735dda42fcStim 	.final		=	sha256_avx_final,
1745dda42fcStim 	.finup		=	sha256_avx_finup,
1755dda42fcStim 	.descsize	=	sizeof(struct sha256_state),
1765dda42fcStim 	.base		=	{
1775dda42fcStim 		.cra_name	=	"sha256",
1785dda42fcStim 		.cra_driver_name =	"sha256-avx",
1795dda42fcStim 		.cra_priority	=	160,
1805dda42fcStim 		.cra_flags	=	CRYPTO_ALG_TYPE_SHASH,
1815dda42fcStim 		.cra_blocksize	=	SHA256_BLOCK_SIZE,
1825dda42fcStim 		.cra_module	=	THIS_MODULE,
1835dda42fcStim 	}
1845dda42fcStim }, {
1855dda42fcStim 	.digestsize	=	SHA224_DIGEST_SIZE,
1865dda42fcStim 	.init		=	sha224_base_init,
1875dda42fcStim 	.update		=	sha256_avx_update,
1885dda42fcStim 	.final		=	sha256_avx_final,
1895dda42fcStim 	.finup		=	sha256_avx_finup,
1905dda42fcStim 	.descsize	=	sizeof(struct sha256_state),
1915dda42fcStim 	.base		=	{
1925dda42fcStim 		.cra_name	=	"sha224",
1935dda42fcStim 		.cra_driver_name =	"sha224-avx",
1945dda42fcStim 		.cra_priority	=	160,
1955dda42fcStim 		.cra_flags	=	CRYPTO_ALG_TYPE_SHASH,
1965dda42fcStim 		.cra_blocksize	=	SHA224_BLOCK_SIZE,
1975dda42fcStim 		.cra_module	=	THIS_MODULE,
1985dda42fcStim 	}
1995dda42fcStim } };
2005dda42fcStim 
2015dda42fcStim static bool avx_usable(void)
2028275d1aaSTim Chen {
203d91cab78SDave Hansen 	if (!cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL)) {
204da154e82SBorislav Petkov 		if (boot_cpu_has(X86_FEATURE_AVX))
2058275d1aaSTim Chen 			pr_info("AVX detected but unusable.\n");
2068275d1aaSTim Chen 		return false;
2078275d1aaSTim Chen 	}
2088275d1aaSTim Chen 
2098275d1aaSTim Chen 	return true;
2108275d1aaSTim Chen }
2115dda42fcStim 
2125dda42fcStim static int register_sha256_avx(void)
2135dda42fcStim {
2145dda42fcStim 	if (avx_usable())
2155dda42fcStim 		return crypto_register_shashes(sha256_avx_algs,
2165dda42fcStim 				ARRAY_SIZE(sha256_avx_algs));
2175dda42fcStim 	return 0;
2185dda42fcStim }
2195dda42fcStim 
2205dda42fcStim static void unregister_sha256_avx(void)
2215dda42fcStim {
2225dda42fcStim 	if (avx_usable())
2235dda42fcStim 		crypto_unregister_shashes(sha256_avx_algs,
2245dda42fcStim 				ARRAY_SIZE(sha256_avx_algs));
2255dda42fcStim }
2265dda42fcStim 
2275dda42fcStim #else
2285dda42fcStim static inline int register_sha256_avx(void) { return 0; }
2295dda42fcStim static inline void unregister_sha256_avx(void) { }
2305dda42fcStim #endif
2315dda42fcStim 
2325dda42fcStim #if defined(CONFIG_AS_AVX2) && defined(CONFIG_AS_AVX)
2335dda42fcStim asmlinkage void sha256_transform_rorx(u32 *digest, const char *data,
2345dda42fcStim 				      u64 rounds);
2355dda42fcStim 
2365dda42fcStim static int sha256_avx2_update(struct shash_desc *desc, const u8 *data,
2375dda42fcStim 			 unsigned int len)
2385dda42fcStim {
2395dda42fcStim 	return sha256_update(desc, data, len, sha256_transform_rorx);
2405dda42fcStim }
2415dda42fcStim 
2425dda42fcStim static int sha256_avx2_finup(struct shash_desc *desc, const u8 *data,
2435dda42fcStim 		      unsigned int len, u8 *out)
2445dda42fcStim {
2455dda42fcStim 	return sha256_finup(desc, data, len, out, sha256_transform_rorx);
2465dda42fcStim }
2475dda42fcStim 
2485dda42fcStim static int sha256_avx2_final(struct shash_desc *desc, u8 *out)
2495dda42fcStim {
2505dda42fcStim 	return sha256_avx2_finup(desc, NULL, 0, out);
2515dda42fcStim }
2525dda42fcStim 
2535dda42fcStim static struct shash_alg sha256_avx2_algs[] = { {
2545dda42fcStim 	.digestsize	=	SHA256_DIGEST_SIZE,
2555dda42fcStim 	.init		=	sha256_base_init,
2565dda42fcStim 	.update		=	sha256_avx2_update,
2575dda42fcStim 	.final		=	sha256_avx2_final,
2585dda42fcStim 	.finup		=	sha256_avx2_finup,
2595dda42fcStim 	.descsize	=	sizeof(struct sha256_state),
2605dda42fcStim 	.base		=	{
2615dda42fcStim 		.cra_name	=	"sha256",
2625dda42fcStim 		.cra_driver_name =	"sha256-avx2",
2635dda42fcStim 		.cra_priority	=	170,
2645dda42fcStim 		.cra_flags	=	CRYPTO_ALG_TYPE_SHASH,
2655dda42fcStim 		.cra_blocksize	=	SHA256_BLOCK_SIZE,
2665dda42fcStim 		.cra_module	=	THIS_MODULE,
2675dda42fcStim 	}
2685dda42fcStim }, {
2695dda42fcStim 	.digestsize	=	SHA224_DIGEST_SIZE,
2705dda42fcStim 	.init		=	sha224_base_init,
2715dda42fcStim 	.update		=	sha256_avx2_update,
2725dda42fcStim 	.final		=	sha256_avx2_final,
2735dda42fcStim 	.finup		=	sha256_avx2_finup,
2745dda42fcStim 	.descsize	=	sizeof(struct sha256_state),
2755dda42fcStim 	.base		=	{
2765dda42fcStim 		.cra_name	=	"sha224",
2775dda42fcStim 		.cra_driver_name =	"sha224-avx2",
2785dda42fcStim 		.cra_priority	=	170,
2795dda42fcStim 		.cra_flags	=	CRYPTO_ALG_TYPE_SHASH,
2805dda42fcStim 		.cra_blocksize	=	SHA224_BLOCK_SIZE,
2815dda42fcStim 		.cra_module	=	THIS_MODULE,
2825dda42fcStim 	}
2835dda42fcStim } };
2845dda42fcStim 
2855dda42fcStim static bool avx2_usable(void)
2865dda42fcStim {
2875dda42fcStim 	if (avx_usable() && boot_cpu_has(X86_FEATURE_AVX2) &&
2885dda42fcStim 		    boot_cpu_has(X86_FEATURE_BMI2))
2895dda42fcStim 		return true;
2905dda42fcStim 
2915dda42fcStim 	return false;
2925dda42fcStim }
2935dda42fcStim 
2945dda42fcStim static int register_sha256_avx2(void)
2955dda42fcStim {
2965dda42fcStim 	if (avx2_usable())
2975dda42fcStim 		return crypto_register_shashes(sha256_avx2_algs,
2985dda42fcStim 				ARRAY_SIZE(sha256_avx2_algs));
2995dda42fcStim 	return 0;
3005dda42fcStim }
3015dda42fcStim 
3025dda42fcStim static void unregister_sha256_avx2(void)
3035dda42fcStim {
3045dda42fcStim 	if (avx2_usable())
3055dda42fcStim 		crypto_unregister_shashes(sha256_avx2_algs,
3065dda42fcStim 				ARRAY_SIZE(sha256_avx2_algs));
3075dda42fcStim }
3085dda42fcStim 
3095dda42fcStim #else
3105dda42fcStim static inline int register_sha256_avx2(void) { return 0; }
3115dda42fcStim static inline void unregister_sha256_avx2(void) { }
3125dda42fcStim #endif
3135dda42fcStim 
3145dda42fcStim #ifdef CONFIG_AS_SHA256_NI
3155dda42fcStim asmlinkage void sha256_ni_transform(u32 *digest, const char *data,
3165dda42fcStim 				   u64 rounds); /*unsigned int rounds);*/
3175dda42fcStim 
3185dda42fcStim static int sha256_ni_update(struct shash_desc *desc, const u8 *data,
3195dda42fcStim 			 unsigned int len)
3205dda42fcStim {
3215dda42fcStim 	return sha256_update(desc, data, len, sha256_ni_transform);
3225dda42fcStim }
3235dda42fcStim 
3245dda42fcStim static int sha256_ni_finup(struct shash_desc *desc, const u8 *data,
3255dda42fcStim 		      unsigned int len, u8 *out)
3265dda42fcStim {
3275dda42fcStim 	return sha256_finup(desc, data, len, out, sha256_ni_transform);
3285dda42fcStim }
3295dda42fcStim 
3305dda42fcStim static int sha256_ni_final(struct shash_desc *desc, u8 *out)
3315dda42fcStim {
3325dda42fcStim 	return sha256_ni_finup(desc, NULL, 0, out);
3335dda42fcStim }
3345dda42fcStim 
3355dda42fcStim static struct shash_alg sha256_ni_algs[] = { {
3365dda42fcStim 	.digestsize	=	SHA256_DIGEST_SIZE,
3375dda42fcStim 	.init		=	sha256_base_init,
3385dda42fcStim 	.update		=	sha256_ni_update,
3395dda42fcStim 	.final		=	sha256_ni_final,
3405dda42fcStim 	.finup		=	sha256_ni_finup,
3415dda42fcStim 	.descsize	=	sizeof(struct sha256_state),
3425dda42fcStim 	.base		=	{
3435dda42fcStim 		.cra_name	=	"sha256",
3445dda42fcStim 		.cra_driver_name =	"sha256-ni",
3455dda42fcStim 		.cra_priority	=	250,
3465dda42fcStim 		.cra_flags	=	CRYPTO_ALG_TYPE_SHASH,
3475dda42fcStim 		.cra_blocksize	=	SHA256_BLOCK_SIZE,
3485dda42fcStim 		.cra_module	=	THIS_MODULE,
3495dda42fcStim 	}
3505dda42fcStim }, {
3515dda42fcStim 	.digestsize	=	SHA224_DIGEST_SIZE,
3525dda42fcStim 	.init		=	sha224_base_init,
3535dda42fcStim 	.update		=	sha256_ni_update,
3545dda42fcStim 	.final		=	sha256_ni_final,
3555dda42fcStim 	.finup		=	sha256_ni_finup,
3565dda42fcStim 	.descsize	=	sizeof(struct sha256_state),
3575dda42fcStim 	.base		=	{
3585dda42fcStim 		.cra_name	=	"sha224",
3595dda42fcStim 		.cra_driver_name =	"sha224-ni",
3605dda42fcStim 		.cra_priority	=	250,
3615dda42fcStim 		.cra_flags	=	CRYPTO_ALG_TYPE_SHASH,
3625dda42fcStim 		.cra_blocksize	=	SHA224_BLOCK_SIZE,
3635dda42fcStim 		.cra_module	=	THIS_MODULE,
3645dda42fcStim 	}
3655dda42fcStim } };
3665dda42fcStim 
3675dda42fcStim static int register_sha256_ni(void)
3685dda42fcStim {
3695dda42fcStim 	if (boot_cpu_has(X86_FEATURE_SHA_NI))
3705dda42fcStim 		return crypto_register_shashes(sha256_ni_algs,
3715dda42fcStim 				ARRAY_SIZE(sha256_ni_algs));
3725dda42fcStim 	return 0;
3735dda42fcStim }
3745dda42fcStim 
3755dda42fcStim static void unregister_sha256_ni(void)
3765dda42fcStim {
3775dda42fcStim 	if (boot_cpu_has(X86_FEATURE_SHA_NI))
3785dda42fcStim 		crypto_unregister_shashes(sha256_ni_algs,
3795dda42fcStim 				ARRAY_SIZE(sha256_ni_algs));
3805dda42fcStim }
3815dda42fcStim 
3825dda42fcStim #else
3835dda42fcStim static inline int register_sha256_ni(void) { return 0; }
3845dda42fcStim static inline void unregister_sha256_ni(void) { }
3858275d1aaSTim Chen #endif
3868275d1aaSTim Chen 
3878275d1aaSTim Chen static int __init sha256_ssse3_mod_init(void)
3888275d1aaSTim Chen {
3895dda42fcStim 	if (register_sha256_ssse3())
3905dda42fcStim 		goto fail;
3918275d1aaSTim Chen 
3925dda42fcStim 	if (register_sha256_avx()) {
3935dda42fcStim 		unregister_sha256_ssse3();
3945dda42fcStim 		goto fail;
3958275d1aaSTim Chen 	}
3968275d1aaSTim Chen 
3975dda42fcStim 	if (register_sha256_avx2()) {
3985dda42fcStim 		unregister_sha256_avx();
3995dda42fcStim 		unregister_sha256_ssse3();
4005dda42fcStim 		goto fail;
4018275d1aaSTim Chen 	}
4028275d1aaSTim Chen 
4035dda42fcStim 	if (register_sha256_ni()) {
4045dda42fcStim 		unregister_sha256_avx2();
4055dda42fcStim 		unregister_sha256_avx();
4065dda42fcStim 		unregister_sha256_ssse3();
4075dda42fcStim 		goto fail;
4088275d1aaSTim Chen 	}
4098275d1aaSTim Chen 
4105dda42fcStim 	return 0;
4115dda42fcStim fail:
4128275d1aaSTim Chen 	return -ENODEV;
4138275d1aaSTim Chen }
4148275d1aaSTim Chen 
4158275d1aaSTim Chen static void __exit sha256_ssse3_mod_fini(void)
4168275d1aaSTim Chen {
4175dda42fcStim 	unregister_sha256_ni();
4185dda42fcStim 	unregister_sha256_avx2();
4195dda42fcStim 	unregister_sha256_avx();
4205dda42fcStim 	unregister_sha256_ssse3();
4218275d1aaSTim Chen }
4228275d1aaSTim Chen 
4238275d1aaSTim Chen module_init(sha256_ssse3_mod_init);
4248275d1aaSTim Chen module_exit(sha256_ssse3_mod_fini);
4258275d1aaSTim Chen 
4268275d1aaSTim Chen MODULE_LICENSE("GPL");
4278275d1aaSTim Chen MODULE_DESCRIPTION("SHA256 Secure Hash Algorithm, Supplemental SSE3 accelerated");
4288275d1aaSTim Chen 
4295d26a105SKees Cook MODULE_ALIAS_CRYPTO("sha256");
430*1a445e8eSStephan Mueller MODULE_ALIAS_CRYPTO("sha256-ssse3");
431*1a445e8eSStephan Mueller MODULE_ALIAS_CRYPTO("sha256-avx");
432*1a445e8eSStephan Mueller MODULE_ALIAS_CRYPTO("sha256-avx2");
4335d26a105SKees Cook MODULE_ALIAS_CRYPTO("sha224");
434*1a445e8eSStephan Mueller MODULE_ALIAS_CRYPTO("sha224-ssse3");
435*1a445e8eSStephan Mueller MODULE_ALIAS_CRYPTO("sha224-avx");
436*1a445e8eSStephan Mueller MODULE_ALIAS_CRYPTO("sha224-avx2");
437*1a445e8eSStephan Mueller #ifdef CONFIG_AS_SHA256_NI
438*1a445e8eSStephan Mueller MODULE_ALIAS_CRYPTO("sha256-ni");
439*1a445e8eSStephan Mueller MODULE_ALIAS_CRYPTO("sha224-ni");
440*1a445e8eSStephan Mueller #endif
441