18275d1aaSTim Chen /*
28275d1aaSTim Chen * Cryptographic API.
38275d1aaSTim Chen *
48275d1aaSTim Chen * Glue code for the SHA256 Secure Hash Algorithm assembler
58275d1aaSTim Chen * implementation using supplemental SSE3 / AVX / AVX2 instructions.
68275d1aaSTim Chen *
78275d1aaSTim Chen * This file is based on sha256_generic.c
88275d1aaSTim Chen *
98275d1aaSTim Chen * Copyright (C) 2013 Intel Corporation.
108275d1aaSTim Chen *
118275d1aaSTim Chen * Author:
128275d1aaSTim Chen * Tim Chen <tim.c.chen@linux.intel.com>
138275d1aaSTim Chen *
148275d1aaSTim Chen * This program is free software; you can redistribute it and/or modify it
158275d1aaSTim Chen * under the terms of the GNU General Public License as published by the Free
168275d1aaSTim Chen * Software Foundation; either version 2 of the License, or (at your option)
178275d1aaSTim Chen * any later version.
188275d1aaSTim Chen *
198275d1aaSTim Chen * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
208275d1aaSTim Chen * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
218275d1aaSTim Chen * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
228275d1aaSTim Chen * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
238275d1aaSTim Chen * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
248275d1aaSTim Chen * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
258275d1aaSTim Chen * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
268275d1aaSTim Chen * SOFTWARE.
278275d1aaSTim Chen */
288275d1aaSTim Chen
298275d1aaSTim Chen
308275d1aaSTim Chen #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
318275d1aaSTim Chen
328275d1aaSTim Chen #include <crypto/internal/hash.h>
33f2abe0d7SEric Biggers #include <crypto/internal/simd.h>
348275d1aaSTim Chen #include <linux/init.h>
358275d1aaSTim Chen #include <linux/module.h>
368275d1aaSTim Chen #include <linux/mm.h>
378275d1aaSTim Chen #include <linux/types.h>
38a24d22b2SEric Biggers #include <crypto/sha2.h>
391631030aSArd Biesheuvel #include <crypto/sha256_base.h>
408275d1aaSTim Chen #include <linux/string.h>
41*20b951fcSRoxana Nicolescu #include <asm/cpu_device_id.h>
42f2abe0d7SEric Biggers #include <asm/simd.h>
438275d1aaSTim Chen
4441419a28SKees Cook asmlinkage void sha256_transform_ssse3(struct sha256_state *state,
4541419a28SKees Cook const u8 *data, int blocks);
468275d1aaSTim Chen
47*20b951fcSRoxana Nicolescu static const struct x86_cpu_id module_cpu_ids[] = {
48*20b951fcSRoxana Nicolescu X86_MATCH_FEATURE(X86_FEATURE_AVX2, NULL),
49*20b951fcSRoxana Nicolescu X86_MATCH_FEATURE(X86_FEATURE_AVX, NULL),
50*20b951fcSRoxana Nicolescu X86_MATCH_FEATURE(X86_FEATURE_SSSE3, NULL),
51*20b951fcSRoxana Nicolescu {}
52*20b951fcSRoxana Nicolescu };
53*20b951fcSRoxana Nicolescu MODULE_DEVICE_TABLE(x86cpu, module_cpu_ids);
54*20b951fcSRoxana Nicolescu
_sha256_update(struct shash_desc * desc,const u8 * data,unsigned int len,sha256_block_fn * sha256_xform)55eb7d6ba8SHans de Goede static int _sha256_update(struct shash_desc *desc, const u8 *data,
5641419a28SKees Cook unsigned int len, sha256_block_fn *sha256_xform)
578275d1aaSTim Chen {
588275d1aaSTim Chen struct sha256_state *sctx = shash_desc_ctx(desc);
598275d1aaSTim Chen
60f2abe0d7SEric Biggers if (!crypto_simd_usable() ||
611631030aSArd Biesheuvel (sctx->count % SHA256_BLOCK_SIZE) + len < SHA256_BLOCK_SIZE)
621631030aSArd Biesheuvel return crypto_sha256_update(desc, data, len);
631631030aSArd Biesheuvel
6441419a28SKees Cook /*
6541419a28SKees Cook * Make sure struct sha256_state begins directly with the SHA256
6641419a28SKees Cook * 256-bit internal state, as this is what the asm functions expect.
6741419a28SKees Cook */
681631030aSArd Biesheuvel BUILD_BUG_ON(offsetof(struct sha256_state, state) != 0);
691631030aSArd Biesheuvel
701631030aSArd Biesheuvel kernel_fpu_begin();
7141419a28SKees Cook sha256_base_do_update(desc, data, len, sha256_xform);
721631030aSArd Biesheuvel kernel_fpu_end();
738275d1aaSTim Chen
748275d1aaSTim Chen return 0;
758275d1aaSTim Chen }
768275d1aaSTim Chen
sha256_finup(struct shash_desc * desc,const u8 * data,unsigned int len,u8 * out,sha256_block_fn * sha256_xform)775dda42fcStim static int sha256_finup(struct shash_desc *desc, const u8 *data,
7841419a28SKees Cook unsigned int len, u8 *out, sha256_block_fn *sha256_xform)
791631030aSArd Biesheuvel {
80f2abe0d7SEric Biggers if (!crypto_simd_usable())
811631030aSArd Biesheuvel return crypto_sha256_finup(desc, data, len, out);
821631030aSArd Biesheuvel
838275d1aaSTim Chen kernel_fpu_begin();
841631030aSArd Biesheuvel if (len)
8541419a28SKees Cook sha256_base_do_update(desc, data, len, sha256_xform);
8641419a28SKees Cook sha256_base_do_finalize(desc, sha256_xform);
878275d1aaSTim Chen kernel_fpu_end();
888275d1aaSTim Chen
891631030aSArd Biesheuvel return sha256_base_finish(desc, out);
908275d1aaSTim Chen }
918275d1aaSTim Chen
sha256_ssse3_update(struct shash_desc * desc,const u8 * data,unsigned int len)925dda42fcStim static int sha256_ssse3_update(struct shash_desc *desc, const u8 *data,
935dda42fcStim unsigned int len)
945dda42fcStim {
95eb7d6ba8SHans de Goede return _sha256_update(desc, data, len, sha256_transform_ssse3);
965dda42fcStim }
975dda42fcStim
sha256_ssse3_finup(struct shash_desc * desc,const u8 * data,unsigned int len,u8 * out)985dda42fcStim static int sha256_ssse3_finup(struct shash_desc *desc, const u8 *data,
995dda42fcStim unsigned int len, u8 *out)
1005dda42fcStim {
1015dda42fcStim return sha256_finup(desc, data, len, out, sha256_transform_ssse3);
1025dda42fcStim }
1035dda42fcStim
1048275d1aaSTim Chen /* Add padding and return the message digest. */
sha256_ssse3_final(struct shash_desc * desc,u8 * out)1058275d1aaSTim Chen static int sha256_ssse3_final(struct shash_desc *desc, u8 *out)
1068275d1aaSTim Chen {
1071631030aSArd Biesheuvel return sha256_ssse3_finup(desc, NULL, 0, out);
108a710f761SJussi Kivilinna }
109a710f761SJussi Kivilinna
1105dda42fcStim static struct shash_alg sha256_ssse3_algs[] = { {
1118275d1aaSTim Chen .digestsize = SHA256_DIGEST_SIZE,
1121631030aSArd Biesheuvel .init = sha256_base_init,
1138275d1aaSTim Chen .update = sha256_ssse3_update,
1148275d1aaSTim Chen .final = sha256_ssse3_final,
1151631030aSArd Biesheuvel .finup = sha256_ssse3_finup,
1168275d1aaSTim Chen .descsize = sizeof(struct sha256_state),
1178275d1aaSTim Chen .base = {
1188275d1aaSTim Chen .cra_name = "sha256",
1198275d1aaSTim Chen .cra_driver_name = "sha256-ssse3",
1208275d1aaSTim Chen .cra_priority = 150,
1218275d1aaSTim Chen .cra_blocksize = SHA256_BLOCK_SIZE,
1228275d1aaSTim Chen .cra_module = THIS_MODULE,
1238275d1aaSTim Chen }
124a710f761SJussi Kivilinna }, {
125a710f761SJussi Kivilinna .digestsize = SHA224_DIGEST_SIZE,
1261631030aSArd Biesheuvel .init = sha224_base_init,
127a710f761SJussi Kivilinna .update = sha256_ssse3_update,
1281631030aSArd Biesheuvel .final = sha256_ssse3_final,
1291631030aSArd Biesheuvel .finup = sha256_ssse3_finup,
130a710f761SJussi Kivilinna .descsize = sizeof(struct sha256_state),
131a710f761SJussi Kivilinna .base = {
132a710f761SJussi Kivilinna .cra_name = "sha224",
133a710f761SJussi Kivilinna .cra_driver_name = "sha224-ssse3",
134a710f761SJussi Kivilinna .cra_priority = 150,
135a710f761SJussi Kivilinna .cra_blocksize = SHA224_BLOCK_SIZE,
136a710f761SJussi Kivilinna .cra_module = THIS_MODULE,
137a710f761SJussi Kivilinna }
138a710f761SJussi Kivilinna } };
1398275d1aaSTim Chen
register_sha256_ssse3(void)1405dda42fcStim static int register_sha256_ssse3(void)
1415dda42fcStim {
1425dda42fcStim if (boot_cpu_has(X86_FEATURE_SSSE3))
1435dda42fcStim return crypto_register_shashes(sha256_ssse3_algs,
1445dda42fcStim ARRAY_SIZE(sha256_ssse3_algs));
1455dda42fcStim return 0;
1465dda42fcStim }
1475dda42fcStim
unregister_sha256_ssse3(void)1485dda42fcStim static void unregister_sha256_ssse3(void)
1495dda42fcStim {
1505dda42fcStim if (boot_cpu_has(X86_FEATURE_SSSE3))
1515dda42fcStim crypto_unregister_shashes(sha256_ssse3_algs,
1525dda42fcStim ARRAY_SIZE(sha256_ssse3_algs));
1535dda42fcStim }
1545dda42fcStim
15541419a28SKees Cook asmlinkage void sha256_transform_avx(struct sha256_state *state,
15641419a28SKees Cook const u8 *data, int blocks);
1575dda42fcStim
sha256_avx_update(struct shash_desc * desc,const u8 * data,unsigned int len)1585dda42fcStim static int sha256_avx_update(struct shash_desc *desc, const u8 *data,
1595dda42fcStim unsigned int len)
1605dda42fcStim {
161eb7d6ba8SHans de Goede return _sha256_update(desc, data, len, sha256_transform_avx);
1625dda42fcStim }
1635dda42fcStim
sha256_avx_finup(struct shash_desc * desc,const u8 * data,unsigned int len,u8 * out)1645dda42fcStim static int sha256_avx_finup(struct shash_desc *desc, const u8 *data,
1655dda42fcStim unsigned int len, u8 *out)
1665dda42fcStim {
1675dda42fcStim return sha256_finup(desc, data, len, out, sha256_transform_avx);
1685dda42fcStim }
1695dda42fcStim
sha256_avx_final(struct shash_desc * desc,u8 * out)1705dda42fcStim static int sha256_avx_final(struct shash_desc *desc, u8 *out)
1715dda42fcStim {
1725dda42fcStim return sha256_avx_finup(desc, NULL, 0, out);
1735dda42fcStim }
1745dda42fcStim
1755dda42fcStim static struct shash_alg sha256_avx_algs[] = { {
1765dda42fcStim .digestsize = SHA256_DIGEST_SIZE,
1775dda42fcStim .init = sha256_base_init,
1785dda42fcStim .update = sha256_avx_update,
1795dda42fcStim .final = sha256_avx_final,
1805dda42fcStim .finup = sha256_avx_finup,
1815dda42fcStim .descsize = sizeof(struct sha256_state),
1825dda42fcStim .base = {
1835dda42fcStim .cra_name = "sha256",
1845dda42fcStim .cra_driver_name = "sha256-avx",
1855dda42fcStim .cra_priority = 160,
1865dda42fcStim .cra_blocksize = SHA256_BLOCK_SIZE,
1875dda42fcStim .cra_module = THIS_MODULE,
1885dda42fcStim }
1895dda42fcStim }, {
1905dda42fcStim .digestsize = SHA224_DIGEST_SIZE,
1915dda42fcStim .init = sha224_base_init,
1925dda42fcStim .update = sha256_avx_update,
1935dda42fcStim .final = sha256_avx_final,
1945dda42fcStim .finup = sha256_avx_finup,
1955dda42fcStim .descsize = sizeof(struct sha256_state),
1965dda42fcStim .base = {
1975dda42fcStim .cra_name = "sha224",
1985dda42fcStim .cra_driver_name = "sha224-avx",
1995dda42fcStim .cra_priority = 160,
2005dda42fcStim .cra_blocksize = SHA224_BLOCK_SIZE,
2015dda42fcStim .cra_module = THIS_MODULE,
2025dda42fcStim }
2035dda42fcStim } };
2045dda42fcStim
avx_usable(void)2055dda42fcStim static bool avx_usable(void)
2068275d1aaSTim Chen {
207d91cab78SDave Hansen if (!cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL)) {
208da154e82SBorislav Petkov if (boot_cpu_has(X86_FEATURE_AVX))
2098275d1aaSTim Chen pr_info("AVX detected but unusable.\n");
2108275d1aaSTim Chen return false;
2118275d1aaSTim Chen }
2128275d1aaSTim Chen
2138275d1aaSTim Chen return true;
2148275d1aaSTim Chen }
2155dda42fcStim
register_sha256_avx(void)2165dda42fcStim static int register_sha256_avx(void)
2175dda42fcStim {
2185dda42fcStim if (avx_usable())
2195dda42fcStim return crypto_register_shashes(sha256_avx_algs,
2205dda42fcStim ARRAY_SIZE(sha256_avx_algs));
2215dda42fcStim return 0;
2225dda42fcStim }
2235dda42fcStim
unregister_sha256_avx(void)2245dda42fcStim static void unregister_sha256_avx(void)
2255dda42fcStim {
2265dda42fcStim if (avx_usable())
2275dda42fcStim crypto_unregister_shashes(sha256_avx_algs,
2285dda42fcStim ARRAY_SIZE(sha256_avx_algs));
2295dda42fcStim }
2305dda42fcStim
23141419a28SKees Cook asmlinkage void sha256_transform_rorx(struct sha256_state *state,
23241419a28SKees Cook const u8 *data, int blocks);
2335dda42fcStim
sha256_avx2_update(struct shash_desc * desc,const u8 * data,unsigned int len)2345dda42fcStim static int sha256_avx2_update(struct shash_desc *desc, const u8 *data,
2355dda42fcStim unsigned int len)
2365dda42fcStim {
237eb7d6ba8SHans de Goede return _sha256_update(desc, data, len, sha256_transform_rorx);
2385dda42fcStim }
2395dda42fcStim
sha256_avx2_finup(struct shash_desc * desc,const u8 * data,unsigned int len,u8 * out)2405dda42fcStim static int sha256_avx2_finup(struct shash_desc *desc, const u8 *data,
2415dda42fcStim unsigned int len, u8 *out)
2425dda42fcStim {
2435dda42fcStim return sha256_finup(desc, data, len, out, sha256_transform_rorx);
2445dda42fcStim }
2455dda42fcStim
sha256_avx2_final(struct shash_desc * desc,u8 * out)2465dda42fcStim static int sha256_avx2_final(struct shash_desc *desc, u8 *out)
2475dda42fcStim {
2485dda42fcStim return sha256_avx2_finup(desc, NULL, 0, out);
2495dda42fcStim }
2505dda42fcStim
2515dda42fcStim static struct shash_alg sha256_avx2_algs[] = { {
2525dda42fcStim .digestsize = SHA256_DIGEST_SIZE,
2535dda42fcStim .init = sha256_base_init,
2545dda42fcStim .update = sha256_avx2_update,
2555dda42fcStim .final = sha256_avx2_final,
2565dda42fcStim .finup = sha256_avx2_finup,
2575dda42fcStim .descsize = sizeof(struct sha256_state),
2585dda42fcStim .base = {
2595dda42fcStim .cra_name = "sha256",
2605dda42fcStim .cra_driver_name = "sha256-avx2",
2615dda42fcStim .cra_priority = 170,
2625dda42fcStim .cra_blocksize = SHA256_BLOCK_SIZE,
2635dda42fcStim .cra_module = THIS_MODULE,
2645dda42fcStim }
2655dda42fcStim }, {
2665dda42fcStim .digestsize = SHA224_DIGEST_SIZE,
2675dda42fcStim .init = sha224_base_init,
2685dda42fcStim .update = sha256_avx2_update,
2695dda42fcStim .final = sha256_avx2_final,
2705dda42fcStim .finup = sha256_avx2_finup,
2715dda42fcStim .descsize = sizeof(struct sha256_state),
2725dda42fcStim .base = {
2735dda42fcStim .cra_name = "sha224",
2745dda42fcStim .cra_driver_name = "sha224-avx2",
2755dda42fcStim .cra_priority = 170,
2765dda42fcStim .cra_blocksize = SHA224_BLOCK_SIZE,
2775dda42fcStim .cra_module = THIS_MODULE,
2785dda42fcStim }
2795dda42fcStim } };
2805dda42fcStim
avx2_usable(void)2815dda42fcStim static bool avx2_usable(void)
2825dda42fcStim {
2835dda42fcStim if (avx_usable() && boot_cpu_has(X86_FEATURE_AVX2) &&
2845dda42fcStim boot_cpu_has(X86_FEATURE_BMI2))
2855dda42fcStim return true;
2865dda42fcStim
2875dda42fcStim return false;
2885dda42fcStim }
2895dda42fcStim
register_sha256_avx2(void)2905dda42fcStim static int register_sha256_avx2(void)
2915dda42fcStim {
2925dda42fcStim if (avx2_usable())
2935dda42fcStim return crypto_register_shashes(sha256_avx2_algs,
2945dda42fcStim ARRAY_SIZE(sha256_avx2_algs));
2955dda42fcStim return 0;
2965dda42fcStim }
2975dda42fcStim
unregister_sha256_avx2(void)2985dda42fcStim static void unregister_sha256_avx2(void)
2995dda42fcStim {
3005dda42fcStim if (avx2_usable())
3015dda42fcStim crypto_unregister_shashes(sha256_avx2_algs,
3025dda42fcStim ARRAY_SIZE(sha256_avx2_algs));
3035dda42fcStim }
3045dda42fcStim
3055dda42fcStim #ifdef CONFIG_AS_SHA256_NI
30641419a28SKees Cook asmlinkage void sha256_ni_transform(struct sha256_state *digest,
30741419a28SKees Cook const u8 *data, int rounds);
3085dda42fcStim
sha256_ni_update(struct shash_desc * desc,const u8 * data,unsigned int len)3095dda42fcStim static int sha256_ni_update(struct shash_desc *desc, const u8 *data,
3105dda42fcStim unsigned int len)
3115dda42fcStim {
312eb7d6ba8SHans de Goede return _sha256_update(desc, data, len, sha256_ni_transform);
3135dda42fcStim }
3145dda42fcStim
sha256_ni_finup(struct shash_desc * desc,const u8 * data,unsigned int len,u8 * out)3155dda42fcStim static int sha256_ni_finup(struct shash_desc *desc, const u8 *data,
3165dda42fcStim unsigned int len, u8 *out)
3175dda42fcStim {
3185dda42fcStim return sha256_finup(desc, data, len, out, sha256_ni_transform);
3195dda42fcStim }
3205dda42fcStim
sha256_ni_final(struct shash_desc * desc,u8 * out)3215dda42fcStim static int sha256_ni_final(struct shash_desc *desc, u8 *out)
3225dda42fcStim {
3235dda42fcStim return sha256_ni_finup(desc, NULL, 0, out);
3245dda42fcStim }
3255dda42fcStim
3265dda42fcStim static struct shash_alg sha256_ni_algs[] = { {
3275dda42fcStim .digestsize = SHA256_DIGEST_SIZE,
3285dda42fcStim .init = sha256_base_init,
3295dda42fcStim .update = sha256_ni_update,
3305dda42fcStim .final = sha256_ni_final,
3315dda42fcStim .finup = sha256_ni_finup,
3325dda42fcStim .descsize = sizeof(struct sha256_state),
3335dda42fcStim .base = {
3345dda42fcStim .cra_name = "sha256",
3355dda42fcStim .cra_driver_name = "sha256-ni",
3365dda42fcStim .cra_priority = 250,
3375dda42fcStim .cra_blocksize = SHA256_BLOCK_SIZE,
3385dda42fcStim .cra_module = THIS_MODULE,
3395dda42fcStim }
3405dda42fcStim }, {
3415dda42fcStim .digestsize = SHA224_DIGEST_SIZE,
3425dda42fcStim .init = sha224_base_init,
3435dda42fcStim .update = sha256_ni_update,
3445dda42fcStim .final = sha256_ni_final,
3455dda42fcStim .finup = sha256_ni_finup,
3465dda42fcStim .descsize = sizeof(struct sha256_state),
3475dda42fcStim .base = {
3485dda42fcStim .cra_name = "sha224",
3495dda42fcStim .cra_driver_name = "sha224-ni",
3505dda42fcStim .cra_priority = 250,
3515dda42fcStim .cra_blocksize = SHA224_BLOCK_SIZE,
3525dda42fcStim .cra_module = THIS_MODULE,
3535dda42fcStim }
3545dda42fcStim } };
3555dda42fcStim
register_sha256_ni(void)3565dda42fcStim static int register_sha256_ni(void)
3575dda42fcStim {
3585dda42fcStim if (boot_cpu_has(X86_FEATURE_SHA_NI))
3595dda42fcStim return crypto_register_shashes(sha256_ni_algs,
3605dda42fcStim ARRAY_SIZE(sha256_ni_algs));
3615dda42fcStim return 0;
3625dda42fcStim }
3635dda42fcStim
unregister_sha256_ni(void)3645dda42fcStim static void unregister_sha256_ni(void)
3655dda42fcStim {
3665dda42fcStim if (boot_cpu_has(X86_FEATURE_SHA_NI))
3675dda42fcStim crypto_unregister_shashes(sha256_ni_algs,
3685dda42fcStim ARRAY_SIZE(sha256_ni_algs));
3695dda42fcStim }
3705dda42fcStim
3715dda42fcStim #else
register_sha256_ni(void)3725dda42fcStim static inline int register_sha256_ni(void) { return 0; }
unregister_sha256_ni(void)3735dda42fcStim static inline void unregister_sha256_ni(void) { }
3748275d1aaSTim Chen #endif
3758275d1aaSTim Chen
sha256_ssse3_mod_init(void)3768275d1aaSTim Chen static int __init sha256_ssse3_mod_init(void)
3778275d1aaSTim Chen {
378*20b951fcSRoxana Nicolescu if (!x86_match_cpu(module_cpu_ids))
379*20b951fcSRoxana Nicolescu return -ENODEV;
380*20b951fcSRoxana Nicolescu
3815dda42fcStim if (register_sha256_ssse3())
3825dda42fcStim goto fail;
3838275d1aaSTim Chen
3845dda42fcStim if (register_sha256_avx()) {
3855dda42fcStim unregister_sha256_ssse3();
3865dda42fcStim goto fail;
3878275d1aaSTim Chen }
3888275d1aaSTim Chen
3895dda42fcStim if (register_sha256_avx2()) {
3905dda42fcStim unregister_sha256_avx();
3915dda42fcStim unregister_sha256_ssse3();
3925dda42fcStim goto fail;
3938275d1aaSTim Chen }
3948275d1aaSTim Chen
3955dda42fcStim if (register_sha256_ni()) {
3965dda42fcStim unregister_sha256_avx2();
3975dda42fcStim unregister_sha256_avx();
3985dda42fcStim unregister_sha256_ssse3();
3995dda42fcStim goto fail;
4008275d1aaSTim Chen }
4018275d1aaSTim Chen
4025dda42fcStim return 0;
4035dda42fcStim fail:
4048275d1aaSTim Chen return -ENODEV;
4058275d1aaSTim Chen }
4068275d1aaSTim Chen
sha256_ssse3_mod_fini(void)4078275d1aaSTim Chen static void __exit sha256_ssse3_mod_fini(void)
4088275d1aaSTim Chen {
4095dda42fcStim unregister_sha256_ni();
4105dda42fcStim unregister_sha256_avx2();
4115dda42fcStim unregister_sha256_avx();
4125dda42fcStim unregister_sha256_ssse3();
4138275d1aaSTim Chen }
4148275d1aaSTim Chen
4158275d1aaSTim Chen module_init(sha256_ssse3_mod_init);
4168275d1aaSTim Chen module_exit(sha256_ssse3_mod_fini);
4178275d1aaSTim Chen
4188275d1aaSTim Chen MODULE_LICENSE("GPL");
4198275d1aaSTim Chen MODULE_DESCRIPTION("SHA256 Secure Hash Algorithm, Supplemental SSE3 accelerated");
4208275d1aaSTim Chen
4215d26a105SKees Cook MODULE_ALIAS_CRYPTO("sha256");
4221a445e8eSStephan Mueller MODULE_ALIAS_CRYPTO("sha256-ssse3");
4231a445e8eSStephan Mueller MODULE_ALIAS_CRYPTO("sha256-avx");
4241a445e8eSStephan Mueller MODULE_ALIAS_CRYPTO("sha256-avx2");
4255d26a105SKees Cook MODULE_ALIAS_CRYPTO("sha224");
4261a445e8eSStephan Mueller MODULE_ALIAS_CRYPTO("sha224-ssse3");
4271a445e8eSStephan Mueller MODULE_ALIAS_CRYPTO("sha224-avx");
4281a445e8eSStephan Mueller MODULE_ALIAS_CRYPTO("sha224-avx2");
4291a445e8eSStephan Mueller #ifdef CONFIG_AS_SHA256_NI
4301a445e8eSStephan Mueller MODULE_ALIAS_CRYPTO("sha256-ni");
4311a445e8eSStephan Mueller MODULE_ALIAS_CRYPTO("sha224-ni");
4321a445e8eSStephan Mueller #endif
433