xref: /openbmc/linux/arch/x86/boot/pmjump.S (revision c95baf12f5077419db01313ab61c2aac007d40cd)
197873a3dSThomas Gleixner/* SPDX-License-Identifier: GPL-2.0-only */
296ae6ea0SThomas Gleixner/* ----------------------------------------------------------------------- *
396ae6ea0SThomas Gleixner *
496ae6ea0SThomas Gleixner *   Copyright (C) 1991, 1992 Linus Torvalds
596ae6ea0SThomas Gleixner *   Copyright 2007 rPath, Inc. - All Rights Reserved
696ae6ea0SThomas Gleixner *
796ae6ea0SThomas Gleixner * ----------------------------------------------------------------------- */
896ae6ea0SThomas Gleixner
996ae6ea0SThomas Gleixner/*
1096ae6ea0SThomas Gleixner * The actual transition into protected mode
1196ae6ea0SThomas Gleixner */
1296ae6ea0SThomas Gleixner
1396ae6ea0SThomas Gleixner#include <asm/boot.h>
1402a7b425SH. Peter Anvin#include <asm/processor-flags.h>
1596ae6ea0SThomas Gleixner#include <asm/segment.h>
16324bda9eSCyrill Gorcunov#include <linux/linkage.h>
1796ae6ea0SThomas Gleixner
1896ae6ea0SThomas Gleixner	.text
1996ae6ea0SThomas Gleixner	.code16
2096ae6ea0SThomas Gleixner
2196ae6ea0SThomas Gleixner/*
2296ae6ea0SThomas Gleixner * void protected_mode_jump(u32 entrypoint, u32 bootparams);
2396ae6ea0SThomas Gleixner */
24*37818afdSJiri SlabySYM_FUNC_START_NOALIGN(protected_mode_jump)
2596ae6ea0SThomas Gleixner	movl	%edx, %esi		# Pointer to boot_params table
26c4d9ba6dSH. Peter Anvin
27c4d9ba6dSH. Peter Anvin	xorl	%ebx, %ebx
28c4d9ba6dSH. Peter Anvin	movw	%cs, %bx
29c4d9ba6dSH. Peter Anvin	shll	$4, %ebx
30c4d9ba6dSH. Peter Anvin	addl	%ebx, 2f
312ee2394bSH. Peter Anvin	jmp	1f			# Short jump to serialize on 386/486
322ee2394bSH. Peter Anvin1:
3396ae6ea0SThomas Gleixner
3496ae6ea0SThomas Gleixner	movw	$__BOOT_DS, %cx
3588089519SH. Peter Anvin	movw	$__BOOT_TSS, %di
3696ae6ea0SThomas Gleixner
3796ae6ea0SThomas Gleixner	movl	%cr0, %edx
3802a7b425SH. Peter Anvin	orb	$X86_CR0_PE, %dl	# Protected mode
3996ae6ea0SThomas Gleixner	movl	%edx, %cr0
4096ae6ea0SThomas Gleixner
41c4d9ba6dSH. Peter Anvin	# Transition to 32-bit mode
4296ae6ea0SThomas Gleixner	.byte	0x66, 0xea		# ljmpl opcode
4330a2441cSJiri Slaby2:	.long	.Lin_pm32		# offset
4496ae6ea0SThomas Gleixner	.word	__BOOT_CS		# segment
45*37818afdSJiri SlabySYM_FUNC_END(protected_mode_jump)
46c4d9ba6dSH. Peter Anvin
47c4d9ba6dSH. Peter Anvin	.code32
48be721696SH. Peter Anvin	.section ".text32","ax"
49deff8a24SJiri SlabySYM_FUNC_START_LOCAL_NOALIGN(.Lin_pm32)
50c4d9ba6dSH. Peter Anvin	# Set up data segments for flat 32-bit mode
51c4d9ba6dSH. Peter Anvin	movl	%ecx, %ds
52c4d9ba6dSH. Peter Anvin	movl	%ecx, %es
53c4d9ba6dSH. Peter Anvin	movl	%ecx, %fs
54c4d9ba6dSH. Peter Anvin	movl	%ecx, %gs
55c4d9ba6dSH. Peter Anvin	movl	%ecx, %ss
56c4d9ba6dSH. Peter Anvin	# The 32-bit code sets up its own stack, but this way we do have
57c4d9ba6dSH. Peter Anvin	# a valid stack if some debugging hack wants to use it.
58c4d9ba6dSH. Peter Anvin	addl	%ebx, %esp
59c4d9ba6dSH. Peter Anvin
6088089519SH. Peter Anvin	# Set up TR to make Intel VT happy
6188089519SH. Peter Anvin	ltr	%di
6288089519SH. Peter Anvin
63c4d9ba6dSH. Peter Anvin	# Clear registers to allow for future extensions to the
64c4d9ba6dSH. Peter Anvin	# 32-bit boot protocol
65c4d9ba6dSH. Peter Anvin	xorl	%ecx, %ecx
66c4d9ba6dSH. Peter Anvin	xorl	%edx, %edx
67c4d9ba6dSH. Peter Anvin	xorl	%ebx, %ebx
68c4d9ba6dSH. Peter Anvin	xorl	%ebp, %ebp
69c4d9ba6dSH. Peter Anvin	xorl	%edi, %edi
70c4d9ba6dSH. Peter Anvin
7188089519SH. Peter Anvin	# Set up LDTR to make Intel VT happy
7288089519SH. Peter Anvin	lldt	%cx
7388089519SH. Peter Anvin
74c4d9ba6dSH. Peter Anvin	jmpl	*%eax			# Jump to the 32-bit entrypoint
75deff8a24SJiri SlabySYM_FUNC_END(.Lin_pm32)
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