xref: /openbmc/linux/arch/x86/boot/pm.c (revision 88089519f302f1296b4739be45699f06f728ec31)
196ae6ea0SThomas Gleixner /* -*- linux-c -*- ------------------------------------------------------- *
296ae6ea0SThomas Gleixner  *
396ae6ea0SThomas Gleixner  *   Copyright (C) 1991, 1992 Linus Torvalds
496ae6ea0SThomas Gleixner  *   Copyright 2007 rPath, Inc. - All Rights Reserved
596ae6ea0SThomas Gleixner  *
696ae6ea0SThomas Gleixner  *   This file is part of the Linux kernel, and is made available under
796ae6ea0SThomas Gleixner  *   the terms of the GNU General Public License version 2.
896ae6ea0SThomas Gleixner  *
996ae6ea0SThomas Gleixner  * ----------------------------------------------------------------------- */
1096ae6ea0SThomas Gleixner 
1196ae6ea0SThomas Gleixner /*
1296ae6ea0SThomas Gleixner  * arch/i386/boot/pm.c
1396ae6ea0SThomas Gleixner  *
1496ae6ea0SThomas Gleixner  * Prepare the machine for transition to protected mode.
1596ae6ea0SThomas Gleixner  */
1696ae6ea0SThomas Gleixner 
1796ae6ea0SThomas Gleixner #include "boot.h"
1896ae6ea0SThomas Gleixner #include <asm/segment.h>
1996ae6ea0SThomas Gleixner 
2096ae6ea0SThomas Gleixner /*
2196ae6ea0SThomas Gleixner  * Invoke the realmode switch hook if present; otherwise
2296ae6ea0SThomas Gleixner  * disable all interrupts.
2396ae6ea0SThomas Gleixner  */
2496ae6ea0SThomas Gleixner static void realmode_switch_hook(void)
2596ae6ea0SThomas Gleixner {
2696ae6ea0SThomas Gleixner 	if (boot_params.hdr.realmode_swtch) {
2796ae6ea0SThomas Gleixner 		asm volatile("lcallw *%0"
2896ae6ea0SThomas Gleixner 			     : : "m" (boot_params.hdr.realmode_swtch)
2996ae6ea0SThomas Gleixner 			     : "eax", "ebx", "ecx", "edx");
3096ae6ea0SThomas Gleixner 	} else {
3196ae6ea0SThomas Gleixner 		asm volatile("cli");
3296ae6ea0SThomas Gleixner 		outb(0x80, 0x70); /* Disable NMI */
3396ae6ea0SThomas Gleixner 		io_delay();
3496ae6ea0SThomas Gleixner 	}
3596ae6ea0SThomas Gleixner }
3696ae6ea0SThomas Gleixner 
3796ae6ea0SThomas Gleixner /*
3896ae6ea0SThomas Gleixner  * A zImage kernel is loaded at 0x10000 but wants to run at 0x1000.
3996ae6ea0SThomas Gleixner  * A bzImage kernel is loaded and runs at 0x100000.
4096ae6ea0SThomas Gleixner  */
4196ae6ea0SThomas Gleixner static void move_kernel_around(void)
4296ae6ea0SThomas Gleixner {
4396ae6ea0SThomas Gleixner 	/* Note: rely on the compile-time option here rather than
4496ae6ea0SThomas Gleixner 	   the LOADED_HIGH flag.  The Qemu kernel loader unconditionally
4596ae6ea0SThomas Gleixner 	   sets the loadflags to zero. */
4696ae6ea0SThomas Gleixner #ifndef __BIG_KERNEL__
4796ae6ea0SThomas Gleixner 	u16 dst_seg, src_seg;
4896ae6ea0SThomas Gleixner 	u32 syssize;
4996ae6ea0SThomas Gleixner 
5096ae6ea0SThomas Gleixner 	dst_seg =  0x1000 >> 4;
5196ae6ea0SThomas Gleixner 	src_seg = 0x10000 >> 4;
5296ae6ea0SThomas Gleixner 	syssize = boot_params.hdr.syssize; /* Size in 16-byte paragraphs */
5396ae6ea0SThomas Gleixner 
5496ae6ea0SThomas Gleixner 	while (syssize) {
5596ae6ea0SThomas Gleixner 		int paras  = (syssize >= 0x1000) ? 0x1000 : syssize;
5696ae6ea0SThomas Gleixner 		int dwords = paras << 2;
5796ae6ea0SThomas Gleixner 
5896ae6ea0SThomas Gleixner 		asm volatile("pushw %%es ; "
5996ae6ea0SThomas Gleixner 			     "pushw %%ds ; "
6096ae6ea0SThomas Gleixner 			     "movw %1,%%es ; "
6196ae6ea0SThomas Gleixner 			     "movw %2,%%ds ; "
6296ae6ea0SThomas Gleixner 			     "xorw %%di,%%di ; "
6396ae6ea0SThomas Gleixner 			     "xorw %%si,%%si ; "
6496ae6ea0SThomas Gleixner 			     "rep;movsl ; "
6596ae6ea0SThomas Gleixner 			     "popw %%ds ; "
6696ae6ea0SThomas Gleixner 			     "popw %%es"
6796ae6ea0SThomas Gleixner 			     : "+c" (dwords)
6896ae6ea0SThomas Gleixner 			     : "r" (dst_seg), "r" (src_seg)
6996ae6ea0SThomas Gleixner 			     : "esi", "edi");
7096ae6ea0SThomas Gleixner 
7196ae6ea0SThomas Gleixner 		syssize -= paras;
7296ae6ea0SThomas Gleixner 		dst_seg += paras;
7396ae6ea0SThomas Gleixner 		src_seg += paras;
7496ae6ea0SThomas Gleixner 	}
7596ae6ea0SThomas Gleixner #endif
7696ae6ea0SThomas Gleixner }
7796ae6ea0SThomas Gleixner 
7896ae6ea0SThomas Gleixner /*
7996ae6ea0SThomas Gleixner  * Disable all interrupts at the legacy PIC.
8096ae6ea0SThomas Gleixner  */
8196ae6ea0SThomas Gleixner static void mask_all_interrupts(void)
8296ae6ea0SThomas Gleixner {
8396ae6ea0SThomas Gleixner 	outb(0xff, 0xa1);	/* Mask all interrupts on the secondary PIC */
8496ae6ea0SThomas Gleixner 	io_delay();
8596ae6ea0SThomas Gleixner 	outb(0xfb, 0x21);	/* Mask all but cascade on the primary PIC */
8696ae6ea0SThomas Gleixner 	io_delay();
8796ae6ea0SThomas Gleixner }
8896ae6ea0SThomas Gleixner 
8996ae6ea0SThomas Gleixner /*
9096ae6ea0SThomas Gleixner  * Reset IGNNE# if asserted in the FPU.
9196ae6ea0SThomas Gleixner  */
9296ae6ea0SThomas Gleixner static void reset_coprocessor(void)
9396ae6ea0SThomas Gleixner {
9496ae6ea0SThomas Gleixner 	outb(0, 0xf0);
9596ae6ea0SThomas Gleixner 	io_delay();
9696ae6ea0SThomas Gleixner 	outb(0, 0xf1);
9796ae6ea0SThomas Gleixner 	io_delay();
9896ae6ea0SThomas Gleixner }
9996ae6ea0SThomas Gleixner 
10096ae6ea0SThomas Gleixner /*
10196ae6ea0SThomas Gleixner  * Set up the GDT
10296ae6ea0SThomas Gleixner  */
10396ae6ea0SThomas Gleixner #define GDT_ENTRY(flags,base,limit)		\
10496ae6ea0SThomas Gleixner 	(((u64)(base & 0xff000000) << 32) |	\
10596ae6ea0SThomas Gleixner 	 ((u64)flags << 40) |			\
10696ae6ea0SThomas Gleixner 	 ((u64)(limit & 0x00ff0000) << 32) |	\
10796ae6ea0SThomas Gleixner 	 ((u64)(base & 0x00ffff00) << 16) |	\
10896ae6ea0SThomas Gleixner 	 ((u64)(limit & 0x0000ffff)))
10996ae6ea0SThomas Gleixner 
11096ae6ea0SThomas Gleixner struct gdt_ptr {
11196ae6ea0SThomas Gleixner 	u16 len;
11296ae6ea0SThomas Gleixner 	u32 ptr;
11396ae6ea0SThomas Gleixner } __attribute__((packed));
11496ae6ea0SThomas Gleixner 
11596ae6ea0SThomas Gleixner static void setup_gdt(void)
11696ae6ea0SThomas Gleixner {
11796ae6ea0SThomas Gleixner 	/* There are machines which are known to not boot with the GDT
11896ae6ea0SThomas Gleixner 	   being 8-byte unaligned.  Intel recommends 16 byte alignment. */
11996ae6ea0SThomas Gleixner 	static const u64 boot_gdt[] __attribute__((aligned(16))) = {
12096ae6ea0SThomas Gleixner 		/* CS: code, read/execute, 4 GB, base 0 */
12196ae6ea0SThomas Gleixner 		[GDT_ENTRY_BOOT_CS] = GDT_ENTRY(0xc09b, 0, 0xfffff),
12296ae6ea0SThomas Gleixner 		/* DS: data, read/write, 4 GB, base 0 */
12396ae6ea0SThomas Gleixner 		[GDT_ENTRY_BOOT_DS] = GDT_ENTRY(0xc093, 0, 0xfffff),
124*88089519SH. Peter Anvin 		/* TSS: 32-bit tss, 104 bytes, base 4096 */
125*88089519SH. Peter Anvin 		/* We only have a TSS here to keep Intel VT happy;
126*88089519SH. Peter Anvin 		   we don't actually use it for anything. */
127*88089519SH. Peter Anvin 		[GDT_ENTRY_BOOT_TSS] = GDT_ENTRY(0x0089, 4096, 103),
12896ae6ea0SThomas Gleixner 	};
12996ae6ea0SThomas Gleixner 	/* Xen HVM incorrectly stores a pointer to the gdt_ptr, instead
13096ae6ea0SThomas Gleixner 	   of the gdt_ptr contents.  Thus, make it static so it will
13196ae6ea0SThomas Gleixner 	   stay in memory, at least long enough that we switch to the
13296ae6ea0SThomas Gleixner 	   proper kernel GDT. */
13396ae6ea0SThomas Gleixner 	static struct gdt_ptr gdt;
13496ae6ea0SThomas Gleixner 
13596ae6ea0SThomas Gleixner 	gdt.len = sizeof(boot_gdt)-1;
13696ae6ea0SThomas Gleixner 	gdt.ptr = (u32)&boot_gdt + (ds() << 4);
13796ae6ea0SThomas Gleixner 
13896ae6ea0SThomas Gleixner 	asm volatile("lgdtl %0" : : "m" (gdt));
13996ae6ea0SThomas Gleixner }
14096ae6ea0SThomas Gleixner 
14196ae6ea0SThomas Gleixner /*
14296ae6ea0SThomas Gleixner  * Set up the IDT
14396ae6ea0SThomas Gleixner  */
14496ae6ea0SThomas Gleixner static void setup_idt(void)
14596ae6ea0SThomas Gleixner {
14696ae6ea0SThomas Gleixner 	static const struct gdt_ptr null_idt = {0, 0};
14796ae6ea0SThomas Gleixner 	asm volatile("lidtl %0" : : "m" (null_idt));
14896ae6ea0SThomas Gleixner }
14996ae6ea0SThomas Gleixner 
15096ae6ea0SThomas Gleixner /*
15196ae6ea0SThomas Gleixner  * Actual invocation sequence
15296ae6ea0SThomas Gleixner  */
15396ae6ea0SThomas Gleixner void go_to_protected_mode(void)
15496ae6ea0SThomas Gleixner {
15596ae6ea0SThomas Gleixner 	/* Hook before leaving real mode, also disables interrupts */
15696ae6ea0SThomas Gleixner 	realmode_switch_hook();
15796ae6ea0SThomas Gleixner 
15896ae6ea0SThomas Gleixner 	/* Move the kernel/setup to their final resting places */
15996ae6ea0SThomas Gleixner 	move_kernel_around();
16096ae6ea0SThomas Gleixner 
16196ae6ea0SThomas Gleixner 	/* Enable the A20 gate */
16296ae6ea0SThomas Gleixner 	if (enable_a20()) {
16396ae6ea0SThomas Gleixner 		puts("A20 gate not responding, unable to boot...\n");
16496ae6ea0SThomas Gleixner 		die();
16596ae6ea0SThomas Gleixner 	}
16696ae6ea0SThomas Gleixner 
16796ae6ea0SThomas Gleixner 	/* Reset coprocessor (IGNNE#) */
16896ae6ea0SThomas Gleixner 	reset_coprocessor();
16996ae6ea0SThomas Gleixner 
17096ae6ea0SThomas Gleixner 	/* Mask all interrupts in the PIC */
17196ae6ea0SThomas Gleixner 	mask_all_interrupts();
17296ae6ea0SThomas Gleixner 
17396ae6ea0SThomas Gleixner 	/* Actual transition to protected mode... */
17496ae6ea0SThomas Gleixner 	setup_idt();
17596ae6ea0SThomas Gleixner 	setup_gdt();
17696ae6ea0SThomas Gleixner 	protected_mode_jump(boot_params.hdr.code32_start,
17796ae6ea0SThomas Gleixner 			    (u32)&boot_params + (ds() << 4));
17896ae6ea0SThomas Gleixner }
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