1*b2441318SGreg Kroah-Hartman/* SPDX-License-Identifier: GPL-2.0 */ 2a88b5ba8SSam Ravnborg/* pci_sun4v_asm: Hypervisor calls for PCI support. 3a88b5ba8SSam Ravnborg * 4a88b5ba8SSam Ravnborg * Copyright (C) 2006, 2008 David S. Miller <davem@davemloft.net> 5a88b5ba8SSam Ravnborg */ 6a88b5ba8SSam Ravnborg 7a88b5ba8SSam Ravnborg#include <linux/linkage.h> 8a88b5ba8SSam Ravnborg#include <asm/hypervisor.h> 9a88b5ba8SSam Ravnborg 10a88b5ba8SSam Ravnborg /* %o0: devhandle 11a88b5ba8SSam Ravnborg * %o1: tsbid 12a88b5ba8SSam Ravnborg * %o2: num ttes 13a88b5ba8SSam Ravnborg * %o3: io_attributes 14a88b5ba8SSam Ravnborg * %o4: io_page_list phys address 15a88b5ba8SSam Ravnborg * 16a88b5ba8SSam Ravnborg * returns %o0: -status if status was non-zero, else 17a88b5ba8SSam Ravnborg * %o0: num pages mapped 18a88b5ba8SSam Ravnborg */ 19a88b5ba8SSam RavnborgENTRY(pci_sun4v_iommu_map) 20a88b5ba8SSam Ravnborg mov %o5, %g1 21a88b5ba8SSam Ravnborg mov HV_FAST_PCI_IOMMU_MAP, %o5 22a88b5ba8SSam Ravnborg ta HV_FAST_TRAP 23a88b5ba8SSam Ravnborg brnz,pn %o0, 1f 24a88b5ba8SSam Ravnborg sub %g0, %o0, %o0 25a88b5ba8SSam Ravnborg mov %o1, %o0 26a88b5ba8SSam Ravnborg1: retl 27a88b5ba8SSam Ravnborg nop 28a88b5ba8SSam RavnborgENDPROC(pci_sun4v_iommu_map) 29a88b5ba8SSam Ravnborg 30a88b5ba8SSam Ravnborg /* %o0: devhandle 31a88b5ba8SSam Ravnborg * %o1: tsbid 32a88b5ba8SSam Ravnborg * %o2: num ttes 33a88b5ba8SSam Ravnborg * 34a88b5ba8SSam Ravnborg * returns %o0: num ttes demapped 35a88b5ba8SSam Ravnborg */ 36a88b5ba8SSam RavnborgENTRY(pci_sun4v_iommu_demap) 37a88b5ba8SSam Ravnborg mov HV_FAST_PCI_IOMMU_DEMAP, %o5 38a88b5ba8SSam Ravnborg ta HV_FAST_TRAP 39a88b5ba8SSam Ravnborg retl 40a88b5ba8SSam Ravnborg mov %o1, %o0 41a88b5ba8SSam RavnborgENDPROC(pci_sun4v_iommu_demap) 42a88b5ba8SSam Ravnborg 43a88b5ba8SSam Ravnborg /* %o0: devhandle 44a88b5ba8SSam Ravnborg * %o1: tsbid 45a88b5ba8SSam Ravnborg * %o2: &io_attributes 46a88b5ba8SSam Ravnborg * %o3: &real_address 47a88b5ba8SSam Ravnborg * 48a88b5ba8SSam Ravnborg * returns %o0: status 49a88b5ba8SSam Ravnborg */ 50a88b5ba8SSam RavnborgENTRY(pci_sun4v_iommu_getmap) 51a88b5ba8SSam Ravnborg mov %o2, %o4 52a88b5ba8SSam Ravnborg mov HV_FAST_PCI_IOMMU_GETMAP, %o5 53a88b5ba8SSam Ravnborg ta HV_FAST_TRAP 54a88b5ba8SSam Ravnborg stx %o1, [%o4] 55a88b5ba8SSam Ravnborg stx %o2, [%o3] 56a88b5ba8SSam Ravnborg retl 57a88b5ba8SSam Ravnborg mov %o0, %o0 58a88b5ba8SSam RavnborgENDPROC(pci_sun4v_iommu_getmap) 59a88b5ba8SSam Ravnborg 60a88b5ba8SSam Ravnborg /* %o0: devhandle 61a88b5ba8SSam Ravnborg * %o1: pci_device 62a88b5ba8SSam Ravnborg * %o2: pci_config_offset 63a88b5ba8SSam Ravnborg * %o3: size 64a88b5ba8SSam Ravnborg * 65a88b5ba8SSam Ravnborg * returns %o0: data 66a88b5ba8SSam Ravnborg * 67a88b5ba8SSam Ravnborg * If there is an error, the data will be returned 68a88b5ba8SSam Ravnborg * as all 1's. 69a88b5ba8SSam Ravnborg */ 70a88b5ba8SSam RavnborgENTRY(pci_sun4v_config_get) 71a88b5ba8SSam Ravnborg mov HV_FAST_PCI_CONFIG_GET, %o5 72a88b5ba8SSam Ravnborg ta HV_FAST_TRAP 73a88b5ba8SSam Ravnborg brnz,a,pn %o1, 1f 74a88b5ba8SSam Ravnborg mov -1, %o2 75a88b5ba8SSam Ravnborg1: retl 76a88b5ba8SSam Ravnborg mov %o2, %o0 77a88b5ba8SSam RavnborgENDPROC(pci_sun4v_config_get) 78a88b5ba8SSam Ravnborg 79a88b5ba8SSam Ravnborg /* %o0: devhandle 80a88b5ba8SSam Ravnborg * %o1: pci_device 81a88b5ba8SSam Ravnborg * %o2: pci_config_offset 82a88b5ba8SSam Ravnborg * %o3: size 83a88b5ba8SSam Ravnborg * %o4: data 84a88b5ba8SSam Ravnborg * 85a88b5ba8SSam Ravnborg * returns %o0: status 86a88b5ba8SSam Ravnborg * 87a88b5ba8SSam Ravnborg * status will be zero if the operation completed 88a88b5ba8SSam Ravnborg * successfully, else -1 if not 89a88b5ba8SSam Ravnborg */ 90a88b5ba8SSam RavnborgENTRY(pci_sun4v_config_put) 91a88b5ba8SSam Ravnborg mov HV_FAST_PCI_CONFIG_PUT, %o5 92a88b5ba8SSam Ravnborg ta HV_FAST_TRAP 93a88b5ba8SSam Ravnborg brnz,a,pn %o1, 1f 94a88b5ba8SSam Ravnborg mov -1, %o1 95a88b5ba8SSam Ravnborg1: retl 96a88b5ba8SSam Ravnborg mov %o1, %o0 97a88b5ba8SSam RavnborgENDPROC(pci_sun4v_config_put) 98a88b5ba8SSam Ravnborg 99a88b5ba8SSam Ravnborg /* %o0: devhandle 100a88b5ba8SSam Ravnborg * %o1: msiqid 101a88b5ba8SSam Ravnborg * %o2: msiq phys address 102a88b5ba8SSam Ravnborg * %o3: num entries 103a88b5ba8SSam Ravnborg * 104a88b5ba8SSam Ravnborg * returns %o0: status 105a88b5ba8SSam Ravnborg * 106a88b5ba8SSam Ravnborg * status will be zero if the operation completed 107a88b5ba8SSam Ravnborg * successfully, else -1 if not 108a88b5ba8SSam Ravnborg */ 109a88b5ba8SSam RavnborgENTRY(pci_sun4v_msiq_conf) 110a88b5ba8SSam Ravnborg mov HV_FAST_PCI_MSIQ_CONF, %o5 111a88b5ba8SSam Ravnborg ta HV_FAST_TRAP 112a88b5ba8SSam Ravnborg retl 113a88b5ba8SSam Ravnborg mov %o0, %o0 114a88b5ba8SSam RavnborgENDPROC(pci_sun4v_msiq_conf) 115a88b5ba8SSam Ravnborg 116a88b5ba8SSam Ravnborg /* %o0: devhandle 117a88b5ba8SSam Ravnborg * %o1: msiqid 118a88b5ba8SSam Ravnborg * %o2: &msiq_phys_addr 119a88b5ba8SSam Ravnborg * %o3: &msiq_num_entries 120a88b5ba8SSam Ravnborg * 121a88b5ba8SSam Ravnborg * returns %o0: status 122a88b5ba8SSam Ravnborg */ 123a88b5ba8SSam RavnborgENTRY(pci_sun4v_msiq_info) 124a88b5ba8SSam Ravnborg mov %o2, %o4 125a88b5ba8SSam Ravnborg mov HV_FAST_PCI_MSIQ_INFO, %o5 126a88b5ba8SSam Ravnborg ta HV_FAST_TRAP 127a88b5ba8SSam Ravnborg stx %o1, [%o4] 128a88b5ba8SSam Ravnborg stx %o2, [%o3] 129a88b5ba8SSam Ravnborg retl 130a88b5ba8SSam Ravnborg mov %o0, %o0 131a88b5ba8SSam RavnborgENDPROC(pci_sun4v_msiq_info) 132a88b5ba8SSam Ravnborg 133a88b5ba8SSam Ravnborg /* %o0: devhandle 134a88b5ba8SSam Ravnborg * %o1: msiqid 135a88b5ba8SSam Ravnborg * %o2: &valid 136a88b5ba8SSam Ravnborg * 137a88b5ba8SSam Ravnborg * returns %o0: status 138a88b5ba8SSam Ravnborg */ 139a88b5ba8SSam RavnborgENTRY(pci_sun4v_msiq_getvalid) 140a88b5ba8SSam Ravnborg mov HV_FAST_PCI_MSIQ_GETVALID, %o5 141a88b5ba8SSam Ravnborg ta HV_FAST_TRAP 142a88b5ba8SSam Ravnborg stx %o1, [%o2] 143a88b5ba8SSam Ravnborg retl 144a88b5ba8SSam Ravnborg mov %o0, %o0 145a88b5ba8SSam RavnborgENDPROC(pci_sun4v_msiq_getvalid) 146a88b5ba8SSam Ravnborg 147a88b5ba8SSam Ravnborg /* %o0: devhandle 148a88b5ba8SSam Ravnborg * %o1: msiqid 149a88b5ba8SSam Ravnborg * %o2: valid 150a88b5ba8SSam Ravnborg * 151a88b5ba8SSam Ravnborg * returns %o0: status 152a88b5ba8SSam Ravnborg */ 153a88b5ba8SSam RavnborgENTRY(pci_sun4v_msiq_setvalid) 154a88b5ba8SSam Ravnborg mov HV_FAST_PCI_MSIQ_SETVALID, %o5 155a88b5ba8SSam Ravnborg ta HV_FAST_TRAP 156a88b5ba8SSam Ravnborg retl 157a88b5ba8SSam Ravnborg mov %o0, %o0 158a88b5ba8SSam RavnborgENDPROC(pci_sun4v_msiq_setvalid) 159a88b5ba8SSam Ravnborg 160a88b5ba8SSam Ravnborg /* %o0: devhandle 161a88b5ba8SSam Ravnborg * %o1: msiqid 162a88b5ba8SSam Ravnborg * %o2: &state 163a88b5ba8SSam Ravnborg * 164a88b5ba8SSam Ravnborg * returns %o0: status 165a88b5ba8SSam Ravnborg */ 166a88b5ba8SSam RavnborgENTRY(pci_sun4v_msiq_getstate) 167a88b5ba8SSam Ravnborg mov HV_FAST_PCI_MSIQ_GETSTATE, %o5 168a88b5ba8SSam Ravnborg ta HV_FAST_TRAP 169a88b5ba8SSam Ravnborg stx %o1, [%o2] 170a88b5ba8SSam Ravnborg retl 171a88b5ba8SSam Ravnborg mov %o0, %o0 172a88b5ba8SSam RavnborgENDPROC(pci_sun4v_msiq_getstate) 173a88b5ba8SSam Ravnborg 174a88b5ba8SSam Ravnborg /* %o0: devhandle 175a88b5ba8SSam Ravnborg * %o1: msiqid 176a88b5ba8SSam Ravnborg * %o2: state 177a88b5ba8SSam Ravnborg * 178a88b5ba8SSam Ravnborg * returns %o0: status 179a88b5ba8SSam Ravnborg */ 180a88b5ba8SSam RavnborgENTRY(pci_sun4v_msiq_setstate) 181a88b5ba8SSam Ravnborg mov HV_FAST_PCI_MSIQ_SETSTATE, %o5 182a88b5ba8SSam Ravnborg ta HV_FAST_TRAP 183a88b5ba8SSam Ravnborg retl 184a88b5ba8SSam Ravnborg mov %o0, %o0 185a88b5ba8SSam RavnborgENDPROC(pci_sun4v_msiq_setstate) 186a88b5ba8SSam Ravnborg 187a88b5ba8SSam Ravnborg /* %o0: devhandle 188a88b5ba8SSam Ravnborg * %o1: msiqid 189a88b5ba8SSam Ravnborg * %o2: &head 190a88b5ba8SSam Ravnborg * 191a88b5ba8SSam Ravnborg * returns %o0: status 192a88b5ba8SSam Ravnborg */ 193a88b5ba8SSam RavnborgENTRY(pci_sun4v_msiq_gethead) 194a88b5ba8SSam Ravnborg mov HV_FAST_PCI_MSIQ_GETHEAD, %o5 195a88b5ba8SSam Ravnborg ta HV_FAST_TRAP 196a88b5ba8SSam Ravnborg stx %o1, [%o2] 197a88b5ba8SSam Ravnborg retl 198a88b5ba8SSam Ravnborg mov %o0, %o0 199a88b5ba8SSam RavnborgENDPROC(pci_sun4v_msiq_gethead) 200a88b5ba8SSam Ravnborg 201a88b5ba8SSam Ravnborg /* %o0: devhandle 202a88b5ba8SSam Ravnborg * %o1: msiqid 203a88b5ba8SSam Ravnborg * %o2: head 204a88b5ba8SSam Ravnborg * 205a88b5ba8SSam Ravnborg * returns %o0: status 206a88b5ba8SSam Ravnborg */ 207a88b5ba8SSam RavnborgENTRY(pci_sun4v_msiq_sethead) 208a88b5ba8SSam Ravnborg mov HV_FAST_PCI_MSIQ_SETHEAD, %o5 209a88b5ba8SSam Ravnborg ta HV_FAST_TRAP 210a88b5ba8SSam Ravnborg retl 211a88b5ba8SSam Ravnborg mov %o0, %o0 212a88b5ba8SSam RavnborgENDPROC(pci_sun4v_msiq_sethead) 213a88b5ba8SSam Ravnborg 214a88b5ba8SSam Ravnborg /* %o0: devhandle 215a88b5ba8SSam Ravnborg * %o1: msiqid 216a88b5ba8SSam Ravnborg * %o2: &tail 217a88b5ba8SSam Ravnborg * 218a88b5ba8SSam Ravnborg * returns %o0: status 219a88b5ba8SSam Ravnborg */ 220a88b5ba8SSam RavnborgENTRY(pci_sun4v_msiq_gettail) 221a88b5ba8SSam Ravnborg mov HV_FAST_PCI_MSIQ_GETTAIL, %o5 222a88b5ba8SSam Ravnborg ta HV_FAST_TRAP 223a88b5ba8SSam Ravnborg stx %o1, [%o2] 224a88b5ba8SSam Ravnborg retl 225a88b5ba8SSam Ravnborg mov %o0, %o0 226a88b5ba8SSam RavnborgENDPROC(pci_sun4v_msiq_gettail) 227a88b5ba8SSam Ravnborg 228a88b5ba8SSam Ravnborg /* %o0: devhandle 229a88b5ba8SSam Ravnborg * %o1: msinum 230a88b5ba8SSam Ravnborg * %o2: &valid 231a88b5ba8SSam Ravnborg * 232a88b5ba8SSam Ravnborg * returns %o0: status 233a88b5ba8SSam Ravnborg */ 234a88b5ba8SSam RavnborgENTRY(pci_sun4v_msi_getvalid) 235a88b5ba8SSam Ravnborg mov HV_FAST_PCI_MSI_GETVALID, %o5 236a88b5ba8SSam Ravnborg ta HV_FAST_TRAP 237a88b5ba8SSam Ravnborg stx %o1, [%o2] 238a88b5ba8SSam Ravnborg retl 239a88b5ba8SSam Ravnborg mov %o0, %o0 240a88b5ba8SSam RavnborgENDPROC(pci_sun4v_msi_getvalid) 241a88b5ba8SSam Ravnborg 242a88b5ba8SSam Ravnborg /* %o0: devhandle 243a88b5ba8SSam Ravnborg * %o1: msinum 244a88b5ba8SSam Ravnborg * %o2: valid 245a88b5ba8SSam Ravnborg * 246a88b5ba8SSam Ravnborg * returns %o0: status 247a88b5ba8SSam Ravnborg */ 248a88b5ba8SSam RavnborgENTRY(pci_sun4v_msi_setvalid) 249a88b5ba8SSam Ravnborg mov HV_FAST_PCI_MSI_SETVALID, %o5 250a88b5ba8SSam Ravnborg ta HV_FAST_TRAP 251a88b5ba8SSam Ravnborg retl 252a88b5ba8SSam Ravnborg mov %o0, %o0 253a88b5ba8SSam RavnborgENDPROC(pci_sun4v_msi_setvalid) 254a88b5ba8SSam Ravnborg 255a88b5ba8SSam Ravnborg /* %o0: devhandle 256a88b5ba8SSam Ravnborg * %o1: msinum 257a88b5ba8SSam Ravnborg * %o2: &msiq 258a88b5ba8SSam Ravnborg * 259a88b5ba8SSam Ravnborg * returns %o0: status 260a88b5ba8SSam Ravnborg */ 261a88b5ba8SSam RavnborgENTRY(pci_sun4v_msi_getmsiq) 262a88b5ba8SSam Ravnborg mov HV_FAST_PCI_MSI_GETMSIQ, %o5 263a88b5ba8SSam Ravnborg ta HV_FAST_TRAP 264a88b5ba8SSam Ravnborg stx %o1, [%o2] 265a88b5ba8SSam Ravnborg retl 266a88b5ba8SSam Ravnborg mov %o0, %o0 267a88b5ba8SSam RavnborgENDPROC(pci_sun4v_msi_getmsiq) 268a88b5ba8SSam Ravnborg 269a88b5ba8SSam Ravnborg /* %o0: devhandle 270a88b5ba8SSam Ravnborg * %o1: msinum 271a88b5ba8SSam Ravnborg * %o2: msitype 272a88b5ba8SSam Ravnborg * %o3: msiq 273a88b5ba8SSam Ravnborg * 274a88b5ba8SSam Ravnborg * returns %o0: status 275a88b5ba8SSam Ravnborg */ 276a88b5ba8SSam RavnborgENTRY(pci_sun4v_msi_setmsiq) 277a88b5ba8SSam Ravnborg mov HV_FAST_PCI_MSI_SETMSIQ, %o5 278a88b5ba8SSam Ravnborg ta HV_FAST_TRAP 279a88b5ba8SSam Ravnborg retl 280a88b5ba8SSam Ravnborg mov %o0, %o0 281a88b5ba8SSam RavnborgENDPROC(pci_sun4v_msi_setmsiq) 282a88b5ba8SSam Ravnborg 283a88b5ba8SSam Ravnborg /* %o0: devhandle 284a88b5ba8SSam Ravnborg * %o1: msinum 285a88b5ba8SSam Ravnborg * %o2: &state 286a88b5ba8SSam Ravnborg * 287a88b5ba8SSam Ravnborg * returns %o0: status 288a88b5ba8SSam Ravnborg */ 289a88b5ba8SSam RavnborgENTRY(pci_sun4v_msi_getstate) 290a88b5ba8SSam Ravnborg mov HV_FAST_PCI_MSI_GETSTATE, %o5 291a88b5ba8SSam Ravnborg ta HV_FAST_TRAP 292a88b5ba8SSam Ravnborg stx %o1, [%o2] 293a88b5ba8SSam Ravnborg retl 294a88b5ba8SSam Ravnborg mov %o0, %o0 295a88b5ba8SSam RavnborgENDPROC(pci_sun4v_msi_getstate) 296a88b5ba8SSam Ravnborg 297a88b5ba8SSam Ravnborg /* %o0: devhandle 298a88b5ba8SSam Ravnborg * %o1: msinum 299a88b5ba8SSam Ravnborg * %o2: state 300a88b5ba8SSam Ravnborg * 301a88b5ba8SSam Ravnborg * returns %o0: status 302a88b5ba8SSam Ravnborg */ 303a88b5ba8SSam RavnborgENTRY(pci_sun4v_msi_setstate) 304a88b5ba8SSam Ravnborg mov HV_FAST_PCI_MSI_SETSTATE, %o5 305a88b5ba8SSam Ravnborg ta HV_FAST_TRAP 306a88b5ba8SSam Ravnborg retl 307a88b5ba8SSam Ravnborg mov %o0, %o0 308a88b5ba8SSam RavnborgENDPROC(pci_sun4v_msi_setstate) 309a88b5ba8SSam Ravnborg 310a88b5ba8SSam Ravnborg /* %o0: devhandle 311a88b5ba8SSam Ravnborg * %o1: msinum 312a88b5ba8SSam Ravnborg * %o2: &msiq 313a88b5ba8SSam Ravnborg * 314a88b5ba8SSam Ravnborg * returns %o0: status 315a88b5ba8SSam Ravnborg */ 316a88b5ba8SSam RavnborgENTRY(pci_sun4v_msg_getmsiq) 317a88b5ba8SSam Ravnborg mov HV_FAST_PCI_MSG_GETMSIQ, %o5 318a88b5ba8SSam Ravnborg ta HV_FAST_TRAP 319a88b5ba8SSam Ravnborg stx %o1, [%o2] 320a88b5ba8SSam Ravnborg retl 321a88b5ba8SSam Ravnborg mov %o0, %o0 322a88b5ba8SSam RavnborgENDPROC(pci_sun4v_msg_getmsiq) 323a88b5ba8SSam Ravnborg 324a88b5ba8SSam Ravnborg /* %o0: devhandle 325a88b5ba8SSam Ravnborg * %o1: msinum 326a88b5ba8SSam Ravnborg * %o2: msiq 327a88b5ba8SSam Ravnborg * 328a88b5ba8SSam Ravnborg * returns %o0: status 329a88b5ba8SSam Ravnborg */ 330a88b5ba8SSam RavnborgENTRY(pci_sun4v_msg_setmsiq) 331a88b5ba8SSam Ravnborg mov HV_FAST_PCI_MSG_SETMSIQ, %o5 332a88b5ba8SSam Ravnborg ta HV_FAST_TRAP 333a88b5ba8SSam Ravnborg retl 334a88b5ba8SSam Ravnborg mov %o0, %o0 335a88b5ba8SSam RavnborgENDPROC(pci_sun4v_msg_setmsiq) 336a88b5ba8SSam Ravnborg 337a88b5ba8SSam Ravnborg /* %o0: devhandle 338a88b5ba8SSam Ravnborg * %o1: msinum 339a88b5ba8SSam Ravnborg * %o2: &valid 340a88b5ba8SSam Ravnborg * 341a88b5ba8SSam Ravnborg * returns %o0: status 342a88b5ba8SSam Ravnborg */ 343a88b5ba8SSam RavnborgENTRY(pci_sun4v_msg_getvalid) 344a88b5ba8SSam Ravnborg mov HV_FAST_PCI_MSG_GETVALID, %o5 345a88b5ba8SSam Ravnborg ta HV_FAST_TRAP 346a88b5ba8SSam Ravnborg stx %o1, [%o2] 347a88b5ba8SSam Ravnborg retl 348a88b5ba8SSam Ravnborg mov %o0, %o0 349a88b5ba8SSam RavnborgENDPROC(pci_sun4v_msg_getvalid) 350a88b5ba8SSam Ravnborg 351a88b5ba8SSam Ravnborg /* %o0: devhandle 352a88b5ba8SSam Ravnborg * %o1: msinum 353a88b5ba8SSam Ravnborg * %o2: valid 354a88b5ba8SSam Ravnborg * 355a88b5ba8SSam Ravnborg * returns %o0: status 356a88b5ba8SSam Ravnborg */ 357a88b5ba8SSam RavnborgENTRY(pci_sun4v_msg_setvalid) 358a88b5ba8SSam Ravnborg mov HV_FAST_PCI_MSG_SETVALID, %o5 359a88b5ba8SSam Ravnborg ta HV_FAST_TRAP 360a88b5ba8SSam Ravnborg retl 361a88b5ba8SSam Ravnborg mov %o0, %o0 362a88b5ba8SSam RavnborgENDPROC(pci_sun4v_msg_setvalid) 363a88b5ba8SSam Ravnborg 364f0248c15STushar Dave /* 365f0248c15STushar Dave * %o0: devhandle 366f0248c15STushar Dave * %o1: r_addr 367f0248c15STushar Dave * %o2: size 368f0248c15STushar Dave * %o3: pagesize 369f0248c15STushar Dave * %o4: virt 370f0248c15STushar Dave * %o5: &iotsb_num/&iotsb_handle 371f0248c15STushar Dave * 372f0248c15STushar Dave * returns %o0: status 373f0248c15STushar Dave * %o1: iotsb_num/iotsb_handle 374f0248c15STushar Dave */ 375f0248c15STushar DaveENTRY(pci_sun4v_iotsb_conf) 376f0248c15STushar Dave mov %o5, %g1 377f0248c15STushar Dave mov HV_FAST_PCI_IOTSB_CONF, %o5 378f0248c15STushar Dave ta HV_FAST_TRAP 379f0248c15STushar Dave retl 380f0248c15STushar Dave stx %o1, [%g1] 381f0248c15STushar DaveENDPROC(pci_sun4v_iotsb_conf) 3825116ab4eSTushar Dave 3835116ab4eSTushar Dave /* 3845116ab4eSTushar Dave * %o0: devhandle 3855116ab4eSTushar Dave * %o1: iotsb_num/iotsb_handle 3865116ab4eSTushar Dave * %o2: pci_device 3875116ab4eSTushar Dave * 3885116ab4eSTushar Dave * returns %o0: status 3895116ab4eSTushar Dave */ 3905116ab4eSTushar DaveENTRY(pci_sun4v_iotsb_bind) 3915116ab4eSTushar Dave mov HV_FAST_PCI_IOTSB_BIND, %o5 3925116ab4eSTushar Dave ta HV_FAST_TRAP 3935116ab4eSTushar Dave retl 3945116ab4eSTushar Dave nop 3955116ab4eSTushar DaveENDPROC(pci_sun4v_iotsb_bind) 396f08978b0STushar Dave 397f08978b0STushar Dave /* 398f08978b0STushar Dave * %o0: devhandle 399f08978b0STushar Dave * %o1: iotsb_num/iotsb_handle 400f08978b0STushar Dave * %o2: index_count 401f08978b0STushar Dave * %o3: iotte_attributes 402f08978b0STushar Dave * %o4: io_page_list_p 403f08978b0STushar Dave * %o5: &mapped 404f08978b0STushar Dave * 405f08978b0STushar Dave * returns %o0: status 406f08978b0STushar Dave * %o1: #mapped 407f08978b0STushar Dave */ 408f08978b0STushar DaveENTRY(pci_sun4v_iotsb_map) 409f08978b0STushar Dave mov %o5, %g1 410f08978b0STushar Dave mov HV_FAST_PCI_IOTSB_MAP, %o5 411f08978b0STushar Dave ta HV_FAST_TRAP 412f08978b0STushar Dave retl 413f08978b0STushar Dave stx %o1, [%g1] 414f08978b0STushar DaveENDPROC(pci_sun4v_iotsb_map) 415f08978b0STushar Dave 416f08978b0STushar Dave /* 417f08978b0STushar Dave * %o0: devhandle 418f08978b0STushar Dave * %o1: iotsb_num/iotsb_handle 419f08978b0STushar Dave * %o2: iotsb_index 420f08978b0STushar Dave * %o3: #iottes 421f08978b0STushar Dave * %o4: &demapped 422f08978b0STushar Dave * 423f08978b0STushar Dave * returns %o0: status 424f08978b0STushar Dave * %o1: #demapped 425f08978b0STushar Dave */ 426f08978b0STushar DaveENTRY(pci_sun4v_iotsb_demap) 427f08978b0STushar Dave mov HV_FAST_PCI_IOTSB_DEMAP, %o5 428f08978b0STushar Dave ta HV_FAST_TRAP 429f08978b0STushar Dave retl 430f08978b0STushar Dave stx %o1, [%o4] 431f08978b0STushar DaveENDPROC(pci_sun4v_iotsb_demap) 432