1*b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 2a439fe51SSam Ravnborg #ifndef _ASM_SPARC64_TOPOLOGY_H 3a439fe51SSam Ravnborg #define _ASM_SPARC64_TOPOLOGY_H 4a439fe51SSam Ravnborg 5a439fe51SSam Ravnborg #ifdef CONFIG_NUMA 6a439fe51SSam Ravnborg 7a439fe51SSam Ravnborg #include <asm/mmzone.h> 8a439fe51SSam Ravnborg cpu_to_node(int cpu)9a439fe51SSam Ravnborgstatic inline int cpu_to_node(int cpu) 10a439fe51SSam Ravnborg { 11a439fe51SSam Ravnborg return numa_cpu_lookup_table[cpu]; 12a439fe51SSam Ravnborg } 13a439fe51SSam Ravnborg 14e5981fd6SAnton Blanchard #define cpumask_of_node(node) ((node) == -1 ? \ 15e5981fd6SAnton Blanchard cpu_all_mask : \ 16e5981fd6SAnton Blanchard &numa_cpumask_lookup_table[node]) 17a439fe51SSam Ravnborg 18a439fe51SSam Ravnborg struct pci_bus; 19a439fe51SSam Ravnborg #ifdef CONFIG_PCI 20f05a6865SSam Ravnborg int pcibus_to_node(struct pci_bus *pbus); 21a439fe51SSam Ravnborg #else pcibus_to_node(struct pci_bus * pbus)22a439fe51SSam Ravnborgstatic inline int pcibus_to_node(struct pci_bus *pbus) 23a439fe51SSam Ravnborg { 24a439fe51SSam Ravnborg return -1; 25a439fe51SSam Ravnborg } 26a439fe51SSam Ravnborg #endif 27a439fe51SSam Ravnborg 289d079337SDavid Miller #define cpumask_of_pcibus(bus) \ 299d079337SDavid Miller (pcibus_to_node(bus) == -1 ? \ 30e9b37512SRusty Russell cpu_all_mask : \ 319d079337SDavid Miller cpumask_of_node(pcibus_to_node(bus))) 32a439fe51SSam Ravnborg 3352708d69SNitin Gupta int __node_distance(int, int); 3452708d69SNitin Gupta #define node_distance(a, b) __node_distance(a, b) 3552708d69SNitin Gupta 36a439fe51SSam Ravnborg #else /* CONFIG_NUMA */ 37a439fe51SSam Ravnborg 38a439fe51SSam Ravnborg #include <asm-generic/topology.h> 39a439fe51SSam Ravnborg 40a439fe51SSam Ravnborg #endif /* !(CONFIG_NUMA) */ 41a439fe51SSam Ravnborg 42a439fe51SSam Ravnborg #ifdef CONFIG_SMP 43fc5e8c28SBen Hutchings 44fc5e8c28SBen Hutchings #include <asm/cpudata.h> 45fc5e8c28SBen Hutchings 46a439fe51SSam Ravnborg #define topology_physical_package_id(cpu) (cpu_data(cpu).proc_id) 47a439fe51SSam Ravnborg #define topology_core_id(cpu) (cpu_data(cpu).core_id) 48acc455cfSchris hyser #define topology_core_cpumask(cpu) (&cpu_core_sib_map[cpu]) 49d624716bSAtish Patra #define topology_core_cache_cpumask(cpu) (&cpu_core_sib_cache_map[cpu]) 5006931e62SBartosz Golaszewski #define topology_sibling_cpumask(cpu) (&per_cpu(cpu_sibling_map, cpu)) 51a439fe51SSam Ravnborg #endif /* CONFIG_SMP */ 52a439fe51SSam Ravnborg 533905c54fSStephen Rothwell extern cpumask_t cpu_core_map[NR_CPUS]; 54acc455cfSchris hyser extern cpumask_t cpu_core_sib_map[NR_CPUS]; 55d624716bSAtish Patra extern cpumask_t cpu_core_sib_cache_map[NR_CPUS]; 56d624716bSAtish Patra 57d624716bSAtish Patra /** 58d624716bSAtish Patra * Return cores that shares the last level cache. 59d624716bSAtish Patra */ cpu_coregroup_mask(int cpu)603905c54fSStephen Rothwellstatic inline const struct cpumask *cpu_coregroup_mask(int cpu) 613905c54fSStephen Rothwell { 62d624716bSAtish Patra return &cpu_core_sib_cache_map[cpu]; 633905c54fSStephen Rothwell } 64a439fe51SSam Ravnborg 65a439fe51SSam Ravnborg #endif /* _ASM_SPARC64_TOPOLOGY_H */ 66