1*b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 2a439fe51SSam Ravnborg /* 3a439fe51SSam Ravnborg * Machine dependent access functions for RTC registers. 4a439fe51SSam Ravnborg */ 5a439fe51SSam Ravnborg #ifndef __ASM_SPARC_MC146818RTC_H 6a439fe51SSam Ravnborg #define __ASM_SPARC_MC146818RTC_H 7a439fe51SSam Ravnborg 8a439fe51SSam Ravnborg #include <asm/io.h> 9a439fe51SSam Ravnborg 10a439fe51SSam Ravnborg #ifndef RTC_PORT 11a439fe51SSam Ravnborg #define RTC_PORT(x) (0x70 + (x)) 12a439fe51SSam Ravnborg #define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */ 13a439fe51SSam Ravnborg #endif 14a439fe51SSam Ravnborg 15a439fe51SSam Ravnborg /* 16a439fe51SSam Ravnborg * The yet supported machines all access the RTC index register via 17a439fe51SSam Ravnborg * an ISA port access but the way to access the date register differs ... 18a439fe51SSam Ravnborg */ 19a439fe51SSam Ravnborg #define CMOS_READ(addr) ({ \ 20a439fe51SSam Ravnborg outb_p((addr),RTC_PORT(0)); \ 21a439fe51SSam Ravnborg inb_p(RTC_PORT(1)); \ 22a439fe51SSam Ravnborg }) 23a439fe51SSam Ravnborg #define CMOS_WRITE(val, addr) ({ \ 24a439fe51SSam Ravnborg outb_p((addr),RTC_PORT(0)); \ 25a439fe51SSam Ravnborg outb_p((val),RTC_PORT(1)); \ 26a439fe51SSam Ravnborg }) 27a439fe51SSam Ravnborg 28a439fe51SSam Ravnborg #define RTC_IRQ 8 29a439fe51SSam Ravnborg 30a439fe51SSam Ravnborg #endif /* __ASM_SPARC_MC146818RTC_H */ 31