1*b4edf06cSAl Viro /* SPDX-License-Identifier: GPL-2.0 */ 2*b4edf06cSAl Viro #ifndef __ASM_EXTABLE_H 3*b4edf06cSAl Viro #define __ASM_EXTABLE_H 4*b4edf06cSAl Viro /* 5*b4edf06cSAl Viro * The exception table consists of pairs of addresses: the first is the 6*b4edf06cSAl Viro * address of an instruction that is allowed to fault, and the second is 7*b4edf06cSAl Viro * the address at which the program should continue. No registers are 8*b4edf06cSAl Viro * modified, so it is entirely up to the continuation code to figure out 9*b4edf06cSAl Viro * what to do. 10*b4edf06cSAl Viro * 11*b4edf06cSAl Viro * All the routines below use bits of fixup code that are out of line 12*b4edf06cSAl Viro * with the main instruction path. This means when everything is well, 13*b4edf06cSAl Viro * we don't even have to jump over them. Further, they do not intrude 14*b4edf06cSAl Viro * on our cache or tlb entries. 15*b4edf06cSAl Viro */ 16*b4edf06cSAl Viro 17*b4edf06cSAl Viro struct exception_table_entry { 18*b4edf06cSAl Viro unsigned int insn, fixup; 19*b4edf06cSAl Viro }; 20*b4edf06cSAl Viro 21*b4edf06cSAl Viro #endif 22