1*b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 2a439fe51SSam Ravnborg #ifndef __ASMSPARC_ELF_H 3a439fe51SSam Ravnborg #define __ASMSPARC_ELF_H 4a439fe51SSam Ravnborg 5a439fe51SSam Ravnborg /* 6a439fe51SSam Ravnborg * ELF register definitions.. 7a439fe51SSam Ravnborg */ 8a439fe51SSam Ravnborg 9a439fe51SSam Ravnborg #include <asm/ptrace.h> 10a439fe51SSam Ravnborg 11a439fe51SSam Ravnborg /* 12a439fe51SSam Ravnborg * Sparc section types 13a439fe51SSam Ravnborg */ 14a439fe51SSam Ravnborg #define STT_REGISTER 13 15a439fe51SSam Ravnborg 16a439fe51SSam Ravnborg /* 17a439fe51SSam Ravnborg * Sparc ELF relocation types 18a439fe51SSam Ravnborg */ 19a439fe51SSam Ravnborg #define R_SPARC_NONE 0 20a439fe51SSam Ravnborg #define R_SPARC_8 1 21a439fe51SSam Ravnborg #define R_SPARC_16 2 22a439fe51SSam Ravnborg #define R_SPARC_32 3 23a439fe51SSam Ravnborg #define R_SPARC_DISP8 4 24a439fe51SSam Ravnborg #define R_SPARC_DISP16 5 25a439fe51SSam Ravnborg #define R_SPARC_DISP32 6 26a439fe51SSam Ravnborg #define R_SPARC_WDISP30 7 27a439fe51SSam Ravnborg #define R_SPARC_WDISP22 8 28a439fe51SSam Ravnborg #define R_SPARC_HI22 9 29a439fe51SSam Ravnborg #define R_SPARC_22 10 30a439fe51SSam Ravnborg #define R_SPARC_13 11 31a439fe51SSam Ravnborg #define R_SPARC_LO10 12 32a439fe51SSam Ravnborg #define R_SPARC_GOT10 13 33a439fe51SSam Ravnborg #define R_SPARC_GOT13 14 34a439fe51SSam Ravnborg #define R_SPARC_GOT22 15 35a439fe51SSam Ravnborg #define R_SPARC_PC10 16 36a439fe51SSam Ravnborg #define R_SPARC_PC22 17 37a439fe51SSam Ravnborg #define R_SPARC_WPLT30 18 38a439fe51SSam Ravnborg #define R_SPARC_COPY 19 39a439fe51SSam Ravnborg #define R_SPARC_GLOB_DAT 20 40a439fe51SSam Ravnborg #define R_SPARC_JMP_SLOT 21 41a439fe51SSam Ravnborg #define R_SPARC_RELATIVE 22 42a439fe51SSam Ravnborg #define R_SPARC_UA32 23 43a439fe51SSam Ravnborg #define R_SPARC_PLT32 24 44a439fe51SSam Ravnborg #define R_SPARC_HIPLT22 25 45a439fe51SSam Ravnborg #define R_SPARC_LOPLT10 26 46a439fe51SSam Ravnborg #define R_SPARC_PCPLT32 27 47a439fe51SSam Ravnborg #define R_SPARC_PCPLT22 28 48a439fe51SSam Ravnborg #define R_SPARC_PCPLT10 29 49a439fe51SSam Ravnborg #define R_SPARC_10 30 50a439fe51SSam Ravnborg #define R_SPARC_11 31 51a439fe51SSam Ravnborg #define R_SPARC_64 32 52a439fe51SSam Ravnborg #define R_SPARC_OLO10 33 53a439fe51SSam Ravnborg #define R_SPARC_WDISP16 40 54a439fe51SSam Ravnborg #define R_SPARC_WDISP19 41 55a439fe51SSam Ravnborg #define R_SPARC_7 43 56a439fe51SSam Ravnborg #define R_SPARC_5 44 57a439fe51SSam Ravnborg #define R_SPARC_6 45 58a439fe51SSam Ravnborg 59a439fe51SSam Ravnborg /* Bits present in AT_HWCAP, primarily for Sparc32. */ 60a439fe51SSam Ravnborg 61a439fe51SSam Ravnborg #define HWCAP_SPARC_FLUSH 1 /* CPU supports flush instruction. */ 62a439fe51SSam Ravnborg #define HWCAP_SPARC_STBAR 2 63a439fe51SSam Ravnborg #define HWCAP_SPARC_SWAP 4 64a439fe51SSam Ravnborg #define HWCAP_SPARC_MULDIV 8 65a439fe51SSam Ravnborg #define HWCAP_SPARC_V9 16 66a439fe51SSam Ravnborg #define HWCAP_SPARC_ULTRA3 32 67a439fe51SSam Ravnborg 68a439fe51SSam Ravnborg #define CORE_DUMP_USE_REGSET 69a439fe51SSam Ravnborg 70a439fe51SSam Ravnborg /* Format is: 71a439fe51SSam Ravnborg * G0 --> G7 72a439fe51SSam Ravnborg * O0 --> O7 73a439fe51SSam Ravnborg * L0 --> L7 74a439fe51SSam Ravnborg * I0 --> I7 75a439fe51SSam Ravnborg * PSR, PC, nPC, Y, WIM, TBR 76a439fe51SSam Ravnborg */ 77a439fe51SSam Ravnborg typedef unsigned long elf_greg_t; 78a439fe51SSam Ravnborg #define ELF_NGREG 38 79a439fe51SSam Ravnborg typedef elf_greg_t elf_gregset_t[ELF_NGREG]; 80a439fe51SSam Ravnborg 81a439fe51SSam Ravnborg typedef struct { 82a439fe51SSam Ravnborg union { 83a439fe51SSam Ravnborg unsigned long pr_regs[32]; 84a439fe51SSam Ravnborg double pr_dregs[16]; 85a439fe51SSam Ravnborg } pr_fr; 86a439fe51SSam Ravnborg unsigned long __unused; 87a439fe51SSam Ravnborg unsigned long pr_fsr; 88a439fe51SSam Ravnborg unsigned char pr_qcnt; 89a439fe51SSam Ravnborg unsigned char pr_q_entrysize; 90a439fe51SSam Ravnborg unsigned char pr_en; 91a439fe51SSam Ravnborg unsigned int pr_q[64]; 92a439fe51SSam Ravnborg } elf_fpregset_t; 93a439fe51SSam Ravnborg 94a439fe51SSam Ravnborg #include <asm/mbus.h> 95a439fe51SSam Ravnborg 96a439fe51SSam Ravnborg /* 97a439fe51SSam Ravnborg * This is used to ensure we don't load something for the wrong architecture. 98a439fe51SSam Ravnborg */ 99a439fe51SSam Ravnborg #define elf_check_arch(x) ((x)->e_machine == EM_SPARC) 100a439fe51SSam Ravnborg 101a439fe51SSam Ravnborg /* 102a439fe51SSam Ravnborg * These are used to set parameters in the core dumps. 103a439fe51SSam Ravnborg */ 104a439fe51SSam Ravnborg #define ELF_ARCH EM_SPARC 105a439fe51SSam Ravnborg #define ELF_CLASS ELFCLASS32 106a439fe51SSam Ravnborg #define ELF_DATA ELFDATA2MSB 107a439fe51SSam Ravnborg 108a439fe51SSam Ravnborg #define ELF_EXEC_PAGESIZE 4096 109a439fe51SSam Ravnborg 110a439fe51SSam Ravnborg 111a439fe51SSam Ravnborg /* This is the location that an ET_DYN program is loaded if exec'ed. Typical 112a439fe51SSam Ravnborg use of this is to invoke "./ld.so someprog" to test out a new version of 113a439fe51SSam Ravnborg the loader. We need to make sure that it is out of the way of the program 114a439fe51SSam Ravnborg that it will "exec", and that there is sufficient room for the brk. */ 115a439fe51SSam Ravnborg 116a439fe51SSam Ravnborg #define ELF_ET_DYN_BASE (TASK_UNMAPPED_BASE) 117a439fe51SSam Ravnborg 118a439fe51SSam Ravnborg /* This yields a mask that user programs can use to figure out what 119a439fe51SSam Ravnborg instruction set this cpu supports. This can NOT be done in userspace 120a439fe51SSam Ravnborg on Sparc. */ 121a439fe51SSam Ravnborg 122c7020eb4SDavid S. Miller /* Most sun4m's have them all. */ 123c7020eb4SDavid S. Miller #define ELF_HWCAP (HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR | \ 124c7020eb4SDavid S. Miller HWCAP_SPARC_SWAP | HWCAP_SPARC_MULDIV) 125a439fe51SSam Ravnborg 126a439fe51SSam Ravnborg /* This yields a string that ld.so will use to load implementation 127a439fe51SSam Ravnborg specific libraries for optimization. This is more specific in 128a439fe51SSam Ravnborg intent than poking at uname or /proc/cpuinfo. */ 129a439fe51SSam Ravnborg 130a439fe51SSam Ravnborg #define ELF_PLATFORM (NULL) 131a439fe51SSam Ravnborg 132a439fe51SSam Ravnborg #endif /* !(__ASMSPARC_ELF_H) */ 133