1e5723e0eSPaul Mundt /* 2e5723e0eSPaul Mundt * SH7710 Setup 3e5723e0eSPaul Mundt * 4e5723e0eSPaul Mundt * Copyright (C) 2006 Paul Mundt 59465a54fSNobuhiro Iwamatsu * Copyright (C) 2007 Nobuhiro Iwamatsu 6e5723e0eSPaul Mundt * 7e5723e0eSPaul Mundt * This file is subject to the terms and conditions of the GNU General Public 8e5723e0eSPaul Mundt * License. See the file "COPYING" in the main directory of this archive 9e5723e0eSPaul Mundt * for more details. 10e5723e0eSPaul Mundt */ 11e5723e0eSPaul Mundt #include <linux/platform_device.h> 12e5723e0eSPaul Mundt #include <linux/init.h> 13*28b146c8SMagnus Damm #include <linux/irq.h> 14e5723e0eSPaul Mundt #include <linux/serial.h> 15e5723e0eSPaul Mundt #include <asm/sci.h> 16e5723e0eSPaul Mundt 17*28b146c8SMagnus Damm enum { 18*28b146c8SMagnus Damm UNUSED = 0, 19*28b146c8SMagnus Damm 20*28b146c8SMagnus Damm /* interrupt sources */ 21*28b146c8SMagnus Damm IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, 22*28b146c8SMagnus Damm DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3, 23*28b146c8SMagnus Damm SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI, 24*28b146c8SMagnus Damm SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI, 25*28b146c8SMagnus Damm DMAC_DEI4, DMAC_DEI5, 26*28b146c8SMagnus Damm IPSEC, 27*28b146c8SMagnus Damm EDMAC0, EDMAC1, EDMAC2, 28*28b146c8SMagnus Damm SIOF0_ERI, SIOF0_TXI, SIOF0_RXI, SIOF0_CCI, 29*28b146c8SMagnus Damm SIOF1_ERI, SIOF1_TXI, SIOF1_RXI, SIOF1_CCI, 30*28b146c8SMagnus Damm TMU0, TMU1, TMU2, 31*28b146c8SMagnus Damm RTC_ATI, RTC_PRI, RTC_CUI, 32*28b146c8SMagnus Damm WDT, 33*28b146c8SMagnus Damm REF, 34*28b146c8SMagnus Damm 35*28b146c8SMagnus Damm /* interrupt groups */ 36*28b146c8SMagnus Damm RTC, DMAC1, SCIF0, SCIF1, DMAC2, SIOF0, SIOF1, 37*28b146c8SMagnus Damm }; 38*28b146c8SMagnus Damm 39*28b146c8SMagnus Damm static struct intc_vect vectors[] = { 40*28b146c8SMagnus Damm INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0), 41*28b146c8SMagnus Damm INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820), 42*28b146c8SMagnus Damm INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860), 43*28b146c8SMagnus Damm INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0), 44*28b146c8SMagnus Damm INTC_VECT(SCIF0_BRI, 0x8c0), INTC_VECT(SCIF0_TXI, 0x8e0), 45*28b146c8SMagnus Damm INTC_VECT(SCIF1_ERI, 0x900), INTC_VECT(SCIF1_RXI, 0x920), 46*28b146c8SMagnus Damm INTC_VECT(SCIF1_BRI, 0x940), INTC_VECT(SCIF1_TXI, 0x960), 47*28b146c8SMagnus Damm INTC_VECT(DMAC_DEI4, 0xb80), INTC_VECT(DMAC_DEI5, 0xba0), 48*28b146c8SMagnus Damm INTC_VECT(IPSEC, 0xbe0), 49*28b146c8SMagnus Damm INTC_VECT(EDMAC0, 0xc00), INTC_VECT(EDMAC1, 0xc20), 50*28b146c8SMagnus Damm INTC_VECT(EDMAC2, 0xc40), 51*28b146c8SMagnus Damm INTC_VECT(SIOF0_ERI, 0xe00), INTC_VECT(SIOF0_TXI, 0xe20), 52*28b146c8SMagnus Damm INTC_VECT(SIOF0_RXI, 0xe40), INTC_VECT(SIOF0_CCI, 0xe60), 53*28b146c8SMagnus Damm INTC_VECT(SIOF1_ERI, 0xe80), INTC_VECT(SIOF1_TXI, 0xea0), 54*28b146c8SMagnus Damm INTC_VECT(SIOF1_RXI, 0xec0), INTC_VECT(SIOF1_CCI, 0xee0), 55*28b146c8SMagnus Damm INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), 56*28b146c8SMagnus Damm INTC_VECT(TMU2, 0x440), 57*28b146c8SMagnus Damm INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0), 58*28b146c8SMagnus Damm INTC_VECT(RTC_CUI, 0x4c0), 59*28b146c8SMagnus Damm INTC_VECT(WDT, 0x560), 60*28b146c8SMagnus Damm INTC_VECT(REF, 0x580), 61*28b146c8SMagnus Damm }; 62*28b146c8SMagnus Damm 63*28b146c8SMagnus Damm static struct intc_group groups[] = { 64*28b146c8SMagnus Damm INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI), 65*28b146c8SMagnus Damm INTC_GROUP(DMAC1, DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3), 66*28b146c8SMagnus Damm INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI), 67*28b146c8SMagnus Damm INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI), 68*28b146c8SMagnus Damm INTC_GROUP(DMAC2, DMAC_DEI4, DMAC_DEI5), 69*28b146c8SMagnus Damm INTC_GROUP(SIOF0, SIOF0_ERI, SIOF0_TXI, SIOF0_RXI, SIOF0_CCI), 70*28b146c8SMagnus Damm INTC_GROUP(SIOF1, SIOF1_ERI, SIOF1_TXI, SIOF1_RXI, SIOF1_CCI), 71*28b146c8SMagnus Damm }; 72*28b146c8SMagnus Damm 73*28b146c8SMagnus Damm static struct intc_prio priorities[] = { 74*28b146c8SMagnus Damm INTC_PRIO(DMAC1, 7), 75*28b146c8SMagnus Damm INTC_PRIO(DMAC2, 7), 76*28b146c8SMagnus Damm INTC_PRIO(SCIF0, 3), 77*28b146c8SMagnus Damm INTC_PRIO(SCIF1, 3), 78*28b146c8SMagnus Damm INTC_PRIO(SIOF0, 3), 79*28b146c8SMagnus Damm INTC_PRIO(SIOF1, 3), 80*28b146c8SMagnus Damm INTC_PRIO(EDMAC0, 5), 81*28b146c8SMagnus Damm INTC_PRIO(EDMAC1, 5), 82*28b146c8SMagnus Damm INTC_PRIO(EDMAC2, 5), 83*28b146c8SMagnus Damm }; 84*28b146c8SMagnus Damm 85*28b146c8SMagnus Damm static struct intc_prio_reg prio_registers[] = { 86*28b146c8SMagnus Damm { 0xfffffee2, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } }, 87*28b146c8SMagnus Damm { 0xfffffee4, 16, 4, /* IPRB */ { WDT, REF, 0, 0 } }, 88*28b146c8SMagnus Damm { 0xa4000016, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } }, 89*28b146c8SMagnus Damm { 0xa4000018, 16, 4, /* IPRD */ { 0, 0, IRQ4, IRQ5 } }, 90*28b146c8SMagnus Damm { 0xa400001a, 16, 4, /* IPRE */ { DMAC1, SCIF0, SCIF1 } }, 91*28b146c8SMagnus Damm { 0xa4080000, 16, 4, /* IPRF */ { IPSEC, DMAC2 } }, 92*28b146c8SMagnus Damm { 0xa4080002, 16, 4, /* IPRG */ { EDMAC0, EDMAC1, EDMAC2 } }, 93*28b146c8SMagnus Damm { 0xa4080004, 16, 4, /* IPRH */ { 0, 0, 0, SIOF0 } }, 94*28b146c8SMagnus Damm { 0xa4080006, 16, 4, /* IPRI */ { 0, 0, SIOF1 } }, 95*28b146c8SMagnus Damm }; 96*28b146c8SMagnus Damm 97*28b146c8SMagnus Damm static DECLARE_INTC_DESC(intc_desc, "sh7710", vectors, groups, 98*28b146c8SMagnus Damm priorities, NULL, prio_registers, NULL); 99*28b146c8SMagnus Damm 100*28b146c8SMagnus Damm static struct intc_vect vectors_irq[] = { 101*28b146c8SMagnus Damm INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620), 102*28b146c8SMagnus Damm INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660), 103*28b146c8SMagnus Damm }; 104*28b146c8SMagnus Damm 105*28b146c8SMagnus Damm static DECLARE_INTC_DESC(intc_desc_irq, "sh7710-irq", vectors_irq, NULL, 106*28b146c8SMagnus Damm priorities, NULL, prio_registers, NULL); 107*28b146c8SMagnus Damm 108*28b146c8SMagnus Damm static struct resource rtc_resources[] = { 109*28b146c8SMagnus Damm [0] = { 110*28b146c8SMagnus Damm .start = 0xa413fec0, 111*28b146c8SMagnus Damm .end = 0xa413fec0 + 0x1e, 112*28b146c8SMagnus Damm .flags = IORESOURCE_IO, 113*28b146c8SMagnus Damm }, 114*28b146c8SMagnus Damm [1] = { 115*28b146c8SMagnus Damm .start = 20, 116*28b146c8SMagnus Damm .flags = IORESOURCE_IRQ, 117*28b146c8SMagnus Damm }, 118*28b146c8SMagnus Damm [2] = { 119*28b146c8SMagnus Damm .start = 21, 120*28b146c8SMagnus Damm .flags = IORESOURCE_IRQ, 121*28b146c8SMagnus Damm }, 122*28b146c8SMagnus Damm [3] = { 123*28b146c8SMagnus Damm .start = 22, 124*28b146c8SMagnus Damm .flags = IORESOURCE_IRQ, 125*28b146c8SMagnus Damm }, 126*28b146c8SMagnus Damm }; 127*28b146c8SMagnus Damm 128*28b146c8SMagnus Damm static struct platform_device rtc_device = { 129*28b146c8SMagnus Damm .name = "sh-rtc", 130*28b146c8SMagnus Damm .id = -1, 131*28b146c8SMagnus Damm .num_resources = ARRAY_SIZE(rtc_resources), 132*28b146c8SMagnus Damm .resource = rtc_resources, 133*28b146c8SMagnus Damm }; 134*28b146c8SMagnus Damm 135e5723e0eSPaul Mundt static struct plat_sci_port sci_platform_data[] = { 136e5723e0eSPaul Mundt { 137e5723e0eSPaul Mundt .mapbase = 0xa4400000, 138e5723e0eSPaul Mundt .flags = UPF_BOOT_AUTOCONF, 139e5723e0eSPaul Mundt .type = PORT_SCIF, 140e5723e0eSPaul Mundt .irqs = { 52, 53, 55, 54 }, 141e5723e0eSPaul Mundt }, { 142*28b146c8SMagnus Damm .mapbase = 0xa4410000, 1439465a54fSNobuhiro Iwamatsu .flags = UPF_BOOT_AUTOCONF, 1449465a54fSNobuhiro Iwamatsu .type = PORT_SCIF, 1459465a54fSNobuhiro Iwamatsu .irqs = { 56, 57, 59, 58 }, 1469465a54fSNobuhiro Iwamatsu }, { 1479465a54fSNobuhiro Iwamatsu 148e5723e0eSPaul Mundt .flags = 0, 149e5723e0eSPaul Mundt } 150e5723e0eSPaul Mundt }; 151e5723e0eSPaul Mundt 152e5723e0eSPaul Mundt static struct platform_device sci_device = { 153e5723e0eSPaul Mundt .name = "sh-sci", 154e5723e0eSPaul Mundt .id = -1, 155e5723e0eSPaul Mundt .dev = { 156e5723e0eSPaul Mundt .platform_data = sci_platform_data, 157e5723e0eSPaul Mundt }, 158e5723e0eSPaul Mundt }; 159e5723e0eSPaul Mundt 160e5723e0eSPaul Mundt static struct platform_device *sh7710_devices[] __initdata = { 161e5723e0eSPaul Mundt &sci_device, 162*28b146c8SMagnus Damm &rtc_device, 163e5723e0eSPaul Mundt }; 164e5723e0eSPaul Mundt 165e5723e0eSPaul Mundt static int __init sh7710_devices_setup(void) 166e5723e0eSPaul Mundt { 167e5723e0eSPaul Mundt return platform_add_devices(sh7710_devices, 168e5723e0eSPaul Mundt ARRAY_SIZE(sh7710_devices)); 169e5723e0eSPaul Mundt } 170e5723e0eSPaul Mundt __initcall(sh7710_devices_setup); 1719465a54fSNobuhiro Iwamatsu 172*28b146c8SMagnus Damm void __init plat_irq_setup_pins(int mode) 173*28b146c8SMagnus Damm { 174*28b146c8SMagnus Damm if (mode == IRQ_MODE_IRQ) { 175*28b146c8SMagnus Damm register_intc_controller(&intc_desc_irq); 176*28b146c8SMagnus Damm return; 177*28b146c8SMagnus Damm } 178*28b146c8SMagnus Damm BUG(); 179*28b146c8SMagnus Damm } 18068abdbbbSMagnus Damm 18190015c89SMagnus Damm void __init plat_irq_setup(void) 1829465a54fSNobuhiro Iwamatsu { 183*28b146c8SMagnus Damm register_intc_controller(&intc_desc); 1849465a54fSNobuhiro Iwamatsu } 185