1*b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 20c601231SPaul Mundt #ifndef __ASM_SH_CPU_SH4_DMA_SH7780_H 30c601231SPaul Mundt #define __ASM_SH_CPU_SH4_DMA_SH7780_H 40c601231SPaul Mundt 50c601231SPaul Mundt #include <linux/sh_intc.h> 60c601231SPaul Mundt 70c601231SPaul Mundt #if defined(CONFIG_CPU_SUBTYPE_SH7343) || \ 80c601231SPaul Mundt defined(CONFIG_CPU_SUBTYPE_SH7730) 90c601231SPaul Mundt #define DMTE0_IRQ evt2irq(0x800) 100c601231SPaul Mundt #define DMTE4_IRQ evt2irq(0xb80) 110c601231SPaul Mundt #define DMAE0_IRQ evt2irq(0xbc0) /* DMA Error IRQ*/ 120c601231SPaul Mundt #define SH_DMAC_BASE0 0xFE008020 130c601231SPaul Mundt #elif defined(CONFIG_CPU_SUBTYPE_SH7722) 140c601231SPaul Mundt #define DMTE0_IRQ evt2irq(0x800) 150c601231SPaul Mundt #define DMTE4_IRQ evt2irq(0xb80) 160c601231SPaul Mundt #define DMAE0_IRQ evt2irq(0xbc0) /* DMA Error IRQ*/ 170c601231SPaul Mundt #define SH_DMAC_BASE0 0xFE008020 18455f9726SRichard Weinberger #elif defined(CONFIG_CPU_SUBTYPE_SH7763) 190c601231SPaul Mundt #define DMTE0_IRQ evt2irq(0x640) 200c601231SPaul Mundt #define DMTE4_IRQ evt2irq(0x780) 210c601231SPaul Mundt #define DMAE0_IRQ evt2irq(0x6c0) 220c601231SPaul Mundt #define SH_DMAC_BASE0 0xFF608020 230c601231SPaul Mundt #elif defined(CONFIG_CPU_SUBTYPE_SH7723) 240c601231SPaul Mundt #define DMTE0_IRQ evt2irq(0x800) /* DMAC0A*/ 250c601231SPaul Mundt #define DMTE4_IRQ evt2irq(0xb80) /* DMAC0B */ 260c601231SPaul Mundt #define DMTE6_IRQ evt2irq(0x700) 270c601231SPaul Mundt #define DMTE8_IRQ evt2irq(0x740) /* DMAC1A */ 280c601231SPaul Mundt #define DMTE9_IRQ evt2irq(0x760) 290c601231SPaul Mundt #define DMTE10_IRQ evt2irq(0xb00) /* DMAC1B */ 300c601231SPaul Mundt #define DMTE11_IRQ evt2irq(0xb20) 310c601231SPaul Mundt #define DMAE0_IRQ evt2irq(0xbc0) /* DMA Error IRQ*/ 320c601231SPaul Mundt #define DMAE1_IRQ evt2irq(0xb40) /* DMA Error IRQ*/ 330c601231SPaul Mundt #define SH_DMAC_BASE0 0xFE008020 340c601231SPaul Mundt #define SH_DMAC_BASE1 0xFDC08020 350c601231SPaul Mundt #elif defined(CONFIG_CPU_SUBTYPE_SH7724) 360c601231SPaul Mundt #define DMTE0_IRQ evt2irq(0x800) /* DMAC0A*/ 370c601231SPaul Mundt #define DMTE4_IRQ evt2irq(0xb80) /* DMAC0B */ 380c601231SPaul Mundt #define DMTE6_IRQ evt2irq(0x700) 390c601231SPaul Mundt #define DMTE8_IRQ evt2irq(0x740) /* DMAC1A */ 400c601231SPaul Mundt #define DMTE9_IRQ evt2irq(0x760) 410c601231SPaul Mundt #define DMTE10_IRQ evt2irq(0xb00) /* DMAC1B */ 420c601231SPaul Mundt #define DMTE11_IRQ evt2irq(0xb20) 430c601231SPaul Mundt #define DMAE0_IRQ evt2irq(0xbc0) /* DMA Error IRQ*/ 440c601231SPaul Mundt #define DMAE1_IRQ evt2irq(0xb40) /* DMA Error IRQ*/ 450c601231SPaul Mundt #define SH_DMAC_BASE0 0xFE008020 460c601231SPaul Mundt #define SH_DMAC_BASE1 0xFDC08020 470c601231SPaul Mundt #elif defined(CONFIG_CPU_SUBTYPE_SH7780) 480c601231SPaul Mundt #define DMTE0_IRQ evt2irq(0x640) 490c601231SPaul Mundt #define DMTE4_IRQ evt2irq(0x780) 500c601231SPaul Mundt #define DMTE6_IRQ evt2irq(0x7c0) 510c601231SPaul Mundt #define DMTE8_IRQ evt2irq(0xd80) 520c601231SPaul Mundt #define DMTE9_IRQ evt2irq(0xda0) 530c601231SPaul Mundt #define DMTE10_IRQ evt2irq(0xdc0) 540c601231SPaul Mundt #define DMTE11_IRQ evt2irq(0xde0) 550c601231SPaul Mundt #define DMAE0_IRQ evt2irq(0x6c0) /* DMA Error IRQ */ 560c601231SPaul Mundt #define SH_DMAC_BASE0 0xFC808020 570c601231SPaul Mundt #define SH_DMAC_BASE1 0xFC818020 580c601231SPaul Mundt #else /* SH7785 */ 590c601231SPaul Mundt #define DMTE0_IRQ evt2irq(0x620) 600c601231SPaul Mundt #define DMTE4_IRQ evt2irq(0x6a0) 610c601231SPaul Mundt #define DMTE6_IRQ evt2irq(0x880) 620c601231SPaul Mundt #define DMTE8_IRQ evt2irq(0x8c0) 630c601231SPaul Mundt #define DMTE9_IRQ evt2irq(0x8e0) 640c601231SPaul Mundt #define DMTE10_IRQ evt2irq(0x900) 650c601231SPaul Mundt #define DMTE11_IRQ evt2irq(0x920) 660c601231SPaul Mundt #define DMAE0_IRQ evt2irq(0x6e0) /* DMA Error IRQ0 */ 670c601231SPaul Mundt #define DMAE1_IRQ evt2irq(0x940) /* DMA Error IRQ1 */ 680c601231SPaul Mundt #define SH_DMAC_BASE0 0xFC808020 690c601231SPaul Mundt #define SH_DMAC_BASE1 0xFCC08020 700c601231SPaul Mundt #endif 710c601231SPaul Mundt 720c601231SPaul Mundt #endif /* __ASM_SH_CPU_SH4_DMA_SH7780_H */ 73