1f15cbe6fSPaul Mundt /* 2f15cbe6fSPaul Mundt * include/asm-sh/cpu-sh4/freq.h 3f15cbe6fSPaul Mundt * 4f15cbe6fSPaul Mundt * Copyright (C) 2002, 2003 Paul Mundt 5f15cbe6fSPaul Mundt * 6f15cbe6fSPaul Mundt * This file is subject to the terms and conditions of the GNU General Public 7f15cbe6fSPaul Mundt * License. See the file "COPYING" in the main directory of this archive 8f15cbe6fSPaul Mundt * for more details. 9f15cbe6fSPaul Mundt */ 10f15cbe6fSPaul Mundt #ifndef __ASM_CPU_SH4_FREQ_H 11f15cbe6fSPaul Mundt #define __ASM_CPU_SH4_FREQ_H 12f15cbe6fSPaul Mundt 13f15cbe6fSPaul Mundt #if defined(CONFIG_CPU_SUBTYPE_SH7722) || \ 14f15cbe6fSPaul Mundt defined(CONFIG_CPU_SUBTYPE_SH7723) || \ 15f15cbe6fSPaul Mundt defined(CONFIG_CPU_SUBTYPE_SH7343) || \ 16f15cbe6fSPaul Mundt defined(CONFIG_CPU_SUBTYPE_SH7366) 17f15cbe6fSPaul Mundt #define FRQCR 0xa4150000 18f15cbe6fSPaul Mundt #define VCLKCR 0xa4150004 19f15cbe6fSPaul Mundt #define SCLKACR 0xa4150008 20f15cbe6fSPaul Mundt #define SCLKBCR 0xa415000c 21f15cbe6fSPaul Mundt #define IrDACLKCR 0xa4150010 22f15cbe6fSPaul Mundt #define MSTPCR0 0xa4150030 23f15cbe6fSPaul Mundt #define MSTPCR1 0xa4150034 24f15cbe6fSPaul Mundt #define MSTPCR2 0xa4150038 25c01f0f1aSYoshihiro Shimoda #elif defined(CONFIG_CPU_SUBTYPE_SH7757) 26c01f0f1aSYoshihiro Shimoda #define FRQCR 0xffc80000 27c01f0f1aSYoshihiro Shimoda #define OSCCR 0xffc80018 28c01f0f1aSYoshihiro Shimoda #define PLLCR 0xffc80024 29f15cbe6fSPaul Mundt #elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \ 30f15cbe6fSPaul Mundt defined(CONFIG_CPU_SUBTYPE_SH7780) 31f15cbe6fSPaul Mundt #define FRQCR 0xffc80000 320207a2efSKuninori Morimoto #elif defined(CONFIG_CPU_SUBTYPE_SH7724) 330207a2efSKuninori Morimoto #define FRQCRA 0xa4150000 340207a2efSKuninori Morimoto #define FRQCRB 0xa4150004 350207a2efSKuninori Morimoto #define VCLKCR 0xa4150048 360207a2efSKuninori Morimoto 370207a2efSKuninori Morimoto #define FCLKACR 0xa4150008 380207a2efSKuninori Morimoto #define FCLKBCR 0xa415000c 390207a2efSKuninori Morimoto #define FRQCR FRQCRA 400207a2efSKuninori Morimoto #define SCLKACR FCLKACR 410207a2efSKuninori Morimoto #define SCLKBCR FCLKBCR 420207a2efSKuninori Morimoto #define FCLKACR 0xa4150008 430207a2efSKuninori Morimoto #define FCLKBCR 0xa415000c 440207a2efSKuninori Morimoto #define IrDACLKCR 0xa4150018 450207a2efSKuninori Morimoto 460207a2efSKuninori Morimoto #define MSTPCR0 0xa4150030 470207a2efSKuninori Morimoto #define MSTPCR1 0xa4150034 480207a2efSKuninori Morimoto #define MSTPCR2 0xa4150038 490207a2efSKuninori Morimoto 50f15cbe6fSPaul Mundt #elif defined(CONFIG_CPU_SUBTYPE_SH7785) 51f15cbe6fSPaul Mundt #define FRQCR0 0xffc80000 52f15cbe6fSPaul Mundt #define FRQCR1 0xffc80004 53f15cbe6fSPaul Mundt #define FRQMR1 0xffc80014 5455ba99ebSKuninori Morimoto #elif defined(CONFIG_CPU_SUBTYPE_SH7786) 5555ba99ebSKuninori Morimoto #define FRQCR0 0xffc40000 5655ba99ebSKuninori Morimoto #define FRQCR1 0xffc40004 5755ba99ebSKuninori Morimoto #define FRQMR1 0xffc40014 58f15cbe6fSPaul Mundt #elif defined(CONFIG_CPU_SUBTYPE_SHX3) 59*5924ad0dSPaul Mundt #define FRQCR0 0xffc00000 60*5924ad0dSPaul Mundt #define FRQCR1 0xffc00004 61*5924ad0dSPaul Mundt #define FRQMR1 0xffc00014 62f15cbe6fSPaul Mundt #else 63f15cbe6fSPaul Mundt #define FRQCR 0xffc00000 64f15cbe6fSPaul Mundt #define FRQCR_PSTBY 0x0200 65f15cbe6fSPaul Mundt #define FRQCR_PLLEN 0x0400 66f15cbe6fSPaul Mundt #define FRQCR_CKOEN 0x0800 67f15cbe6fSPaul Mundt #endif 68f15cbe6fSPaul Mundt #define MIN_DIVISOR_NR 0 69f15cbe6fSPaul Mundt #define MAX_DIVISOR_NR 3 70f15cbe6fSPaul Mundt 71f15cbe6fSPaul Mundt #endif /* __ASM_CPU_SH4_FREQ_H */ 72f15cbe6fSPaul Mundt 73