xref: /openbmc/linux/arch/sh/include/cpu-sh3/cpu/gpio.h (revision f15cbe6f1a4b4d9df59142fc8e4abb973302cf44)
1*f15cbe6fSPaul Mundt /*
2*f15cbe6fSPaul Mundt  *  include/asm-sh/cpu-sh3/gpio.h
3*f15cbe6fSPaul Mundt  *
4*f15cbe6fSPaul Mundt  *  Copyright (C) 2007  Markus Brunner, Mark Jonas
5*f15cbe6fSPaul Mundt  *
6*f15cbe6fSPaul Mundt  *  Addresses for the Pin Function Controller
7*f15cbe6fSPaul Mundt  *
8*f15cbe6fSPaul Mundt  * This file is subject to the terms and conditions of the GNU General Public
9*f15cbe6fSPaul Mundt  * License.  See the file "COPYING" in the main directory of this archive
10*f15cbe6fSPaul Mundt  * for more details.
11*f15cbe6fSPaul Mundt  */
12*f15cbe6fSPaul Mundt #ifndef _CPU_SH3_GPIO_H
13*f15cbe6fSPaul Mundt #define _CPU_SH3_GPIO_H
14*f15cbe6fSPaul Mundt 
15*f15cbe6fSPaul Mundt #if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
16*f15cbe6fSPaul Mundt     defined(CONFIG_CPU_SUBTYPE_SH7721)
17*f15cbe6fSPaul Mundt 
18*f15cbe6fSPaul Mundt /* Control registers */
19*f15cbe6fSPaul Mundt #define PORT_PACR	0xA4050100UL
20*f15cbe6fSPaul Mundt #define PORT_PBCR	0xA4050102UL
21*f15cbe6fSPaul Mundt #define PORT_PCCR	0xA4050104UL
22*f15cbe6fSPaul Mundt #define PORT_PDCR	0xA4050106UL
23*f15cbe6fSPaul Mundt #define PORT_PECR	0xA4050108UL
24*f15cbe6fSPaul Mundt #define PORT_PFCR	0xA405010AUL
25*f15cbe6fSPaul Mundt #define PORT_PGCR	0xA405010CUL
26*f15cbe6fSPaul Mundt #define PORT_PHCR	0xA405010EUL
27*f15cbe6fSPaul Mundt #define PORT_PJCR	0xA4050110UL
28*f15cbe6fSPaul Mundt #define PORT_PKCR	0xA4050112UL
29*f15cbe6fSPaul Mundt #define PORT_PLCR	0xA4050114UL
30*f15cbe6fSPaul Mundt #define PORT_PMCR	0xA4050116UL
31*f15cbe6fSPaul Mundt #define PORT_PPCR	0xA4050118UL
32*f15cbe6fSPaul Mundt #define PORT_PRCR	0xA405011AUL
33*f15cbe6fSPaul Mundt #define PORT_PSCR	0xA405011CUL
34*f15cbe6fSPaul Mundt #define PORT_PTCR	0xA405011EUL
35*f15cbe6fSPaul Mundt #define PORT_PUCR	0xA4050120UL
36*f15cbe6fSPaul Mundt #define PORT_PVCR	0xA4050122UL
37*f15cbe6fSPaul Mundt 
38*f15cbe6fSPaul Mundt /* Data registers */
39*f15cbe6fSPaul Mundt #define PORT_PADR	0xA4050140UL
40*f15cbe6fSPaul Mundt /* Address of PORT_PBDR is wrong in the datasheet, see errata 2005-09-21 */
41*f15cbe6fSPaul Mundt #define PORT_PBDR	0xA4050142UL
42*f15cbe6fSPaul Mundt #define PORT_PCDR	0xA4050144UL
43*f15cbe6fSPaul Mundt #define PORT_PDDR	0xA4050146UL
44*f15cbe6fSPaul Mundt #define PORT_PEDR	0xA4050148UL
45*f15cbe6fSPaul Mundt #define PORT_PFDR	0xA405014AUL
46*f15cbe6fSPaul Mundt #define PORT_PGDR	0xA405014CUL
47*f15cbe6fSPaul Mundt #define PORT_PHDR	0xA405014EUL
48*f15cbe6fSPaul Mundt #define PORT_PJDR	0xA4050150UL
49*f15cbe6fSPaul Mundt #define PORT_PKDR	0xA4050152UL
50*f15cbe6fSPaul Mundt #define PORT_PLDR	0xA4050154UL
51*f15cbe6fSPaul Mundt #define PORT_PMDR	0xA4050156UL
52*f15cbe6fSPaul Mundt #define PORT_PPDR	0xA4050158UL
53*f15cbe6fSPaul Mundt #define PORT_PRDR	0xA405015AUL
54*f15cbe6fSPaul Mundt #define PORT_PSDR	0xA405015CUL
55*f15cbe6fSPaul Mundt #define PORT_PTDR	0xA405015EUL
56*f15cbe6fSPaul Mundt #define PORT_PUDR	0xA4050160UL
57*f15cbe6fSPaul Mundt #define PORT_PVDR	0xA4050162UL
58*f15cbe6fSPaul Mundt 
59*f15cbe6fSPaul Mundt /* Pin Select Registers */
60*f15cbe6fSPaul Mundt #define PORT_PSELA	0xA4050124UL
61*f15cbe6fSPaul Mundt #define PORT_PSELB	0xA4050126UL
62*f15cbe6fSPaul Mundt #define PORT_PSELC	0xA4050128UL
63*f15cbe6fSPaul Mundt #define PORT_PSELD	0xA405012AUL
64*f15cbe6fSPaul Mundt 
65*f15cbe6fSPaul Mundt #endif
66*f15cbe6fSPaul Mundt 
67*f15cbe6fSPaul Mundt #endif
68