xref: /openbmc/linux/arch/sh/drivers/superhyway/ops-sh4-202.c (revision d5cb9783536a41df9f9cba5b0a1d78047ed787f7)
1*d5cb9783SPaul Mundt /*
2*d5cb9783SPaul Mundt  * arch/sh/drivers/superhyway/ops-sh4-202.c
3*d5cb9783SPaul Mundt  *
4*d5cb9783SPaul Mundt  * SuperHyway bus support for SH4-202
5*d5cb9783SPaul Mundt  *
6*d5cb9783SPaul Mundt  * Copyright (C) 2005  Paul Mundt
7*d5cb9783SPaul Mundt  *
8*d5cb9783SPaul Mundt  * This file is subject to the terms and conditions of the GNU
9*d5cb9783SPaul Mundt  * General Public License.  See the file "COPYING" in the main
10*d5cb9783SPaul Mundt  * directory of this archive for more details.
11*d5cb9783SPaul Mundt  */
12*d5cb9783SPaul Mundt #include <linux/kernel.h>
13*d5cb9783SPaul Mundt #include <linux/init.h>
14*d5cb9783SPaul Mundt #include <linux/superhyway.h>
15*d5cb9783SPaul Mundt #include <linux/string.h>
16*d5cb9783SPaul Mundt #include <asm/addrspace.h>
17*d5cb9783SPaul Mundt #include <asm/io.h>
18*d5cb9783SPaul Mundt 
19*d5cb9783SPaul Mundt #define PHYS_EMI_CBLOCK		P4SEGADDR(0x1ec00000)
20*d5cb9783SPaul Mundt #define PHYS_EMI_DBLOCK		P4SEGADDR(0x08000000)
21*d5cb9783SPaul Mundt #define PHYS_FEMI_CBLOCK	P4SEGADDR(0x1f800000)
22*d5cb9783SPaul Mundt #define PHYS_FEMI_DBLOCK	P4SEGADDR(0x00000000)
23*d5cb9783SPaul Mundt 
24*d5cb9783SPaul Mundt #define PHYS_EPBR_BLOCK		P4SEGADDR(0x1de00000)
25*d5cb9783SPaul Mundt #define PHYS_DMAC_BLOCK		P4SEGADDR(0x1fa00000)
26*d5cb9783SPaul Mundt #define PHYS_PBR_BLOCK		P4SEGADDR(0x1fc00000)
27*d5cb9783SPaul Mundt 
28*d5cb9783SPaul Mundt static struct resource emi_resources[] = {
29*d5cb9783SPaul Mundt 	[0] = {
30*d5cb9783SPaul Mundt 		.start	= PHYS_EMI_CBLOCK,
31*d5cb9783SPaul Mundt 		.end	= PHYS_EMI_CBLOCK + 0x00300000 - 1,
32*d5cb9783SPaul Mundt 		.flags	= IORESOURCE_MEM,
33*d5cb9783SPaul Mundt 	},
34*d5cb9783SPaul Mundt 	[1] = {
35*d5cb9783SPaul Mundt 		.start	= PHYS_EMI_DBLOCK,
36*d5cb9783SPaul Mundt 		.end	= PHYS_EMI_DBLOCK + 0x08000000 - 1,
37*d5cb9783SPaul Mundt 		.flags	= IORESOURCE_MEM,
38*d5cb9783SPaul Mundt 	},
39*d5cb9783SPaul Mundt };
40*d5cb9783SPaul Mundt 
41*d5cb9783SPaul Mundt static struct superhyway_device emi_device = {
42*d5cb9783SPaul Mundt 	.name		= "emi",
43*d5cb9783SPaul Mundt 	.num_resources	= ARRAY_SIZE(emi_resources),
44*d5cb9783SPaul Mundt 	.resource	= emi_resources,
45*d5cb9783SPaul Mundt };
46*d5cb9783SPaul Mundt 
47*d5cb9783SPaul Mundt static struct resource femi_resources[] = {
48*d5cb9783SPaul Mundt 	[0] = {
49*d5cb9783SPaul Mundt 		.start	= PHYS_FEMI_CBLOCK,
50*d5cb9783SPaul Mundt 		.end	= PHYS_FEMI_CBLOCK + 0x00100000 - 1,
51*d5cb9783SPaul Mundt 		.flags	= IORESOURCE_MEM,
52*d5cb9783SPaul Mundt 	},
53*d5cb9783SPaul Mundt 	[1] = {
54*d5cb9783SPaul Mundt 		.start	= PHYS_FEMI_DBLOCK,
55*d5cb9783SPaul Mundt 		.end	= PHYS_FEMI_DBLOCK + 0x08000000 - 1,
56*d5cb9783SPaul Mundt 		.flags	= IORESOURCE_MEM,
57*d5cb9783SPaul Mundt 	},
58*d5cb9783SPaul Mundt };
59*d5cb9783SPaul Mundt 
60*d5cb9783SPaul Mundt static struct superhyway_device femi_device = {
61*d5cb9783SPaul Mundt 	.name		= "femi",
62*d5cb9783SPaul Mundt 	.num_resources	= ARRAY_SIZE(femi_resources),
63*d5cb9783SPaul Mundt 	.resource	= femi_resources,
64*d5cb9783SPaul Mundt };
65*d5cb9783SPaul Mundt 
66*d5cb9783SPaul Mundt static struct resource epbr_resources[] = {
67*d5cb9783SPaul Mundt 	[0] = {
68*d5cb9783SPaul Mundt 		.start	= P4SEGADDR(0x1e7ffff8),
69*d5cb9783SPaul Mundt 		.end	= P4SEGADDR(0x1e7ffff8 + (sizeof(u32) * 2) - 1),
70*d5cb9783SPaul Mundt 		.flags	= IORESOURCE_MEM,
71*d5cb9783SPaul Mundt 	},
72*d5cb9783SPaul Mundt 	[1] = {
73*d5cb9783SPaul Mundt 		.start	= PHYS_EPBR_BLOCK,
74*d5cb9783SPaul Mundt 		.end	= PHYS_EPBR_BLOCK + 0x00a00000 - 1,
75*d5cb9783SPaul Mundt 		.flags	= IORESOURCE_MEM,
76*d5cb9783SPaul Mundt 	},
77*d5cb9783SPaul Mundt };
78*d5cb9783SPaul Mundt 
79*d5cb9783SPaul Mundt static struct superhyway_device epbr_device = {
80*d5cb9783SPaul Mundt 	.name		= "epbr",
81*d5cb9783SPaul Mundt 	.num_resources	= ARRAY_SIZE(epbr_resources),
82*d5cb9783SPaul Mundt 	.resource	= epbr_resources,
83*d5cb9783SPaul Mundt };
84*d5cb9783SPaul Mundt 
85*d5cb9783SPaul Mundt static struct resource dmac_resource = {
86*d5cb9783SPaul Mundt 	.start	= PHYS_DMAC_BLOCK,
87*d5cb9783SPaul Mundt 	.end	= PHYS_DMAC_BLOCK + 0x00100000 - 1,
88*d5cb9783SPaul Mundt 	.flags	= IORESOURCE_MEM,
89*d5cb9783SPaul Mundt };
90*d5cb9783SPaul Mundt 
91*d5cb9783SPaul Mundt static struct superhyway_device dmac_device = {
92*d5cb9783SPaul Mundt 	.name		= "dmac",
93*d5cb9783SPaul Mundt 	.num_resources	= 1,
94*d5cb9783SPaul Mundt 	.resource	= &dmac_resource,
95*d5cb9783SPaul Mundt };
96*d5cb9783SPaul Mundt 
97*d5cb9783SPaul Mundt static struct resource pbr_resources[] = {
98*d5cb9783SPaul Mundt 	[0] = {
99*d5cb9783SPaul Mundt 		.start	= P4SEGADDR(0x1ffffff8),
100*d5cb9783SPaul Mundt 		.end	= P4SEGADDR(0x1ffffff8 + (sizeof(u32) * 2) - 1),
101*d5cb9783SPaul Mundt 		.flags	= IORESOURCE_MEM,
102*d5cb9783SPaul Mundt 	},
103*d5cb9783SPaul Mundt 	[1] = {
104*d5cb9783SPaul Mundt 		.start	= PHYS_PBR_BLOCK,
105*d5cb9783SPaul Mundt 		.end	= PHYS_PBR_BLOCK + 0x00400000 - (sizeof(u32) * 2) - 1,
106*d5cb9783SPaul Mundt 		.flags	= IORESOURCE_MEM,
107*d5cb9783SPaul Mundt 	},
108*d5cb9783SPaul Mundt };
109*d5cb9783SPaul Mundt 
110*d5cb9783SPaul Mundt static struct superhyway_device pbr_device = {
111*d5cb9783SPaul Mundt 	.name		= "pbr",
112*d5cb9783SPaul Mundt 	.num_resources	= ARRAY_SIZE(pbr_resources),
113*d5cb9783SPaul Mundt 	.resource	= pbr_resources,
114*d5cb9783SPaul Mundt };
115*d5cb9783SPaul Mundt 
116*d5cb9783SPaul Mundt static struct superhyway_device *sh4202_devices[] __initdata = {
117*d5cb9783SPaul Mundt 	&emi_device, &femi_device, &epbr_device, &dmac_device, &pbr_device,
118*d5cb9783SPaul Mundt };
119*d5cb9783SPaul Mundt 
120*d5cb9783SPaul Mundt static int sh4202_read_vcr(unsigned long base, struct superhyway_vcr_info *vcr)
121*d5cb9783SPaul Mundt {
122*d5cb9783SPaul Mundt 	u32 vcrh, vcrl;
123*d5cb9783SPaul Mundt 	u64 tmp;
124*d5cb9783SPaul Mundt 
125*d5cb9783SPaul Mundt 	/*
126*d5cb9783SPaul Mundt 	 * XXX: Even though the SH4-202 Evaluation Device documentation
127*d5cb9783SPaul Mundt 	 * indicates that VCRL is mapped first with VCRH at a + 0x04
128*d5cb9783SPaul Mundt 	 * offset, the opposite seems to be true.
129*d5cb9783SPaul Mundt 	 *
130*d5cb9783SPaul Mundt 	 * Some modules (PBR and ePBR for instance) also appear to have
131*d5cb9783SPaul Mundt 	 * VCRL/VCRH flipped in the documentation, but on the SH4-202
132*d5cb9783SPaul Mundt 	 * itself it appears that these are all consistently mapped with
133*d5cb9783SPaul Mundt 	 * VCRH preceeding VCRL.
134*d5cb9783SPaul Mundt 	 *
135*d5cb9783SPaul Mundt 	 * Do not trust the documentation, for it is evil.
136*d5cb9783SPaul Mundt 	 */
137*d5cb9783SPaul Mundt 	vcrh = ctrl_inl(base);
138*d5cb9783SPaul Mundt 	vcrl = ctrl_inl(base + sizeof(u32));
139*d5cb9783SPaul Mundt 
140*d5cb9783SPaul Mundt 	tmp = ((u64)vcrh << 32) | vcrl;
141*d5cb9783SPaul Mundt 	memcpy(vcr, &tmp, sizeof(u64));
142*d5cb9783SPaul Mundt 
143*d5cb9783SPaul Mundt 	return 0;
144*d5cb9783SPaul Mundt }
145*d5cb9783SPaul Mundt 
146*d5cb9783SPaul Mundt static int sh4202_write_vcr(unsigned long base, struct superhyway_vcr_info vcr)
147*d5cb9783SPaul Mundt {
148*d5cb9783SPaul Mundt 	u64 tmp = *(u64 *)&vcr;
149*d5cb9783SPaul Mundt 
150*d5cb9783SPaul Mundt 	ctrl_outl((tmp >> 32) & 0xffffffff, base);
151*d5cb9783SPaul Mundt 	ctrl_outl(tmp & 0xffffffff, base + sizeof(u32));
152*d5cb9783SPaul Mundt 
153*d5cb9783SPaul Mundt 	return 0;
154*d5cb9783SPaul Mundt }
155*d5cb9783SPaul Mundt 
156*d5cb9783SPaul Mundt static struct superhyway_ops sh4202_superhyway_ops = {
157*d5cb9783SPaul Mundt 	.read_vcr	= sh4202_read_vcr,
158*d5cb9783SPaul Mundt 	.write_vcr	= sh4202_write_vcr,
159*d5cb9783SPaul Mundt };
160*d5cb9783SPaul Mundt 
161*d5cb9783SPaul Mundt struct superhyway_bus superhyway_channels[] = {
162*d5cb9783SPaul Mundt 	{ &sh4202_superhyway_ops, },
163*d5cb9783SPaul Mundt 	{ 0, },
164*d5cb9783SPaul Mundt };
165*d5cb9783SPaul Mundt 
166*d5cb9783SPaul Mundt int __init superhyway_scan_bus(struct superhyway_bus *bus)
167*d5cb9783SPaul Mundt {
168*d5cb9783SPaul Mundt 	return superhyway_add_devices(bus, sh4202_devices,
169*d5cb9783SPaul Mundt 				      ARRAY_SIZE(sh4202_devices));
170*d5cb9783SPaul Mundt }
171*d5cb9783SPaul Mundt 
172