xref: /openbmc/linux/arch/sh/drivers/superhyway/ops-sh4-202.c (revision 9d56dd3b083a3bec56e9da35ce07baca81030b03)
1d5cb9783SPaul Mundt /*
2d5cb9783SPaul Mundt  * arch/sh/drivers/superhyway/ops-sh4-202.c
3d5cb9783SPaul Mundt  *
4d5cb9783SPaul Mundt  * SuperHyway bus support for SH4-202
5d5cb9783SPaul Mundt  *
6d5cb9783SPaul Mundt  * Copyright (C) 2005  Paul Mundt
7d5cb9783SPaul Mundt  *
8d5cb9783SPaul Mundt  * This file is subject to the terms and conditions of the GNU
9d5cb9783SPaul Mundt  * General Public License.  See the file "COPYING" in the main
10d5cb9783SPaul Mundt  * directory of this archive for more details.
11d5cb9783SPaul Mundt  */
12d5cb9783SPaul Mundt #include <linux/kernel.h>
13d5cb9783SPaul Mundt #include <linux/init.h>
14d5cb9783SPaul Mundt #include <linux/superhyway.h>
15d5cb9783SPaul Mundt #include <linux/string.h>
16d5cb9783SPaul Mundt #include <asm/addrspace.h>
17d5cb9783SPaul Mundt #include <asm/io.h>
18d5cb9783SPaul Mundt 
19d5cb9783SPaul Mundt #define PHYS_EMI_CBLOCK		P4SEGADDR(0x1ec00000)
20d5cb9783SPaul Mundt #define PHYS_EMI_DBLOCK		P4SEGADDR(0x08000000)
21d5cb9783SPaul Mundt #define PHYS_FEMI_CBLOCK	P4SEGADDR(0x1f800000)
22d5cb9783SPaul Mundt #define PHYS_FEMI_DBLOCK	P4SEGADDR(0x00000000)
23d5cb9783SPaul Mundt 
24d5cb9783SPaul Mundt #define PHYS_EPBR_BLOCK		P4SEGADDR(0x1de00000)
25d5cb9783SPaul Mundt #define PHYS_DMAC_BLOCK		P4SEGADDR(0x1fa00000)
26d5cb9783SPaul Mundt #define PHYS_PBR_BLOCK		P4SEGADDR(0x1fc00000)
27d5cb9783SPaul Mundt 
28d5cb9783SPaul Mundt static struct resource emi_resources[] = {
29d5cb9783SPaul Mundt 	[0] = {
30d5cb9783SPaul Mundt 		.start	= PHYS_EMI_CBLOCK,
31d5cb9783SPaul Mundt 		.end	= PHYS_EMI_CBLOCK + 0x00300000 - 1,
32d5cb9783SPaul Mundt 		.flags	= IORESOURCE_MEM,
33d5cb9783SPaul Mundt 	},
34d5cb9783SPaul Mundt 	[1] = {
35d5cb9783SPaul Mundt 		.start	= PHYS_EMI_DBLOCK,
36d5cb9783SPaul Mundt 		.end	= PHYS_EMI_DBLOCK + 0x08000000 - 1,
37d5cb9783SPaul Mundt 		.flags	= IORESOURCE_MEM,
38d5cb9783SPaul Mundt 	},
39d5cb9783SPaul Mundt };
40d5cb9783SPaul Mundt 
41d5cb9783SPaul Mundt static struct superhyway_device emi_device = {
42d5cb9783SPaul Mundt 	.name		= "emi",
43d5cb9783SPaul Mundt 	.num_resources	= ARRAY_SIZE(emi_resources),
44d5cb9783SPaul Mundt 	.resource	= emi_resources,
45d5cb9783SPaul Mundt };
46d5cb9783SPaul Mundt 
47d5cb9783SPaul Mundt static struct resource femi_resources[] = {
48d5cb9783SPaul Mundt 	[0] = {
49d5cb9783SPaul Mundt 		.start	= PHYS_FEMI_CBLOCK,
50d5cb9783SPaul Mundt 		.end	= PHYS_FEMI_CBLOCK + 0x00100000 - 1,
51d5cb9783SPaul Mundt 		.flags	= IORESOURCE_MEM,
52d5cb9783SPaul Mundt 	},
53d5cb9783SPaul Mundt 	[1] = {
54d5cb9783SPaul Mundt 		.start	= PHYS_FEMI_DBLOCK,
55d5cb9783SPaul Mundt 		.end	= PHYS_FEMI_DBLOCK + 0x08000000 - 1,
56d5cb9783SPaul Mundt 		.flags	= IORESOURCE_MEM,
57d5cb9783SPaul Mundt 	},
58d5cb9783SPaul Mundt };
59d5cb9783SPaul Mundt 
60d5cb9783SPaul Mundt static struct superhyway_device femi_device = {
61d5cb9783SPaul Mundt 	.name		= "femi",
62d5cb9783SPaul Mundt 	.num_resources	= ARRAY_SIZE(femi_resources),
63d5cb9783SPaul Mundt 	.resource	= femi_resources,
64d5cb9783SPaul Mundt };
65d5cb9783SPaul Mundt 
66d5cb9783SPaul Mundt static struct resource epbr_resources[] = {
67d5cb9783SPaul Mundt 	[0] = {
68d5cb9783SPaul Mundt 		.start	= P4SEGADDR(0x1e7ffff8),
69d5cb9783SPaul Mundt 		.end	= P4SEGADDR(0x1e7ffff8 + (sizeof(u32) * 2) - 1),
70d5cb9783SPaul Mundt 		.flags	= IORESOURCE_MEM,
71d5cb9783SPaul Mundt 	},
72d5cb9783SPaul Mundt 	[1] = {
73d5cb9783SPaul Mundt 		.start	= PHYS_EPBR_BLOCK,
74d5cb9783SPaul Mundt 		.end	= PHYS_EPBR_BLOCK + 0x00a00000 - 1,
75d5cb9783SPaul Mundt 		.flags	= IORESOURCE_MEM,
76d5cb9783SPaul Mundt 	},
77d5cb9783SPaul Mundt };
78d5cb9783SPaul Mundt 
79d5cb9783SPaul Mundt static struct superhyway_device epbr_device = {
80d5cb9783SPaul Mundt 	.name		= "epbr",
81d5cb9783SPaul Mundt 	.num_resources	= ARRAY_SIZE(epbr_resources),
82d5cb9783SPaul Mundt 	.resource	= epbr_resources,
83d5cb9783SPaul Mundt };
84d5cb9783SPaul Mundt 
85d5cb9783SPaul Mundt static struct resource dmac_resource = {
86d5cb9783SPaul Mundt 	.start	= PHYS_DMAC_BLOCK,
87d5cb9783SPaul Mundt 	.end	= PHYS_DMAC_BLOCK + 0x00100000 - 1,
88d5cb9783SPaul Mundt 	.flags	= IORESOURCE_MEM,
89d5cb9783SPaul Mundt };
90d5cb9783SPaul Mundt 
91d5cb9783SPaul Mundt static struct superhyway_device dmac_device = {
92d5cb9783SPaul Mundt 	.name		= "dmac",
93d5cb9783SPaul Mundt 	.num_resources	= 1,
94d5cb9783SPaul Mundt 	.resource	= &dmac_resource,
95d5cb9783SPaul Mundt };
96d5cb9783SPaul Mundt 
97d5cb9783SPaul Mundt static struct resource pbr_resources[] = {
98d5cb9783SPaul Mundt 	[0] = {
99d5cb9783SPaul Mundt 		.start	= P4SEGADDR(0x1ffffff8),
100d5cb9783SPaul Mundt 		.end	= P4SEGADDR(0x1ffffff8 + (sizeof(u32) * 2) - 1),
101d5cb9783SPaul Mundt 		.flags	= IORESOURCE_MEM,
102d5cb9783SPaul Mundt 	},
103d5cb9783SPaul Mundt 	[1] = {
104d5cb9783SPaul Mundt 		.start	= PHYS_PBR_BLOCK,
105d5cb9783SPaul Mundt 		.end	= PHYS_PBR_BLOCK + 0x00400000 - (sizeof(u32) * 2) - 1,
106d5cb9783SPaul Mundt 		.flags	= IORESOURCE_MEM,
107d5cb9783SPaul Mundt 	},
108d5cb9783SPaul Mundt };
109d5cb9783SPaul Mundt 
110d5cb9783SPaul Mundt static struct superhyway_device pbr_device = {
111d5cb9783SPaul Mundt 	.name		= "pbr",
112d5cb9783SPaul Mundt 	.num_resources	= ARRAY_SIZE(pbr_resources),
113d5cb9783SPaul Mundt 	.resource	= pbr_resources,
114d5cb9783SPaul Mundt };
115d5cb9783SPaul Mundt 
116d5cb9783SPaul Mundt static struct superhyway_device *sh4202_devices[] __initdata = {
117d5cb9783SPaul Mundt 	&emi_device, &femi_device, &epbr_device, &dmac_device, &pbr_device,
118d5cb9783SPaul Mundt };
119d5cb9783SPaul Mundt 
120d5cb9783SPaul Mundt static int sh4202_read_vcr(unsigned long base, struct superhyway_vcr_info *vcr)
121d5cb9783SPaul Mundt {
122d5cb9783SPaul Mundt 	u32 vcrh, vcrl;
123d5cb9783SPaul Mundt 	u64 tmp;
124d5cb9783SPaul Mundt 
125d5cb9783SPaul Mundt 	/*
126d5cb9783SPaul Mundt 	 * XXX: Even though the SH4-202 Evaluation Device documentation
127d5cb9783SPaul Mundt 	 * indicates that VCRL is mapped first with VCRH at a + 0x04
128d5cb9783SPaul Mundt 	 * offset, the opposite seems to be true.
129d5cb9783SPaul Mundt 	 *
130d5cb9783SPaul Mundt 	 * Some modules (PBR and ePBR for instance) also appear to have
131d5cb9783SPaul Mundt 	 * VCRL/VCRH flipped in the documentation, but on the SH4-202
132d5cb9783SPaul Mundt 	 * itself it appears that these are all consistently mapped with
133e868d612SSimon Arlott 	 * VCRH preceding VCRL.
134d5cb9783SPaul Mundt 	 *
135d5cb9783SPaul Mundt 	 * Do not trust the documentation, for it is evil.
136d5cb9783SPaul Mundt 	 */
137*9d56dd3bSPaul Mundt 	vcrh = __raw_readl(base);
138*9d56dd3bSPaul Mundt 	vcrl = __raw_readl(base + sizeof(u32));
139d5cb9783SPaul Mundt 
140d5cb9783SPaul Mundt 	tmp = ((u64)vcrh << 32) | vcrl;
141d5cb9783SPaul Mundt 	memcpy(vcr, &tmp, sizeof(u64));
142d5cb9783SPaul Mundt 
143d5cb9783SPaul Mundt 	return 0;
144d5cb9783SPaul Mundt }
145d5cb9783SPaul Mundt 
146d5cb9783SPaul Mundt static int sh4202_write_vcr(unsigned long base, struct superhyway_vcr_info vcr)
147d5cb9783SPaul Mundt {
148d5cb9783SPaul Mundt 	u64 tmp = *(u64 *)&vcr;
149d5cb9783SPaul Mundt 
150*9d56dd3bSPaul Mundt 	__raw_writel((tmp >> 32) & 0xffffffff, base);
151*9d56dd3bSPaul Mundt 	__raw_writel(tmp & 0xffffffff, base + sizeof(u32));
152d5cb9783SPaul Mundt 
153d5cb9783SPaul Mundt 	return 0;
154d5cb9783SPaul Mundt }
155d5cb9783SPaul Mundt 
156d5cb9783SPaul Mundt static struct superhyway_ops sh4202_superhyway_ops = {
157d5cb9783SPaul Mundt 	.read_vcr	= sh4202_read_vcr,
158d5cb9783SPaul Mundt 	.write_vcr	= sh4202_write_vcr,
159d5cb9783SPaul Mundt };
160d5cb9783SPaul Mundt 
161d5cb9783SPaul Mundt struct superhyway_bus superhyway_channels[] = {
162d5cb9783SPaul Mundt 	{ &sh4202_superhyway_ops, },
163d5cb9783SPaul Mundt 	{ 0, },
164d5cb9783SPaul Mundt };
165d5cb9783SPaul Mundt 
166d5cb9783SPaul Mundt int __init superhyway_scan_bus(struct superhyway_bus *bus)
167d5cb9783SPaul Mundt {
168d5cb9783SPaul Mundt 	return superhyway_add_devices(bus, sh4202_devices,
169d5cb9783SPaul Mundt 				      ARRAY_SIZE(sh4202_devices));
170d5cb9783SPaul Mundt }
171d5cb9783SPaul Mundt 
172