1 /* 2 * arch/sh/drivers/pci/pci.c 3 * 4 * Copyright (c) 2002 M. R. Brown <mrbrown@linux-sh.org> 5 * Copyright (c) 2004 - 2006 Paul Mundt <lethal@linux-sh.org> 6 * 7 * These functions are collected here to reduce duplication of common 8 * code amongst the many platform-specific PCI support code files. 9 * 10 * These routines require the following board-specific routines: 11 * void pcibios_fixup_irqs(); 12 * 13 * See include/asm-sh/pci.h for more information. 14 * 15 * This file is subject to the terms and conditions of the GNU General Public 16 * License. See the file "COPYING" in the main directory of this archive 17 * for more details. 18 */ 19 #include <linux/kernel.h> 20 #include <linux/pci.h> 21 #include <linux/init.h> 22 #include <linux/dma-debug.h> 23 #include <asm/io.h> 24 25 static int __init pcibios_init(void) 26 { 27 struct pci_channel *p; 28 struct pci_bus *bus; 29 int busno; 30 31 #ifdef CONFIG_PCI_AUTO 32 /* assign resources */ 33 busno = 0; 34 for (p = board_pci_channels; p->pci_ops != NULL; p++) 35 busno = pciauto_assign_resources(busno, p) + 1; 36 #endif 37 38 /* scan the buses */ 39 busno = 0; 40 for (p = board_pci_channels; p->pci_ops != NULL; p++) { 41 bus = pci_scan_bus(busno, p->pci_ops, p); 42 busno = bus->subordinate + 1; 43 } 44 45 pci_fixup_irqs(pci_common_swizzle, pcibios_map_platform_irq); 46 47 dma_debug_add_bus(&pci_bus_type); 48 49 return 0; 50 } 51 subsys_initcall(pcibios_init); 52 53 /* 54 * Called after each bus is probed, but before its children 55 * are examined. 56 */ 57 void __devinit __weak pcibios_fixup_bus(struct pci_bus *bus) 58 { 59 pci_read_bridge_bases(bus); 60 } 61 62 void pcibios_align_resource(void *data, struct resource *res, 63 resource_size_t size, resource_size_t align) 64 __attribute__ ((weak)); 65 66 /* 67 * We need to avoid collisions with `mirrored' VGA ports 68 * and other strange ISA hardware, so we always want the 69 * addresses to be allocated in the 0x000-0x0ff region 70 * modulo 0x400. 71 */ 72 void pcibios_align_resource(void *data, struct resource *res, 73 resource_size_t size, resource_size_t align) 74 { 75 if (res->flags & IORESOURCE_IO) { 76 resource_size_t start = res->start; 77 78 if (start & 0x300) { 79 start = (start + 0x3ff) & ~0x3ff; 80 res->start = start; 81 } 82 } 83 } 84 85 int pcibios_enable_device(struct pci_dev *dev, int mask) 86 { 87 u16 cmd, old_cmd; 88 int idx; 89 struct resource *r; 90 91 pci_read_config_word(dev, PCI_COMMAND, &cmd); 92 old_cmd = cmd; 93 for(idx=0; idx<6; idx++) { 94 if (!(mask & (1 << idx))) 95 continue; 96 r = &dev->resource[idx]; 97 if (!r->start && r->end) { 98 printk(KERN_ERR "PCI: Device %s not available because " 99 "of resource collisions\n", pci_name(dev)); 100 return -EINVAL; 101 } 102 if (r->flags & IORESOURCE_IO) 103 cmd |= PCI_COMMAND_IO; 104 if (r->flags & IORESOURCE_MEM) 105 cmd |= PCI_COMMAND_MEMORY; 106 } 107 if (dev->resource[PCI_ROM_RESOURCE].start) 108 cmd |= PCI_COMMAND_MEMORY; 109 if (cmd != old_cmd) { 110 printk(KERN_INFO "PCI: Enabling device %s (%04x -> %04x)\n", 111 pci_name(dev), old_cmd, cmd); 112 pci_write_config_word(dev, PCI_COMMAND, cmd); 113 } 114 return 0; 115 } 116 117 /* 118 * If we set up a device for bus mastering, we need to check and set 119 * the latency timer as it may not be properly set. 120 */ 121 static unsigned int pcibios_max_latency = 255; 122 123 void pcibios_set_master(struct pci_dev *dev) 124 { 125 u8 lat; 126 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat); 127 if (lat < 16) 128 lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency; 129 else if (lat > pcibios_max_latency) 130 lat = pcibios_max_latency; 131 else 132 return; 133 printk(KERN_INFO "PCI: Setting latency timer of device %s to %d\n", 134 pci_name(dev), lat); 135 pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat); 136 } 137 138 void __init pcibios_update_irq(struct pci_dev *dev, int irq) 139 { 140 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq); 141 } 142 143 void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen) 144 { 145 resource_size_t start = pci_resource_start(dev, bar); 146 resource_size_t len = pci_resource_len(dev, bar); 147 unsigned long flags = pci_resource_flags(dev, bar); 148 149 if (unlikely(!len || !start)) 150 return NULL; 151 if (maxlen && len > maxlen) 152 len = maxlen; 153 154 /* 155 * Presently the IORESOURCE_MEM case is a bit special, most 156 * SH7751 style PCI controllers have PCI memory at a fixed 157 * location in the address space where no remapping is desired 158 * (typically at 0xfd000000, but is_pci_memaddr() will know 159 * best). With the IORESOURCE_MEM case more care has to be taken 160 * to inhibit page table mapping for legacy cores, but this is 161 * punted off to __ioremap(). 162 * -- PFM. 163 */ 164 if (flags & IORESOURCE_IO) 165 return ioport_map(start, len); 166 if (flags & IORESOURCE_MEM) 167 return ioremap(start, len); 168 169 return NULL; 170 } 171 EXPORT_SYMBOL(pci_iomap); 172 173 void pci_iounmap(struct pci_dev *dev, void __iomem *addr) 174 { 175 iounmap(addr); 176 } 177 EXPORT_SYMBOL(pci_iounmap); 178