14862ec07SNicholas Beck /* 24862ec07SNicholas Beck * arch/sh/drivers/pci/fixups-sdk7780.c 34862ec07SNicholas Beck * 44862ec07SNicholas Beck * PCI fixups for the SDK7780SE03 54862ec07SNicholas Beck * 64862ec07SNicholas Beck * Copyright (C) 2003 Lineo uSolutions, Inc. 74862ec07SNicholas Beck * Copyright (C) 2004 - 2006 Paul Mundt 8*a6d377b6SPaul Mundt * Copyright (C) 2006 Nobuhiro Iwamatsu 94862ec07SNicholas Beck * 104862ec07SNicholas Beck * This file is subject to the terms and conditions of the GNU General Public 114862ec07SNicholas Beck * License. See the file "COPYING" in the main directory of this archive 124862ec07SNicholas Beck * for more details. 134862ec07SNicholas Beck */ 144862ec07SNicholas Beck #include <linux/pci.h> 15*a6d377b6SPaul Mundt #include <linux/io.h> 164862ec07SNicholas Beck #include "pci-sh4.h" 174862ec07SNicholas Beck 18*a6d377b6SPaul Mundt /* IDSEL [16][17][18][19][20][21][22][23][24][25][26][27][28][29][30][31] */ 19*a6d377b6SPaul Mundt static char sdk7780_irq_tab[4][16] __initdata = { 20*a6d377b6SPaul Mundt /* INTA */ 21*a6d377b6SPaul Mundt { 65, 68, 67, 68, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 }, 22*a6d377b6SPaul Mundt /* INTB */ 23*a6d377b6SPaul Mundt { 66, 65, -1, 65, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 }, 24*a6d377b6SPaul Mundt /* INTC */ 25*a6d377b6SPaul Mundt { 67, 66, -1, 66, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 }, 26*a6d377b6SPaul Mundt /* INTD */ 27*a6d377b6SPaul Mundt { 68, 67, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 }, 28*a6d377b6SPaul Mundt }; 29*a6d377b6SPaul Mundt 30*a6d377b6SPaul Mundt int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) 31*a6d377b6SPaul Mundt { 32*a6d377b6SPaul Mundt return sdk7780_irq_tab[pin-1][slot]; 33*a6d377b6SPaul Mundt } 34b8b47bfbSMagnus Damm int pci_fixup_pcic(struct pci_channel *chan) 354862ec07SNicholas Beck { 364862ec07SNicholas Beck /* Enable all interrupts, so we know what to fix */ 37b8b47bfbSMagnus Damm pci_write_reg(chan, 0x0000C3FF, SH7780_PCIIMR); 38b8b47bfbSMagnus Damm pci_write_reg(chan, 0x0000380F, SH7780_PCIAINTM); 394862ec07SNicholas Beck 404862ec07SNicholas Beck /* Set up standard PCI config registers */ 41b8b47bfbSMagnus Damm pci_write_reg(chan, 0xFB00, SH7780_PCISTATUS); 42b8b47bfbSMagnus Damm pci_write_reg(chan, 0x0047, SH7780_PCICMD); 43b8b47bfbSMagnus Damm pci_write_reg(chan, 0x00, SH7780_PCIPIF); 44b8b47bfbSMagnus Damm pci_write_reg(chan, 0x1912, SH7780_PCISVID); 45b8b47bfbSMagnus Damm pci_write_reg(chan, 0x0001, SH7780_PCISID); 464862ec07SNicholas Beck 47b8b47bfbSMagnus Damm pci_write_reg(chan, 0x08000000, SH7780_PCIMBAR0); /* PCI */ 48b8b47bfbSMagnus Damm pci_write_reg(chan, 0x08000000, SH7780_PCILAR0); /* SHwy */ 49b8b47bfbSMagnus Damm pci_write_reg(chan, 0x07F00001, SH7780_PCILSR); /* size 128M w/ MBAR */ 504862ec07SNicholas Beck 51b8b47bfbSMagnus Damm pci_write_reg(chan, 0x00000000, SH7780_PCIMBAR1); 52b8b47bfbSMagnus Damm pci_write_reg(chan, 0x00000000, SH7780_PCILAR1); 53b8b47bfbSMagnus Damm pci_write_reg(chan, 0x00000000, SH7780_PCILSR1); 544862ec07SNicholas Beck 55b8b47bfbSMagnus Damm pci_write_reg(chan, 0xAB000801, SH7780_PCIIBAR); 564862ec07SNicholas Beck 574862ec07SNicholas Beck /* 584862ec07SNicholas Beck * Set the MBR so PCI address is one-to-one with window, 594862ec07SNicholas Beck * meaning all calls go straight through... use ifdef to 604862ec07SNicholas Beck * catch erroneous assumption. 614862ec07SNicholas Beck */ 62b8b47bfbSMagnus Damm pci_write_reg(chan, 0xFD000000 , SH7780_PCIMBR0); 63b8b47bfbSMagnus Damm pci_write_reg(chan, 0x00FC0000 , SH7780_PCIMBMR0); /* 16M */ 644862ec07SNicholas Beck 654862ec07SNicholas Beck /* Set IOBR for window containing area specified in pci.h */ 66710fa3c8SMagnus Damm pci_write_reg(chan, chan->io_resource->start & ~(SH7780_PCI_IO_SIZE-1), 67b8b47bfbSMagnus Damm SH7780_PCIIOBR); 68b8b47bfbSMagnus Damm pci_write_reg(chan, (SH7780_PCI_IO_SIZE-1) & (7 << 18), 69b8b47bfbSMagnus Damm SH7780_PCIIOBMR); 704862ec07SNicholas Beck 71b8b47bfbSMagnus Damm pci_write_reg(chan, 0xA5000C01, SH7780_PCICR); 724862ec07SNicholas Beck 734862ec07SNicholas Beck return 0; 744862ec07SNicholas Beck } 75