xref: /openbmc/linux/arch/sh/drivers/pci/fixups-rts7751r2d.c (revision 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2)
1*1da177e4SLinus Torvalds /*
2*1da177e4SLinus Torvalds  * arch/sh/drivers/pci/fixups-rts7751r2d.c
3*1da177e4SLinus Torvalds  *
4*1da177e4SLinus Torvalds  * RTS7751R2D PCI fixups
5*1da177e4SLinus Torvalds  *
6*1da177e4SLinus Torvalds  * Copyright (C) 2003  Lineo uSolutions, Inc.
7*1da177e4SLinus Torvalds  * Copyright (C) 2004  Paul Mundt
8*1da177e4SLinus Torvalds  *
9*1da177e4SLinus Torvalds  * This file is subject to the terms and conditions of the GNU General Public
10*1da177e4SLinus Torvalds  * License.  See the file "COPYING" in the main directory of this archive
11*1da177e4SLinus Torvalds  * for more details.
12*1da177e4SLinus Torvalds  */
13*1da177e4SLinus Torvalds #include "pci-sh7751.h"
14*1da177e4SLinus Torvalds #include <asm/io.h>
15*1da177e4SLinus Torvalds 
16*1da177e4SLinus Torvalds #define PCIMCR_MRSET_OFF	0xBFFFFFFF
17*1da177e4SLinus Torvalds #define PCIMCR_RFSH_OFF		0xFFFFFFFB
18*1da177e4SLinus Torvalds 
19*1da177e4SLinus Torvalds int pci_fixup_pcic(void)
20*1da177e4SLinus Torvalds {
21*1da177e4SLinus Torvalds 	unsigned long bcr1, mcr;
22*1da177e4SLinus Torvalds 
23*1da177e4SLinus Torvalds 	bcr1 = inl(SH7751_BCR1);
24*1da177e4SLinus Torvalds 	bcr1 |= 0x40080000;	/* Enable Bit 19 BREQEN, set PCIC to slave */
25*1da177e4SLinus Torvalds 	outl(bcr1, PCI_REG(SH7751_PCIBCR1));
26*1da177e4SLinus Torvalds 
27*1da177e4SLinus Torvalds 	/* Enable all interrupts, so we known what to fix */
28*1da177e4SLinus Torvalds 	outl(0x0000c3ff, PCI_REG(SH7751_PCIINTM));
29*1da177e4SLinus Torvalds 	outl(0x0000380f, PCI_REG(SH7751_PCIAINTM));
30*1da177e4SLinus Torvalds 
31*1da177e4SLinus Torvalds 	outl(0xfb900047, PCI_REG(SH7751_PCICONF1));
32*1da177e4SLinus Torvalds 	outl(0xab000001, PCI_REG(SH7751_PCICONF4));
33*1da177e4SLinus Torvalds 
34*1da177e4SLinus Torvalds 	mcr = inl(SH7751_MCR);
35*1da177e4SLinus Torvalds 	mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
36*1da177e4SLinus Torvalds 	outl(mcr, PCI_REG(SH7751_PCIMCR));
37*1da177e4SLinus Torvalds 
38*1da177e4SLinus Torvalds 	outl(0x0c000000, PCI_REG(SH7751_PCICONF5));
39*1da177e4SLinus Torvalds 	outl(0xd0000000, PCI_REG(SH7751_PCICONF6));
40*1da177e4SLinus Torvalds 	outl(0x0c000000, PCI_REG(SH7751_PCILAR0));
41*1da177e4SLinus Torvalds 	outl(0x00000000, PCI_REG(SH7751_PCILAR1));
42*1da177e4SLinus Torvalds 	return 0;
43*1da177e4SLinus Torvalds }
44