1*ff4a7481SKuninori Morimoto // SPDX-License-Identifier: GPL-2.0
284972ec0SPaul Mundt /*
39ca04434SNobuhiro Iwamatsu * arch/sh/drivers/pci/fixups-landisk.c
484972ec0SPaul Mundt *
584972ec0SPaul Mundt * PCI initialization for the I-O DATA Device, Inc. LANDISK board
684972ec0SPaul Mundt *
784972ec0SPaul Mundt * Copyright (C) 2006 kogiidena
89ca04434SNobuhiro Iwamatsu * Copyright (C) 2010 Nobuhiro Iwamatsu
984972ec0SPaul Mundt */
1084972ec0SPaul Mundt #include <linux/kernel.h>
1184972ec0SPaul Mundt #include <linux/types.h>
1284972ec0SPaul Mundt #include <linux/init.h>
1384972ec0SPaul Mundt #include <linux/delay.h>
1484972ec0SPaul Mundt #include <linux/pci.h>
1558796ce6SPaul Mundt #include <linux/sh_intc.h>
1684972ec0SPaul Mundt #include "pci-sh4.h"
1784972ec0SPaul Mundt
189ca04434SNobuhiro Iwamatsu #define PCIMCR_MRSET_OFF 0xBFFFFFFF
199ca04434SNobuhiro Iwamatsu #define PCIMCR_RFSH_OFF 0xFFFFFFFB
209ca04434SNobuhiro Iwamatsu
pcibios_map_platform_irq(const struct pci_dev * pdev,u8 slot,u8 pin)21d5341942SRalf Baechle int pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
2284972ec0SPaul Mundt {
2384972ec0SPaul Mundt /*
2484972ec0SPaul Mundt * slot0: pin1-4 = irq5,6,7,8
2584972ec0SPaul Mundt * slot1: pin1-4 = irq6,7,8,5
2684972ec0SPaul Mundt * slot2: pin1-4 = irq7,8,5,6
2784972ec0SPaul Mundt * slot3: pin1-4 = irq8,5,6,7
2884972ec0SPaul Mundt */
2958796ce6SPaul Mundt int irq = ((slot + pin - 1) & 0x3) + evt2irq(0x2a0);
3084972ec0SPaul Mundt
3184972ec0SPaul Mundt if ((slot | (pin - 1)) > 0x3) {
329ca04434SNobuhiro Iwamatsu printk(KERN_WARNING "PCI: Bad IRQ mapping request for slot %d pin %c\n",
3384972ec0SPaul Mundt slot, pin - 1 + 'A');
3484972ec0SPaul Mundt return -1;
3584972ec0SPaul Mundt }
3684972ec0SPaul Mundt return irq;
3784972ec0SPaul Mundt }
389ca04434SNobuhiro Iwamatsu
pci_fixup_pcic(struct pci_channel * chan)399ca04434SNobuhiro Iwamatsu int pci_fixup_pcic(struct pci_channel *chan)
409ca04434SNobuhiro Iwamatsu {
419ca04434SNobuhiro Iwamatsu unsigned long bcr1, mcr;
429ca04434SNobuhiro Iwamatsu
439ca04434SNobuhiro Iwamatsu bcr1 = __raw_readl(SH7751_BCR1);
449ca04434SNobuhiro Iwamatsu bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
459ca04434SNobuhiro Iwamatsu pci_write_reg(chan, bcr1, SH4_PCIBCR1);
469ca04434SNobuhiro Iwamatsu
479ca04434SNobuhiro Iwamatsu mcr = __raw_readl(SH7751_MCR);
489ca04434SNobuhiro Iwamatsu mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
499ca04434SNobuhiro Iwamatsu pci_write_reg(chan, mcr, SH4_PCIMCR);
509ca04434SNobuhiro Iwamatsu
519ca04434SNobuhiro Iwamatsu pci_write_reg(chan, 0x0c000000, SH7751_PCICONF5);
529ca04434SNobuhiro Iwamatsu pci_write_reg(chan, 0xd0000000, SH7751_PCICONF6);
539ca04434SNobuhiro Iwamatsu pci_write_reg(chan, 0x0c000000, SH4_PCILAR0);
549ca04434SNobuhiro Iwamatsu pci_write_reg(chan, 0x00000000, SH4_PCILAR1);
559ca04434SNobuhiro Iwamatsu
569ca04434SNobuhiro Iwamatsu return 0;
579ca04434SNobuhiro Iwamatsu }
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