1*b2441318SGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0
2da2014a2SPaul Mundt /*
3da2014a2SPaul Mundt * linux/arch/sh/boards/se/770x/irq.c
4da2014a2SPaul Mundt *
5da2014a2SPaul Mundt * Copyright (C) 2000 Kazumoto Kojima
6da2014a2SPaul Mundt * Copyright (C) 2006 Nobuhiro Iwamatsu
7da2014a2SPaul Mundt *
8da2014a2SPaul Mundt * Hitachi SolutionEngine Support.
9da2014a2SPaul Mundt *
10da2014a2SPaul Mundt */
11da2014a2SPaul Mundt
12da2014a2SPaul Mundt #include <linux/init.h>
13da2014a2SPaul Mundt #include <linux/interrupt.h>
14da2014a2SPaul Mundt #include <linux/irq.h>
15da2014a2SPaul Mundt #include <asm/irq.h>
16da2014a2SPaul Mundt #include <asm/io.h>
17939a24a6SPaul Mundt #include <mach-se/mach/se.h>
18da2014a2SPaul Mundt
19da2014a2SPaul Mundt static struct ipr_data ipr_irq_table[] = {
20da2014a2SPaul Mundt /*
21da2014a2SPaul Mundt * Super I/O (Just mimic PC):
22da2014a2SPaul Mundt * 1: keyboard
23da2014a2SPaul Mundt * 3: serial 0
24da2014a2SPaul Mundt * 4: serial 1
25da2014a2SPaul Mundt * 5: printer
26da2014a2SPaul Mundt * 6: floppy
27da2014a2SPaul Mundt * 8: rtc
28da2014a2SPaul Mundt * 12: mouse
29da2014a2SPaul Mundt * 14: ide0
30da2014a2SPaul Mundt */
31da2014a2SPaul Mundt #if defined(CONFIG_CPU_SUBTYPE_SH7705)
32da2014a2SPaul Mundt /* This is default value */
33da2014a2SPaul Mundt { 13, 0, 8, 0x0f-13, },
34da2014a2SPaul Mundt { 5 , 0, 4, 0x0f- 5, },
35da2014a2SPaul Mundt { 10, 1, 0, 0x0f-10, },
36da2014a2SPaul Mundt { 7 , 2, 4, 0x0f- 7, },
37da2014a2SPaul Mundt { 3 , 2, 0, 0x0f- 3, },
38da2014a2SPaul Mundt { 1 , 3, 12, 0x0f- 1, },
39da2014a2SPaul Mundt { 12, 3, 4, 0x0f-12, }, /* LAN */
40da2014a2SPaul Mundt { 2 , 4, 8, 0x0f- 2, }, /* PCIRQ2 */
41da2014a2SPaul Mundt { 6 , 4, 4, 0x0f- 6, }, /* PCIRQ1 */
42da2014a2SPaul Mundt { 14, 4, 0, 0x0f-14, }, /* PCIRQ0 */
43da2014a2SPaul Mundt { 0 , 5, 12, 0x0f , },
44da2014a2SPaul Mundt { 4 , 5, 4, 0x0f- 4, },
45da2014a2SPaul Mundt { 8 , 6, 12, 0x0f- 8, },
46da2014a2SPaul Mundt { 9 , 6, 8, 0x0f- 9, },
47da2014a2SPaul Mundt { 11, 6, 4, 0x0f-11, },
48da2014a2SPaul Mundt #else
49da2014a2SPaul Mundt { 14, 0, 8, 0x0f-14, },
50da2014a2SPaul Mundt { 12, 0, 4, 0x0f-12, },
51da2014a2SPaul Mundt { 8, 1, 4, 0x0f- 8, },
52da2014a2SPaul Mundt { 6, 2, 12, 0x0f- 6, },
53da2014a2SPaul Mundt { 5, 2, 8, 0x0f- 5, },
54da2014a2SPaul Mundt { 4, 2, 4, 0x0f- 4, },
55da2014a2SPaul Mundt { 3, 2, 0, 0x0f- 3, },
56da2014a2SPaul Mundt { 1, 3, 12, 0x0f- 1, },
57da2014a2SPaul Mundt #if defined(CONFIG_STNIC)
58da2014a2SPaul Mundt /* ST NIC */
59da2014a2SPaul Mundt { 10, 3, 4, 0x0f-10, }, /* LAN */
60da2014a2SPaul Mundt #endif
61da2014a2SPaul Mundt /* MRSHPC IRQs setting */
62da2014a2SPaul Mundt { 0, 4, 12, 0x0f- 0, }, /* PCIRQ3 */
63da2014a2SPaul Mundt { 11, 4, 8, 0x0f-11, }, /* PCIRQ2 */
64da2014a2SPaul Mundt { 9, 4, 4, 0x0f- 9, }, /* PCIRQ1 */
65da2014a2SPaul Mundt { 7, 4, 0, 0x0f- 7, }, /* PCIRQ0 */
66da2014a2SPaul Mundt /* #2, #13 are allocated for SLOT IRQ #1 and #2 (for now) */
67da2014a2SPaul Mundt /* NOTE: #2 and #13 are not used on PC */
68da2014a2SPaul Mundt { 13, 6, 4, 0x0f-13, }, /* SLOTIRQ2 */
69da2014a2SPaul Mundt { 2, 6, 0, 0x0f- 2, }, /* SLOTIRQ1 */
70da2014a2SPaul Mundt #endif
71da2014a2SPaul Mundt };
72da2014a2SPaul Mundt
73da2014a2SPaul Mundt static unsigned long ipr_offsets[] = {
74da2014a2SPaul Mundt BCR_ILCRA,
75da2014a2SPaul Mundt BCR_ILCRB,
76da2014a2SPaul Mundt BCR_ILCRC,
77da2014a2SPaul Mundt BCR_ILCRD,
78da2014a2SPaul Mundt BCR_ILCRE,
79da2014a2SPaul Mundt BCR_ILCRF,
80da2014a2SPaul Mundt BCR_ILCRG,
81da2014a2SPaul Mundt };
82da2014a2SPaul Mundt
83da2014a2SPaul Mundt static struct ipr_desc ipr_irq_desc = {
84da2014a2SPaul Mundt .ipr_offsets = ipr_offsets,
85da2014a2SPaul Mundt .nr_offsets = ARRAY_SIZE(ipr_offsets),
86da2014a2SPaul Mundt
87da2014a2SPaul Mundt .ipr_data = ipr_irq_table,
88da2014a2SPaul Mundt .nr_irqs = ARRAY_SIZE(ipr_irq_table),
89da2014a2SPaul Mundt .chip = {
90da2014a2SPaul Mundt .name = "IPR-se770x",
91da2014a2SPaul Mundt },
92da2014a2SPaul Mundt };
93da2014a2SPaul Mundt
94da2014a2SPaul Mundt /*
95da2014a2SPaul Mundt * Initialize IRQ setting
96da2014a2SPaul Mundt */
init_se_IRQ(void)97da2014a2SPaul Mundt void __init init_se_IRQ(void)
98da2014a2SPaul Mundt {
99da2014a2SPaul Mundt /* Disable all interrupts */
1009d56dd3bSPaul Mundt __raw_writew(0, BCR_ILCRA);
1019d56dd3bSPaul Mundt __raw_writew(0, BCR_ILCRB);
1029d56dd3bSPaul Mundt __raw_writew(0, BCR_ILCRC);
1039d56dd3bSPaul Mundt __raw_writew(0, BCR_ILCRD);
1049d56dd3bSPaul Mundt __raw_writew(0, BCR_ILCRE);
1059d56dd3bSPaul Mundt __raw_writew(0, BCR_ILCRF);
1069d56dd3bSPaul Mundt __raw_writew(0, BCR_ILCRG);
107da2014a2SPaul Mundt
108da2014a2SPaul Mundt register_ipr_controller(&ipr_irq_desc);
109da2014a2SPaul Mundt }
110