1*aaf9128aSKuninori Morimoto // SPDX-License-Identifier: GPL-2.0 2da2014a2SPaul Mundt /* 3da2014a2SPaul Mundt * linux/arch/sh/boards/superh/microdev/io.c 4da2014a2SPaul Mundt * 5da2014a2SPaul Mundt * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com) 6da2014a2SPaul Mundt * Copyright (C) 2003, 2004 SuperH, Inc. 7da2014a2SPaul Mundt * Copyright (C) 2004 Paul Mundt 8da2014a2SPaul Mundt * 9da2014a2SPaul Mundt * SuperH SH4-202 MicroDev board support. 10da2014a2SPaul Mundt */ 11da2014a2SPaul Mundt 12da2014a2SPaul Mundt #include <linux/init.h> 13da2014a2SPaul Mundt #include <linux/pci.h> 14da2014a2SPaul Mundt #include <linux/wait.h> 15da2014a2SPaul Mundt #include <asm/io.h> 167639a454SPaul Mundt #include <mach/microdev.h> 17da2014a2SPaul Mundt 18da2014a2SPaul Mundt /* 19da2014a2SPaul Mundt * we need to have a 'safe' address to re-direct all I/O requests 20da2014a2SPaul Mundt * that we do not explicitly wish to handle. This safe address 21da2014a2SPaul Mundt * must have the following properies: 22da2014a2SPaul Mundt * 23da2014a2SPaul Mundt * * writes are ignored (no exception) 24da2014a2SPaul Mundt * * reads are benign (no side-effects) 25da2014a2SPaul Mundt * * accesses of width 1, 2 and 4-bytes are all valid. 26da2014a2SPaul Mundt * 27da2014a2SPaul Mundt * The Processor Version Register (PVR) has these properties. 28da2014a2SPaul Mundt */ 29da2014a2SPaul Mundt #define PVR 0xff000030 /* Processor Version Register */ 30da2014a2SPaul Mundt 31da2014a2SPaul Mundt 32da2014a2SPaul Mundt #define IO_IDE2_BASE 0x170ul /* I/O base for SMSC FDC37C93xAPM IDE #2 */ 33da2014a2SPaul Mundt #define IO_IDE1_BASE 0x1f0ul /* I/O base for SMSC FDC37C93xAPM IDE #1 */ 34da2014a2SPaul Mundt #define IO_ISP1161_BASE 0x290ul /* I/O port for Philips ISP1161x USB chip */ 35da2014a2SPaul Mundt #define IO_SERIAL2_BASE 0x2f8ul /* I/O base for SMSC FDC37C93xAPM Serial #2 */ 36da2014a2SPaul Mundt #define IO_LAN91C111_BASE 0x300ul /* I/O base for SMSC LAN91C111 Ethernet chip */ 37da2014a2SPaul Mundt #define IO_IDE2_MISC 0x376ul /* I/O misc for SMSC FDC37C93xAPM IDE #2 */ 38da2014a2SPaul Mundt #define IO_SUPERIO_BASE 0x3f0ul /* I/O base for SMSC FDC37C93xAPM SuperIO chip */ 39da2014a2SPaul Mundt #define IO_IDE1_MISC 0x3f6ul /* I/O misc for SMSC FDC37C93xAPM IDE #1 */ 40da2014a2SPaul Mundt #define IO_SERIAL1_BASE 0x3f8ul /* I/O base for SMSC FDC37C93xAPM Serial #1 */ 41da2014a2SPaul Mundt 42da2014a2SPaul Mundt #define IO_ISP1161_EXTENT 0x04ul /* I/O extent for Philips ISP1161x USB chip */ 43da2014a2SPaul Mundt #define IO_LAN91C111_EXTENT 0x10ul /* I/O extent for SMSC LAN91C111 Ethernet chip */ 44da2014a2SPaul Mundt #define IO_SUPERIO_EXTENT 0x02ul /* I/O extent for SMSC FDC37C93xAPM SuperIO chip */ 45da2014a2SPaul Mundt #define IO_IDE_EXTENT 0x08ul /* I/O extent for IDE Task Register set */ 46da2014a2SPaul Mundt #define IO_SERIAL_EXTENT 0x10ul 47da2014a2SPaul Mundt 48da2014a2SPaul Mundt #define IO_LAN91C111_PHYS 0xa7500000ul /* Physical address of SMSC LAN91C111 Ethernet chip */ 49da2014a2SPaul Mundt #define IO_ISP1161_PHYS 0xa7700000ul /* Physical address of Philips ISP1161x USB chip */ 50da2014a2SPaul Mundt #define IO_SUPERIO_PHYS 0xa7800000ul /* Physical address of SMSC FDC37C93xAPM SuperIO chip */ 51da2014a2SPaul Mundt 52da2014a2SPaul Mundt /* 53da2014a2SPaul Mundt * map I/O ports to memory-mapped addresses 54da2014a2SPaul Mundt */ microdev_ioport_map(unsigned long offset,unsigned int len)5546bc8587SPaul Mundtvoid __iomem *microdev_ioport_map(unsigned long offset, unsigned int len) 56da2014a2SPaul Mundt { 57da2014a2SPaul Mundt unsigned long result; 58da2014a2SPaul Mundt 59da2014a2SPaul Mundt if ((offset >= IO_LAN91C111_BASE) && 60da2014a2SPaul Mundt (offset < IO_LAN91C111_BASE + IO_LAN91C111_EXTENT)) { 61da2014a2SPaul Mundt /* 62da2014a2SPaul Mundt * SMSC LAN91C111 Ethernet chip 63da2014a2SPaul Mundt */ 64da2014a2SPaul Mundt result = IO_LAN91C111_PHYS + offset - IO_LAN91C111_BASE; 65da2014a2SPaul Mundt } else if ((offset >= IO_SUPERIO_BASE) && 66da2014a2SPaul Mundt (offset < IO_SUPERIO_BASE + IO_SUPERIO_EXTENT)) { 67da2014a2SPaul Mundt /* 68da2014a2SPaul Mundt * SMSC FDC37C93xAPM SuperIO chip 69da2014a2SPaul Mundt * 70da2014a2SPaul Mundt * Configuration Registers 71da2014a2SPaul Mundt */ 72da2014a2SPaul Mundt result = IO_SUPERIO_PHYS + (offset << 1); 73da2014a2SPaul Mundt } else if (((offset >= IO_IDE1_BASE) && 74da2014a2SPaul Mundt (offset < IO_IDE1_BASE + IO_IDE_EXTENT)) || 75da2014a2SPaul Mundt (offset == IO_IDE1_MISC)) { 76da2014a2SPaul Mundt /* 77da2014a2SPaul Mundt * SMSC FDC37C93xAPM SuperIO chip 78da2014a2SPaul Mundt * 79da2014a2SPaul Mundt * IDE #1 80da2014a2SPaul Mundt */ 81da2014a2SPaul Mundt result = IO_SUPERIO_PHYS + (offset << 1); 82da2014a2SPaul Mundt } else if (((offset >= IO_IDE2_BASE) && 83da2014a2SPaul Mundt (offset < IO_IDE2_BASE + IO_IDE_EXTENT)) || 84da2014a2SPaul Mundt (offset == IO_IDE2_MISC)) { 85da2014a2SPaul Mundt /* 86da2014a2SPaul Mundt * SMSC FDC37C93xAPM SuperIO chip 87da2014a2SPaul Mundt * 88da2014a2SPaul Mundt * IDE #2 89da2014a2SPaul Mundt */ 90da2014a2SPaul Mundt result = IO_SUPERIO_PHYS + (offset << 1); 91da2014a2SPaul Mundt } else if ((offset >= IO_SERIAL1_BASE) && 92da2014a2SPaul Mundt (offset < IO_SERIAL1_BASE + IO_SERIAL_EXTENT)) { 93da2014a2SPaul Mundt /* 94da2014a2SPaul Mundt * SMSC FDC37C93xAPM SuperIO chip 95da2014a2SPaul Mundt * 96da2014a2SPaul Mundt * Serial #1 97da2014a2SPaul Mundt */ 98da2014a2SPaul Mundt result = IO_SUPERIO_PHYS + (offset << 1); 99da2014a2SPaul Mundt } else if ((offset >= IO_SERIAL2_BASE) && 100da2014a2SPaul Mundt (offset < IO_SERIAL2_BASE + IO_SERIAL_EXTENT)) { 101da2014a2SPaul Mundt /* 102da2014a2SPaul Mundt * SMSC FDC37C93xAPM SuperIO chip 103da2014a2SPaul Mundt * 104da2014a2SPaul Mundt * Serial #2 105da2014a2SPaul Mundt */ 106da2014a2SPaul Mundt result = IO_SUPERIO_PHYS + (offset << 1); 107da2014a2SPaul Mundt } else if ((offset >= IO_ISP1161_BASE) && 108da2014a2SPaul Mundt (offset < IO_ISP1161_BASE + IO_ISP1161_EXTENT)) { 109da2014a2SPaul Mundt /* 110da2014a2SPaul Mundt * Philips USB ISP1161x chip 111da2014a2SPaul Mundt */ 112da2014a2SPaul Mundt result = IO_ISP1161_PHYS + offset - IO_ISP1161_BASE; 113da2014a2SPaul Mundt } else { 114da2014a2SPaul Mundt /* 115da2014a2SPaul Mundt * safe default. 116da2014a2SPaul Mundt */ 117da2014a2SPaul Mundt printk("Warning: unexpected port in %s( offset = 0x%lx )\n", 118da2014a2SPaul Mundt __func__, offset); 119da2014a2SPaul Mundt result = PVR; 120da2014a2SPaul Mundt } 121da2014a2SPaul Mundt 12246bc8587SPaul Mundt return (void __iomem *)result; 123da2014a2SPaul Mundt } 124