xref: /openbmc/linux/arch/s390/kernel/entry.S (revision d768bd892fc8f066cd3aa000eb1867bcf32db0ee) 
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 *    S390 low-level entry points.
4 *
5 *    Copyright IBM Corp. 1999, 2012
6 *    Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 *		 Hartmut Penner (hp@de.ibm.com),
8 *		 Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 *		 Heiko Carstens <heiko.carstens@de.ibm.com>
10 */
11
12#include <linux/init.h>
13#include <linux/linkage.h>
14#include <asm/processor.h>
15#include <asm/cache.h>
16#include <asm/ctl_reg.h>
17#include <asm/errno.h>
18#include <asm/ptrace.h>
19#include <asm/thread_info.h>
20#include <asm/asm-offsets.h>
21#include <asm/unistd.h>
22#include <asm/page.h>
23#include <asm/sigp.h>
24#include <asm/irq.h>
25#include <asm/vx-insn.h>
26#include <asm/setup.h>
27#include <asm/nmi.h>
28#include <asm/export.h>
29
30__PT_R0      =	__PT_GPRS
31__PT_R1      =	__PT_GPRS + 8
32__PT_R2      =	__PT_GPRS + 16
33__PT_R3      =	__PT_GPRS + 24
34__PT_R4      =	__PT_GPRS + 32
35__PT_R5      =	__PT_GPRS + 40
36__PT_R6      =	__PT_GPRS + 48
37__PT_R7      =	__PT_GPRS + 56
38__PT_R8      =	__PT_GPRS + 64
39__PT_R9      =	__PT_GPRS + 72
40__PT_R10     =	__PT_GPRS + 80
41__PT_R11     =	__PT_GPRS + 88
42__PT_R12     =	__PT_GPRS + 96
43__PT_R13     =	__PT_GPRS + 104
44__PT_R14     =	__PT_GPRS + 112
45__PT_R15     =	__PT_GPRS + 120
46
47STACK_SHIFT = PAGE_SHIFT + THREAD_SIZE_ORDER
48STACK_SIZE  = 1 << STACK_SHIFT
49STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE
50
51_TIF_WORK	= (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
52		   _TIF_UPROBE | _TIF_GUARDED_STORAGE | _TIF_PATCH_PENDING)
53_TIF_TRACE	= (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \
54		   _TIF_SYSCALL_TRACEPOINT)
55_CIF_WORK	= (_CIF_MCCK_PENDING | _CIF_ASCE_PRIMARY | \
56		   _CIF_ASCE_SECONDARY | _CIF_FPU)
57_PIF_WORK	= (_PIF_PER_TRAP | _PIF_SYSCALL_RESTART)
58
59#define BASED(name) name-cleanup_critical(%r13)
60
61	.macro	TRACE_IRQS_ON
62#ifdef CONFIG_TRACE_IRQFLAGS
63	basr	%r2,%r0
64	brasl	%r14,trace_hardirqs_on_caller
65#endif
66	.endm
67
68	.macro	TRACE_IRQS_OFF
69#ifdef CONFIG_TRACE_IRQFLAGS
70	basr	%r2,%r0
71	brasl	%r14,trace_hardirqs_off_caller
72#endif
73	.endm
74
75	.macro	LOCKDEP_SYS_EXIT
76#ifdef CONFIG_LOCKDEP
77	tm	__PT_PSW+1(%r11),0x01	# returning to user ?
78	jz	.+10
79	brasl	%r14,lockdep_sys_exit
80#endif
81	.endm
82
83	.macro	CHECK_STACK stacksize,savearea
84#ifdef CONFIG_CHECK_STACK
85	tml	%r15,\stacksize - CONFIG_STACK_GUARD
86	lghi	%r14,\savearea
87	jz	stack_overflow
88#endif
89	.endm
90
91	.macro	SWITCH_ASYNC savearea,timer
92	tmhh	%r8,0x0001		# interrupting from user ?
93	jnz	1f
94	lgr	%r14,%r9
95	slg	%r14,BASED(.Lcritical_start)
96	clg	%r14,BASED(.Lcritical_length)
97	jhe	0f
98	lghi	%r11,\savearea		# inside critical section, do cleanup
99	brasl	%r14,cleanup_critical
100	tmhh	%r8,0x0001		# retest problem state after cleanup
101	jnz	1f
1020:	lg	%r14,__LC_ASYNC_STACK	# are we already on the async stack?
103	slgr	%r14,%r15
104	srag	%r14,%r14,STACK_SHIFT
105	jnz	2f
106	CHECK_STACK 1<<STACK_SHIFT,\savearea
107	aghi	%r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
108	j	3f
1091:	UPDATE_VTIME %r14,%r15,\timer
1102:	lg	%r15,__LC_ASYNC_STACK	# load async stack
1113:	la	%r11,STACK_FRAME_OVERHEAD(%r15)
112	.endm
113
114	.macro UPDATE_VTIME w1,w2,enter_timer
115	lg	\w1,__LC_EXIT_TIMER
116	lg	\w2,__LC_LAST_UPDATE_TIMER
117	slg	\w1,\enter_timer
118	slg	\w2,__LC_EXIT_TIMER
119	alg	\w1,__LC_USER_TIMER
120	alg	\w2,__LC_SYSTEM_TIMER
121	stg	\w1,__LC_USER_TIMER
122	stg	\w2,__LC_SYSTEM_TIMER
123	mvc	__LC_LAST_UPDATE_TIMER(8),\enter_timer
124	.endm
125
126	.macro REENABLE_IRQS
127	stg	%r8,__LC_RETURN_PSW
128	ni	__LC_RETURN_PSW,0xbf
129	ssm	__LC_RETURN_PSW
130	.endm
131
132	.macro STCK savearea
133#ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES
134	.insn	s,0xb27c0000,\savearea		# store clock fast
135#else
136	.insn	s,0xb2050000,\savearea		# store clock
137#endif
138	.endm
139
140	/*
141	 * The TSTMSK macro generates a test-under-mask instruction by
142	 * calculating the memory offset for the specified mask value.
143	 * Mask value can be any constant.  The macro shifts the mask
144	 * value to calculate the memory offset for the test-under-mask
145	 * instruction.
146	 */
147	.macro TSTMSK addr, mask, size=8, bytepos=0
148		.if (\bytepos < \size) && (\mask >> 8)
149			.if (\mask & 0xff)
150				.error "Mask exceeds byte boundary"
151			.endif
152			TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)"
153			.exitm
154		.endif
155		.ifeq \mask
156			.error "Mask must not be zero"
157		.endif
158		off = \size - \bytepos - 1
159		tm	off+\addr, \mask
160	.endm
161
162	.macro BPOFF
163	.pushsection .altinstr_replacement, "ax"
164660:	.long	0xb2e8c000
165	.popsection
166661:	.long	0x47000000
167	.pushsection .altinstructions, "a"
168	.long 661b - .
169	.long 660b - .
170	.word 82
171	.byte 4
172	.byte 4
173	.popsection
174	.endm
175
176	.macro BPON
177	.pushsection .altinstr_replacement, "ax"
178662:	.long	0xb2e8d000
179	.popsection
180663:	.long	0x47000000
181	.pushsection .altinstructions, "a"
182	.long 663b - .
183	.long 662b - .
184	.word 82
185	.byte 4
186	.byte 4
187	.popsection
188	.endm
189
190	.section .kprobes.text, "ax"
191.Ldummy:
192	/*
193	 * This nop exists only in order to avoid that __switch_to starts at
194	 * the beginning of the kprobes text section. In that case we would
195	 * have several symbols at the same address. E.g. objdump would take
196	 * an arbitrary symbol name when disassembling this code.
197	 * With the added nop in between the __switch_to symbol is unique
198	 * again.
199	 */
200	nop	0
201
202ENTRY(__bpon)
203	.globl __bpon
204	BPON
205	br	%r14
206
207/*
208 * Scheduler resume function, called by switch_to
209 *  gpr2 = (task_struct *) prev
210 *  gpr3 = (task_struct *) next
211 * Returns:
212 *  gpr2 = prev
213 */
214ENTRY(__switch_to)
215	stmg	%r6,%r15,__SF_GPRS(%r15)	# store gprs of prev task
216	lghi	%r4,__TASK_stack
217	lghi	%r1,__TASK_thread
218	lg	%r5,0(%r4,%r3)			# start of kernel stack of next
219	stg	%r15,__THREAD_ksp(%r1,%r2)	# store kernel stack of prev
220	lgr	%r15,%r5
221	aghi	%r15,STACK_INIT			# end of kernel stack of next
222	stg	%r3,__LC_CURRENT		# store task struct of next
223	stg	%r15,__LC_KERNEL_STACK		# store end of kernel stack
224	lg	%r15,__THREAD_ksp(%r1,%r3)	# load kernel stack of next
225	aghi	%r3,__TASK_pid
226	mvc	__LC_CURRENT_PID(4,%r0),0(%r3)	# store pid of next
227	lmg	%r6,%r15,__SF_GPRS(%r15)	# load gprs of next task
228	TSTMSK	__LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
229	bzr	%r14
230	.insn	s,0xb2800000,__LC_LPP		# set program parameter
231	br	%r14
232
233.L__critical_start:
234
235#if IS_ENABLED(CONFIG_KVM)
236/*
237 * sie64a calling convention:
238 * %r2 pointer to sie control block
239 * %r3 guest register save area
240 */
241ENTRY(sie64a)
242	stmg	%r6,%r14,__SF_GPRS(%r15)	# save kernel registers
243	stg	%r2,__SF_EMPTY(%r15)		# save control block pointer
244	stg	%r3,__SF_EMPTY+8(%r15)		# save guest register save area
245	xc	__SF_EMPTY+16(8,%r15),__SF_EMPTY+16(%r15) # reason code = 0
246	TSTMSK	__LC_CPU_FLAGS,_CIF_FPU		# load guest fp/vx registers ?
247	jno	.Lsie_load_guest_gprs
248	brasl	%r14,load_fpu_regs		# load guest fp/vx regs
249.Lsie_load_guest_gprs:
250	lmg	%r0,%r13,0(%r3)			# load guest gprs 0-13
251	lg	%r14,__LC_GMAP			# get gmap pointer
252	ltgr	%r14,%r14
253	jz	.Lsie_gmap
254	lctlg	%c1,%c1,__GMAP_ASCE(%r14)	# load primary asce
255.Lsie_gmap:
256	lg	%r14,__SF_EMPTY(%r15)		# get control block pointer
257	oi	__SIE_PROG0C+3(%r14),1		# we are going into SIE now
258	tm	__SIE_PROG20+3(%r14),3		# last exit...
259	jnz	.Lsie_skip
260	TSTMSK	__LC_CPU_FLAGS,_CIF_FPU
261	jo	.Lsie_skip			# exit if fp/vx regs changed
262	BPON
263.Lsie_entry:
264	sie	0(%r14)
265.Lsie_exit:
266	BPOFF
267.Lsie_skip:
268	ni	__SIE_PROG0C+3(%r14),0xfe	# no longer in SIE
269	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
270.Lsie_done:
271# some program checks are suppressing. C code (e.g. do_protection_exception)
272# will rewind the PSW by the ILC, which is often 4 bytes in case of SIE. There
273# are some corner cases (e.g. runtime instrumentation) where ILC is unpredictable.
274# Other instructions between sie64a and .Lsie_done should not cause program
275# interrupts. So lets use 3 nops as a landing pad for all possible rewinds.
276# See also .Lcleanup_sie
277.Lrewind_pad6:
278	nopr	7
279.Lrewind_pad4:
280	nopr	7
281.Lrewind_pad2:
282	nopr	7
283	.globl sie_exit
284sie_exit:
285	lg	%r14,__SF_EMPTY+8(%r15)		# load guest register save area
286	stmg	%r0,%r13,0(%r14)		# save guest gprs 0-13
287	xgr	%r0,%r0				# clear guest registers to
288	xgr	%r1,%r1				# prevent speculative use
289	xgr	%r2,%r2
290	xgr	%r3,%r3
291	xgr	%r4,%r4
292	xgr	%r5,%r5
293	lmg	%r6,%r14,__SF_GPRS(%r15)	# restore kernel registers
294	lg	%r2,__SF_EMPTY+16(%r15)		# return exit reason code
295	br	%r14
296.Lsie_fault:
297	lghi	%r14,-EFAULT
298	stg	%r14,__SF_EMPTY+16(%r15)	# set exit reason code
299	j	sie_exit
300
301	EX_TABLE(.Lrewind_pad6,.Lsie_fault)
302	EX_TABLE(.Lrewind_pad4,.Lsie_fault)
303	EX_TABLE(.Lrewind_pad2,.Lsie_fault)
304	EX_TABLE(sie_exit,.Lsie_fault)
305EXPORT_SYMBOL(sie64a)
306EXPORT_SYMBOL(sie_exit)
307#endif
308
309/*
310 * SVC interrupt handler routine. System calls are synchronous events and
311 * are executed with interrupts enabled.
312 */
313
314ENTRY(system_call)
315	stpt	__LC_SYNC_ENTER_TIMER
316.Lsysc_stmg:
317	stmg	%r8,%r15,__LC_SAVE_AREA_SYNC
318	BPOFF
319	lg	%r12,__LC_CURRENT
320	lghi	%r13,__TASK_thread
321	lghi	%r14,_PIF_SYSCALL
322.Lsysc_per:
323	lg	%r15,__LC_KERNEL_STACK
324	la	%r11,STACK_FRAME_OVERHEAD(%r15)	# pointer to pt_regs
325.Lsysc_vtime:
326	UPDATE_VTIME %r8,%r9,__LC_SYNC_ENTER_TIMER
327	stmg	%r0,%r7,__PT_R0(%r11)
328	# clear user controlled register to prevent speculative use
329	xgr	%r0,%r0
330	mvc	__PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
331	mvc	__PT_PSW(16,%r11),__LC_SVC_OLD_PSW
332	mvc	__PT_INT_CODE(4,%r11),__LC_SVC_ILC
333	stg	%r14,__PT_FLAGS(%r11)
334.Lsysc_do_svc:
335	# load address of system call table
336	lg	%r10,__THREAD_sysc_table(%r13,%r12)
337	llgh	%r8,__PT_INT_CODE+2(%r11)
338	slag	%r8,%r8,2			# shift and test for svc 0
339	jnz	.Lsysc_nr_ok
340	# svc 0: system call number in %r1
341	llgfr	%r1,%r1				# clear high word in r1
342	cghi	%r1,NR_syscalls
343	jnl	.Lsysc_nr_ok
344	sth	%r1,__PT_INT_CODE+2(%r11)
345	slag	%r8,%r1,2
346.Lsysc_nr_ok:
347	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
348	stg	%r2,__PT_ORIG_GPR2(%r11)
349	stg	%r7,STACK_FRAME_OVERHEAD(%r15)
350	lgf	%r9,0(%r8,%r10)			# get system call add.
351	TSTMSK	__TI_flags(%r12),_TIF_TRACE
352	jnz	.Lsysc_tracesys
353	basr	%r14,%r9			# call sys_xxxx
354	stg	%r2,__PT_R2(%r11)		# store return value
355
356.Lsysc_return:
357	LOCKDEP_SYS_EXIT
358.Lsysc_tif:
359	TSTMSK	__PT_FLAGS(%r11),_PIF_WORK
360	jnz	.Lsysc_work
361	TSTMSK	__TI_flags(%r12),_TIF_WORK
362	jnz	.Lsysc_work			# check for work
363	TSTMSK	__LC_CPU_FLAGS,_CIF_WORK
364	jnz	.Lsysc_work
365	BPON
366.Lsysc_restore:
367	lg	%r14,__LC_VDSO_PER_CPU
368	lmg	%r0,%r10,__PT_R0(%r11)
369	mvc	__LC_RETURN_PSW(16),__PT_PSW(%r11)
370.Lsysc_exit_timer:
371	stpt	__LC_EXIT_TIMER
372	mvc	__VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
373	lmg	%r11,%r15,__PT_R11(%r11)
374	lpswe	__LC_RETURN_PSW
375.Lsysc_done:
376
377#
378# One of the work bits is on. Find out which one.
379#
380.Lsysc_work:
381	TSTMSK	__LC_CPU_FLAGS,_CIF_MCCK_PENDING
382	jo	.Lsysc_mcck_pending
383	TSTMSK	__TI_flags(%r12),_TIF_NEED_RESCHED
384	jo	.Lsysc_reschedule
385	TSTMSK	__PT_FLAGS(%r11),_PIF_SYSCALL_RESTART
386	jo	.Lsysc_syscall_restart
387#ifdef CONFIG_UPROBES
388	TSTMSK	__TI_flags(%r12),_TIF_UPROBE
389	jo	.Lsysc_uprobe_notify
390#endif
391	TSTMSK	__TI_flags(%r12),_TIF_GUARDED_STORAGE
392	jo	.Lsysc_guarded_storage
393	TSTMSK	__PT_FLAGS(%r11),_PIF_PER_TRAP
394	jo	.Lsysc_singlestep
395#ifdef CONFIG_LIVEPATCH
396	TSTMSK	__TI_flags(%r12),_TIF_PATCH_PENDING
397	jo	.Lsysc_patch_pending	# handle live patching just before
398					# signals and possible syscall restart
399#endif
400	TSTMSK	__PT_FLAGS(%r11),_PIF_SYSCALL_RESTART
401	jo	.Lsysc_syscall_restart
402	TSTMSK	__TI_flags(%r12),_TIF_SIGPENDING
403	jo	.Lsysc_sigpending
404	TSTMSK	__TI_flags(%r12),_TIF_NOTIFY_RESUME
405	jo	.Lsysc_notify_resume
406	TSTMSK	__LC_CPU_FLAGS,_CIF_FPU
407	jo	.Lsysc_vxrs
408	TSTMSK	__LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY)
409	jnz	.Lsysc_asce
410	j	.Lsysc_return		# beware of critical section cleanup
411
412#
413# _TIF_NEED_RESCHED is set, call schedule
414#
415.Lsysc_reschedule:
416	larl	%r14,.Lsysc_return
417	jg	schedule
418
419#
420# _CIF_MCCK_PENDING is set, call handler
421#
422.Lsysc_mcck_pending:
423	larl	%r14,.Lsysc_return
424	jg	s390_handle_mcck	# TIF bit will be cleared by handler
425
426#
427# _CIF_ASCE_PRIMARY and/or _CIF_ASCE_SECONDARY set, load user space asce
428#
429.Lsysc_asce:
430	ni	__LC_CPU_FLAGS+7,255-_CIF_ASCE_SECONDARY
431	lctlg	%c7,%c7,__LC_VDSO_ASCE		# load secondary asce
432	TSTMSK	__LC_CPU_FLAGS,_CIF_ASCE_PRIMARY
433	jz	.Lsysc_return
434#ifndef CONFIG_HAVE_MARCH_Z10_FEATURES
435	tm	__LC_STFLE_FAC_LIST+3,0x10	# has MVCOS ?
436	jnz	.Lsysc_set_fs_fixup
437	ni	__LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY
438	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
439	j	.Lsysc_return
440.Lsysc_set_fs_fixup:
441#endif
442	larl	%r14,.Lsysc_return
443	jg	set_fs_fixup
444
445#
446# CIF_FPU is set, restore floating-point controls and floating-point registers.
447#
448.Lsysc_vxrs:
449	larl	%r14,.Lsysc_return
450	jg	load_fpu_regs
451
452#
453# _TIF_SIGPENDING is set, call do_signal
454#
455.Lsysc_sigpending:
456	lgr	%r2,%r11		# pass pointer to pt_regs
457	brasl	%r14,do_signal
458	TSTMSK	__PT_FLAGS(%r11),_PIF_SYSCALL
459	jno	.Lsysc_return
460.Lsysc_do_syscall:
461	lghi	%r13,__TASK_thread
462	lmg	%r2,%r7,__PT_R2(%r11)	# load svc arguments
463	lghi	%r1,0			# svc 0 returns -ENOSYS
464	j	.Lsysc_do_svc
465
466#
467# _TIF_NOTIFY_RESUME is set, call do_notify_resume
468#
469.Lsysc_notify_resume:
470	lgr	%r2,%r11		# pass pointer to pt_regs
471	larl	%r14,.Lsysc_return
472	jg	do_notify_resume
473
474#
475# _TIF_UPROBE is set, call uprobe_notify_resume
476#
477#ifdef CONFIG_UPROBES
478.Lsysc_uprobe_notify:
479	lgr	%r2,%r11		# pass pointer to pt_regs
480	larl	%r14,.Lsysc_return
481	jg	uprobe_notify_resume
482#endif
483
484#
485# _TIF_GUARDED_STORAGE is set, call guarded_storage_load
486#
487.Lsysc_guarded_storage:
488	lgr	%r2,%r11		# pass pointer to pt_regs
489	larl	%r14,.Lsysc_return
490	jg	gs_load_bc_cb
491#
492# _TIF_PATCH_PENDING is set, call klp_update_patch_state
493#
494#ifdef CONFIG_LIVEPATCH
495.Lsysc_patch_pending:
496	lg	%r2,__LC_CURRENT	# pass pointer to task struct
497	larl	%r14,.Lsysc_return
498	jg	klp_update_patch_state
499#endif
500
501#
502# _PIF_PER_TRAP is set, call do_per_trap
503#
504.Lsysc_singlestep:
505	ni	__PT_FLAGS+7(%r11),255-_PIF_PER_TRAP
506	lgr	%r2,%r11		# pass pointer to pt_regs
507	larl	%r14,.Lsysc_return
508	jg	do_per_trap
509
510#
511# _PIF_SYSCALL_RESTART is set, repeat the current system call
512#
513.Lsysc_syscall_restart:
514	ni	__PT_FLAGS+7(%r11),255-_PIF_SYSCALL_RESTART
515	lmg	%r1,%r7,__PT_R1(%r11)	# load svc arguments
516	lg	%r2,__PT_ORIG_GPR2(%r11)
517	j	.Lsysc_do_svc
518
519#
520# call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
521# and after the system call
522#
523.Lsysc_tracesys:
524	lgr	%r2,%r11		# pass pointer to pt_regs
525	la	%r3,0
526	llgh	%r0,__PT_INT_CODE+2(%r11)
527	stg	%r0,__PT_R2(%r11)
528	brasl	%r14,do_syscall_trace_enter
529	lghi	%r0,NR_syscalls
530	clgr	%r0,%r2
531	jnh	.Lsysc_tracenogo
532	sllg	%r8,%r2,2
533	lgf	%r9,0(%r8,%r10)
534.Lsysc_tracego:
535	lmg	%r3,%r7,__PT_R3(%r11)
536	stg	%r7,STACK_FRAME_OVERHEAD(%r15)
537	lg	%r2,__PT_ORIG_GPR2(%r11)
538	basr	%r14,%r9		# call sys_xxx
539	stg	%r2,__PT_R2(%r11)	# store return value
540.Lsysc_tracenogo:
541	TSTMSK	__TI_flags(%r12),_TIF_TRACE
542	jz	.Lsysc_return
543	lgr	%r2,%r11		# pass pointer to pt_regs
544	larl	%r14,.Lsysc_return
545	jg	do_syscall_trace_exit
546
547#
548# a new process exits the kernel with ret_from_fork
549#
550ENTRY(ret_from_fork)
551	la	%r11,STACK_FRAME_OVERHEAD(%r15)
552	lg	%r12,__LC_CURRENT
553	brasl	%r14,schedule_tail
554	TRACE_IRQS_ON
555	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
556	tm	__PT_PSW+1(%r11),0x01	# forking a kernel thread ?
557	jne	.Lsysc_tracenogo
558	# it's a kernel thread
559	lmg	%r9,%r10,__PT_R9(%r11)	# load gprs
560ENTRY(kernel_thread_starter)
561	la	%r2,0(%r10)
562	basr	%r14,%r9
563	j	.Lsysc_tracenogo
564
565/*
566 * Program check handler routine
567 */
568
569ENTRY(pgm_check_handler)
570	stpt	__LC_SYNC_ENTER_TIMER
571	BPOFF
572	stmg	%r8,%r15,__LC_SAVE_AREA_SYNC
573	lg	%r10,__LC_LAST_BREAK
574	lg	%r12,__LC_CURRENT
575	lghi	%r11,0
576	larl	%r13,cleanup_critical
577	lmg	%r8,%r9,__LC_PGM_OLD_PSW
578	tmhh	%r8,0x0001		# test problem state bit
579	jnz	2f			# -> fault in user space
580#if IS_ENABLED(CONFIG_KVM)
581	# cleanup critical section for program checks in sie64a
582	lgr	%r14,%r9
583	slg	%r14,BASED(.Lsie_critical_start)
584	clg	%r14,BASED(.Lsie_critical_length)
585	jhe	0f
586	lg	%r14,__SF_EMPTY(%r15)		# get control block pointer
587	ni	__SIE_PROG0C+3(%r14),0xfe	# no longer in SIE
588	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
589	larl	%r9,sie_exit			# skip forward to sie_exit
590	lghi	%r11,_PIF_GUEST_FAULT
591#endif
5920:	tmhh	%r8,0x4000		# PER bit set in old PSW ?
593	jnz	1f			# -> enabled, can't be a double fault
594	tm	__LC_PGM_ILC+3,0x80	# check for per exception
595	jnz	.Lpgm_svcper		# -> single stepped svc
5961:	CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC
597	aghi	%r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
598	j	4f
5992:	UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER
600	lg	%r15,__LC_KERNEL_STACK
601	lgr	%r14,%r12
602	aghi	%r14,__TASK_thread	# pointer to thread_struct
603	lghi	%r13,__LC_PGM_TDB
604	tm	__LC_PGM_ILC+2,0x02	# check for transaction abort
605	jz	3f
606	mvc	__THREAD_trap_tdb(256,%r14),0(%r13)
6073:	stg	%r10,__THREAD_last_break(%r14)
6084:	lgr	%r13,%r11
609	la	%r11,STACK_FRAME_OVERHEAD(%r15)
610	stmg	%r0,%r7,__PT_R0(%r11)
611	# clear user controlled registers to prevent speculative use
612	xgr	%r0,%r0
613	xgr	%r1,%r1
614	xgr	%r2,%r2
615	xgr	%r3,%r3
616	xgr	%r4,%r4
617	xgr	%r5,%r5
618	xgr	%r6,%r6
619	xgr	%r7,%r7
620	mvc	__PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
621	stmg	%r8,%r9,__PT_PSW(%r11)
622	mvc	__PT_INT_CODE(4,%r11),__LC_PGM_ILC
623	mvc	__PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE
624	stg	%r13,__PT_FLAGS(%r11)
625	stg	%r10,__PT_ARGS(%r11)
626	tm	__LC_PGM_ILC+3,0x80	# check for per exception
627	jz	5f
628	tmhh	%r8,0x0001		# kernel per event ?
629	jz	.Lpgm_kprobe
630	oi	__PT_FLAGS+7(%r11),_PIF_PER_TRAP
631	mvc	__THREAD_per_address(8,%r14),__LC_PER_ADDRESS
632	mvc	__THREAD_per_cause(2,%r14),__LC_PER_CODE
633	mvc	__THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID
6345:	REENABLE_IRQS
635	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
636	larl	%r1,pgm_check_table
637	llgh	%r10,__PT_INT_CODE+2(%r11)
638	nill	%r10,0x007f
639	sll	%r10,2
640	je	.Lpgm_return
641	lgf	%r1,0(%r10,%r1)		# load address of handler routine
642	lgr	%r2,%r11		# pass pointer to pt_regs
643	basr	%r14,%r1		# branch to interrupt-handler
644.Lpgm_return:
645	LOCKDEP_SYS_EXIT
646	tm	__PT_PSW+1(%r11),0x01	# returning to user ?
647	jno	.Lsysc_restore
648	TSTMSK	__PT_FLAGS(%r11),_PIF_SYSCALL
649	jo	.Lsysc_do_syscall
650	j	.Lsysc_tif
651
652#
653# PER event in supervisor state, must be kprobes
654#
655.Lpgm_kprobe:
656	REENABLE_IRQS
657	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
658	lgr	%r2,%r11		# pass pointer to pt_regs
659	brasl	%r14,do_per_trap
660	j	.Lpgm_return
661
662#
663# single stepped system call
664#
665.Lpgm_svcper:
666	mvc	__LC_RETURN_PSW(8),__LC_SVC_NEW_PSW
667	lghi	%r13,__TASK_thread
668	larl	%r14,.Lsysc_per
669	stg	%r14,__LC_RETURN_PSW+8
670	lghi	%r14,_PIF_SYSCALL | _PIF_PER_TRAP
671	lpswe	__LC_RETURN_PSW		# branch to .Lsysc_per and enable irqs
672
673/*
674 * IO interrupt handler routine
675 */
676ENTRY(io_int_handler)
677	STCK	__LC_INT_CLOCK
678	stpt	__LC_ASYNC_ENTER_TIMER
679	BPOFF
680	stmg	%r8,%r15,__LC_SAVE_AREA_ASYNC
681	lg	%r12,__LC_CURRENT
682	larl	%r13,cleanup_critical
683	lmg	%r8,%r9,__LC_IO_OLD_PSW
684	SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
685	stmg	%r0,%r7,__PT_R0(%r11)
686	# clear user controlled registers to prevent speculative use
687	xgr	%r0,%r0
688	xgr	%r1,%r1
689	xgr	%r2,%r2
690	xgr	%r3,%r3
691	xgr	%r4,%r4
692	xgr	%r5,%r5
693	xgr	%r6,%r6
694	xgr	%r7,%r7
695	xgr	%r10,%r10
696	mvc	__PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
697	stmg	%r8,%r9,__PT_PSW(%r11)
698	mvc	__PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
699	xc	__PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
700	TSTMSK	__LC_CPU_FLAGS,_CIF_IGNORE_IRQ
701	jo	.Lio_restore
702	TRACE_IRQS_OFF
703	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
704.Lio_loop:
705	lgr	%r2,%r11		# pass pointer to pt_regs
706	lghi	%r3,IO_INTERRUPT
707	tm	__PT_INT_CODE+8(%r11),0x80	# adapter interrupt ?
708	jz	.Lio_call
709	lghi	%r3,THIN_INTERRUPT
710.Lio_call:
711	brasl	%r14,do_IRQ
712	TSTMSK	__LC_MACHINE_FLAGS,MACHINE_FLAG_LPAR
713	jz	.Lio_return
714	tpi	0
715	jz	.Lio_return
716	mvc	__PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
717	j	.Lio_loop
718.Lio_return:
719	LOCKDEP_SYS_EXIT
720	TRACE_IRQS_ON
721.Lio_tif:
722	TSTMSK	__TI_flags(%r12),_TIF_WORK
723	jnz	.Lio_work		# there is work to do (signals etc.)
724	TSTMSK	__LC_CPU_FLAGS,_CIF_WORK
725	jnz	.Lio_work
726.Lio_restore:
727	lg	%r14,__LC_VDSO_PER_CPU
728	lmg	%r0,%r10,__PT_R0(%r11)
729	mvc	__LC_RETURN_PSW(16),__PT_PSW(%r11)
730	tm	__PT_PSW+1(%r11),0x01	# returning to user ?
731	jno	.Lio_exit_kernel
732	BPON
733.Lio_exit_timer:
734	stpt	__LC_EXIT_TIMER
735	mvc	__VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
736.Lio_exit_kernel:
737	lmg	%r11,%r15,__PT_R11(%r11)
738	lpswe	__LC_RETURN_PSW
739.Lio_done:
740
741#
742# There is work todo, find out in which context we have been interrupted:
743# 1) if we return to user space we can do all _TIF_WORK work
744# 2) if we return to kernel code and kvm is enabled check if we need to
745#    modify the psw to leave SIE
746# 3) if we return to kernel code and preemptive scheduling is enabled check
747#    the preemption counter and if it is zero call preempt_schedule_irq
748# Before any work can be done, a switch to the kernel stack is required.
749#
750.Lio_work:
751	tm	__PT_PSW+1(%r11),0x01	# returning to user ?
752	jo	.Lio_work_user		# yes -> do resched & signal
753#ifdef CONFIG_PREEMPT
754	# check for preemptive scheduling
755	icm	%r0,15,__LC_PREEMPT_COUNT
756	jnz	.Lio_restore		# preemption is disabled
757	TSTMSK	__TI_flags(%r12),_TIF_NEED_RESCHED
758	jno	.Lio_restore
759	# switch to kernel stack
760	lg	%r1,__PT_R15(%r11)
761	aghi	%r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
762	mvc	STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
763	xc	__SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
764	la	%r11,STACK_FRAME_OVERHEAD(%r1)
765	lgr	%r15,%r1
766	# TRACE_IRQS_ON already done at .Lio_return, call
767	# TRACE_IRQS_OFF to keep things symmetrical
768	TRACE_IRQS_OFF
769	brasl	%r14,preempt_schedule_irq
770	j	.Lio_return
771#else
772	j	.Lio_restore
773#endif
774
775#
776# Need to do work before returning to userspace, switch to kernel stack
777#
778.Lio_work_user:
779	lg	%r1,__LC_KERNEL_STACK
780	mvc	STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
781	xc	__SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
782	la	%r11,STACK_FRAME_OVERHEAD(%r1)
783	lgr	%r15,%r1
784
785#
786# One of the work bits is on. Find out which one.
787#
788.Lio_work_tif:
789	TSTMSK	__LC_CPU_FLAGS,_CIF_MCCK_PENDING
790	jo	.Lio_mcck_pending
791	TSTMSK	__TI_flags(%r12),_TIF_NEED_RESCHED
792	jo	.Lio_reschedule
793#ifdef CONFIG_LIVEPATCH
794	TSTMSK	__TI_flags(%r12),_TIF_PATCH_PENDING
795	jo	.Lio_patch_pending
796#endif
797	TSTMSK	__TI_flags(%r12),_TIF_SIGPENDING
798	jo	.Lio_sigpending
799	TSTMSK	__TI_flags(%r12),_TIF_NOTIFY_RESUME
800	jo	.Lio_notify_resume
801	TSTMSK	__TI_flags(%r12),_TIF_GUARDED_STORAGE
802	jo	.Lio_guarded_storage
803	TSTMSK	__LC_CPU_FLAGS,_CIF_FPU
804	jo	.Lio_vxrs
805	TSTMSK	__LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY)
806	jnz	.Lio_asce
807	j	.Lio_return		# beware of critical section cleanup
808
809#
810# _CIF_MCCK_PENDING is set, call handler
811#
812.Lio_mcck_pending:
813	# TRACE_IRQS_ON already done at .Lio_return
814	brasl	%r14,s390_handle_mcck	# TIF bit will be cleared by handler
815	TRACE_IRQS_OFF
816	j	.Lio_return
817
818#
819# _CIF_ASCE_PRIMARY and/or CIF_ASCE_SECONDARY set, load user space asce
820#
821.Lio_asce:
822	ni	__LC_CPU_FLAGS+7,255-_CIF_ASCE_SECONDARY
823	lctlg	%c7,%c7,__LC_VDSO_ASCE		# load secondary asce
824	TSTMSK	__LC_CPU_FLAGS,_CIF_ASCE_PRIMARY
825	jz	.Lio_return
826#ifndef CONFIG_HAVE_MARCH_Z10_FEATURES
827	tm	__LC_STFLE_FAC_LIST+3,0x10	# has MVCOS ?
828	jnz	.Lio_set_fs_fixup
829	ni	__LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY
830	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
831	j	.Lio_return
832.Lio_set_fs_fixup:
833#endif
834	larl	%r14,.Lio_return
835	jg	set_fs_fixup
836
837#
838# CIF_FPU is set, restore floating-point controls and floating-point registers.
839#
840.Lio_vxrs:
841	larl	%r14,.Lio_return
842	jg	load_fpu_regs
843
844#
845# _TIF_GUARDED_STORAGE is set, call guarded_storage_load
846#
847.Lio_guarded_storage:
848	# TRACE_IRQS_ON already done at .Lio_return
849	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
850	lgr	%r2,%r11		# pass pointer to pt_regs
851	brasl	%r14,gs_load_bc_cb
852	ssm	__LC_PGM_NEW_PSW	# disable I/O and ext. interrupts
853	TRACE_IRQS_OFF
854	j	.Lio_return
855
856#
857# _TIF_NEED_RESCHED is set, call schedule
858#
859.Lio_reschedule:
860	# TRACE_IRQS_ON already done at .Lio_return
861	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
862	brasl	%r14,schedule		# call scheduler
863	ssm	__LC_PGM_NEW_PSW	# disable I/O and ext. interrupts
864	TRACE_IRQS_OFF
865	j	.Lio_return
866
867#
868# _TIF_PATCH_PENDING is set, call klp_update_patch_state
869#
870#ifdef CONFIG_LIVEPATCH
871.Lio_patch_pending:
872	lg	%r2,__LC_CURRENT	# pass pointer to task struct
873	larl	%r14,.Lio_return
874	jg	klp_update_patch_state
875#endif
876
877#
878# _TIF_SIGPENDING or is set, call do_signal
879#
880.Lio_sigpending:
881	# TRACE_IRQS_ON already done at .Lio_return
882	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
883	lgr	%r2,%r11		# pass pointer to pt_regs
884	brasl	%r14,do_signal
885	ssm	__LC_PGM_NEW_PSW	# disable I/O and ext. interrupts
886	TRACE_IRQS_OFF
887	j	.Lio_return
888
889#
890# _TIF_NOTIFY_RESUME or is set, call do_notify_resume
891#
892.Lio_notify_resume:
893	# TRACE_IRQS_ON already done at .Lio_return
894	ssm	__LC_SVC_NEW_PSW	# reenable interrupts
895	lgr	%r2,%r11		# pass pointer to pt_regs
896	brasl	%r14,do_notify_resume
897	ssm	__LC_PGM_NEW_PSW	# disable I/O and ext. interrupts
898	TRACE_IRQS_OFF
899	j	.Lio_return
900
901/*
902 * External interrupt handler routine
903 */
904ENTRY(ext_int_handler)
905	STCK	__LC_INT_CLOCK
906	stpt	__LC_ASYNC_ENTER_TIMER
907	BPOFF
908	stmg	%r8,%r15,__LC_SAVE_AREA_ASYNC
909	lg	%r12,__LC_CURRENT
910	larl	%r13,cleanup_critical
911	lmg	%r8,%r9,__LC_EXT_OLD_PSW
912	SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
913	stmg	%r0,%r7,__PT_R0(%r11)
914	# clear user controlled registers to prevent speculative use
915	xgr	%r0,%r0
916	xgr	%r1,%r1
917	xgr	%r2,%r2
918	xgr	%r3,%r3
919	xgr	%r4,%r4
920	xgr	%r5,%r5
921	xgr	%r6,%r6
922	xgr	%r7,%r7
923	xgr	%r10,%r10
924	mvc	__PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
925	stmg	%r8,%r9,__PT_PSW(%r11)
926	lghi	%r1,__LC_EXT_PARAMS2
927	mvc	__PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR
928	mvc	__PT_INT_PARM(4,%r11),__LC_EXT_PARAMS
929	mvc	__PT_INT_PARM_LONG(8,%r11),0(%r1)
930	xc	__PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
931	TSTMSK	__LC_CPU_FLAGS,_CIF_IGNORE_IRQ
932	jo	.Lio_restore
933	TRACE_IRQS_OFF
934	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
935	lgr	%r2,%r11		# pass pointer to pt_regs
936	lghi	%r3,EXT_INTERRUPT
937	brasl	%r14,do_IRQ
938	j	.Lio_return
939
940/*
941 * Load idle PSW. The second "half" of this function is in .Lcleanup_idle.
942 */
943ENTRY(psw_idle)
944	stg	%r3,__SF_EMPTY(%r15)
945	larl	%r1,.Lpsw_idle_lpsw+4
946	stg	%r1,__SF_EMPTY+8(%r15)
947#ifdef CONFIG_SMP
948	larl	%r1,smp_cpu_mtid
949	llgf	%r1,0(%r1)
950	ltgr	%r1,%r1
951	jz	.Lpsw_idle_stcctm
952	.insn	rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15)
953.Lpsw_idle_stcctm:
954#endif
955	oi	__LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT
956	BPON
957	STCK	__CLOCK_IDLE_ENTER(%r2)
958	stpt	__TIMER_IDLE_ENTER(%r2)
959.Lpsw_idle_lpsw:
960	lpswe	__SF_EMPTY(%r15)
961	br	%r14
962.Lpsw_idle_end:
963
964/*
965 * Store floating-point controls and floating-point or vector register
966 * depending whether the vector facility is available.	A critical section
967 * cleanup assures that the registers are stored even if interrupted for
968 * some other work.  The CIF_FPU flag is set to trigger a lazy restore
969 * of the register contents at return from io or a system call.
970 */
971ENTRY(save_fpu_regs)
972	lg	%r2,__LC_CURRENT
973	aghi	%r2,__TASK_thread
974	TSTMSK	__LC_CPU_FLAGS,_CIF_FPU
975	bor	%r14
976	stfpc	__THREAD_FPU_fpc(%r2)
977	lg	%r3,__THREAD_FPU_regs(%r2)
978	TSTMSK	__LC_MACHINE_FLAGS,MACHINE_FLAG_VX
979	jz	.Lsave_fpu_regs_fp	  # no -> store FP regs
980	VSTM	%v0,%v15,0,%r3		  # vstm 0,15,0(3)
981	VSTM	%v16,%v31,256,%r3	  # vstm 16,31,256(3)
982	j	.Lsave_fpu_regs_done	  # -> set CIF_FPU flag
983.Lsave_fpu_regs_fp:
984	std	0,0(%r3)
985	std	1,8(%r3)
986	std	2,16(%r3)
987	std	3,24(%r3)
988	std	4,32(%r3)
989	std	5,40(%r3)
990	std	6,48(%r3)
991	std	7,56(%r3)
992	std	8,64(%r3)
993	std	9,72(%r3)
994	std	10,80(%r3)
995	std	11,88(%r3)
996	std	12,96(%r3)
997	std	13,104(%r3)
998	std	14,112(%r3)
999	std	15,120(%r3)
1000.Lsave_fpu_regs_done:
1001	oi	__LC_CPU_FLAGS+7,_CIF_FPU
1002	br	%r14
1003.Lsave_fpu_regs_end:
1004EXPORT_SYMBOL(save_fpu_regs)
1005
1006/*
1007 * Load floating-point controls and floating-point or vector registers.
1008 * A critical section cleanup assures that the register contents are
1009 * loaded even if interrupted for some other work.
1010 *
1011 * There are special calling conventions to fit into sysc and io return work:
1012 *	%r15:	<kernel stack>
1013 * The function requires:
1014 *	%r4
1015 */
1016load_fpu_regs:
1017	lg	%r4,__LC_CURRENT
1018	aghi	%r4,__TASK_thread
1019	TSTMSK	__LC_CPU_FLAGS,_CIF_FPU
1020	bnor	%r14
1021	lfpc	__THREAD_FPU_fpc(%r4)
1022	TSTMSK	__LC_MACHINE_FLAGS,MACHINE_FLAG_VX
1023	lg	%r4,__THREAD_FPU_regs(%r4)	# %r4 <- reg save area
1024	jz	.Lload_fpu_regs_fp		# -> no VX, load FP regs
1025	VLM	%v0,%v15,0,%r4
1026	VLM	%v16,%v31,256,%r4
1027	j	.Lload_fpu_regs_done
1028.Lload_fpu_regs_fp:
1029	ld	0,0(%r4)
1030	ld	1,8(%r4)
1031	ld	2,16(%r4)
1032	ld	3,24(%r4)
1033	ld	4,32(%r4)
1034	ld	5,40(%r4)
1035	ld	6,48(%r4)
1036	ld	7,56(%r4)
1037	ld	8,64(%r4)
1038	ld	9,72(%r4)
1039	ld	10,80(%r4)
1040	ld	11,88(%r4)
1041	ld	12,96(%r4)
1042	ld	13,104(%r4)
1043	ld	14,112(%r4)
1044	ld	15,120(%r4)
1045.Lload_fpu_regs_done:
1046	ni	__LC_CPU_FLAGS+7,255-_CIF_FPU
1047	br	%r14
1048.Lload_fpu_regs_end:
1049
1050.L__critical_end:
1051
1052/*
1053 * Machine check handler routines
1054 */
1055ENTRY(mcck_int_handler)
1056	STCK	__LC_MCCK_CLOCK
1057	BPOFF
1058	la	%r1,4095		# validate r1
1059	spt	__LC_CPU_TIMER_SAVE_AREA-4095(%r1)	# validate cpu timer
1060	sckc	__LC_CLOCK_COMPARATOR			# validate comparator
1061	lam	%a0,%a15,__LC_AREGS_SAVE_AREA-4095(%r1) # validate acrs
1062	lmg	%r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# validate gprs
1063	lg	%r12,__LC_CURRENT
1064	larl	%r13,cleanup_critical
1065	lmg	%r8,%r9,__LC_MCK_OLD_PSW
1066	TSTMSK	__LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE
1067	jo	.Lmcck_panic		# yes -> rest of mcck code invalid
1068	TSTMSK	__LC_MCCK_CODE,MCCK_CODE_CR_VALID
1069	jno	.Lmcck_panic		# control registers invalid -> panic
1070	la	%r14,4095
1071	lctlg	%c0,%c15,__LC_CREGS_SAVE_AREA-4095(%r14) # validate ctl regs
1072	ptlb
1073	lg	%r11,__LC_MCESAD-4095(%r14) # extended machine check save area
1074	nill	%r11,0xfc00		# MCESA_ORIGIN_MASK
1075	TSTMSK	__LC_CREGS_SAVE_AREA+16-4095(%r14),CR2_GUARDED_STORAGE
1076	jno	0f
1077	TSTMSK	__LC_MCCK_CODE,MCCK_CODE_GS_VALID
1078	jno	0f
1079	.insn	 rxy,0xe3000000004d,0,__MCESA_GS_SAVE_AREA(%r11) # LGSC
10800:	l	%r14,__LC_FP_CREG_SAVE_AREA-4095(%r14)
1081	TSTMSK	__LC_MCCK_CODE,MCCK_CODE_FC_VALID
1082	jo	0f
1083	sr	%r14,%r14
10840:	sfpc	%r14
1085	TSTMSK	__LC_MACHINE_FLAGS,MACHINE_FLAG_VX
1086	jo	0f
1087	lghi	%r14,__LC_FPREGS_SAVE_AREA
1088	ld	%f0,0(%r14)
1089	ld	%f1,8(%r14)
1090	ld	%f2,16(%r14)
1091	ld	%f3,24(%r14)
1092	ld	%f4,32(%r14)
1093	ld	%f5,40(%r14)
1094	ld	%f6,48(%r14)
1095	ld	%f7,56(%r14)
1096	ld	%f8,64(%r14)
1097	ld	%f9,72(%r14)
1098	ld	%f10,80(%r14)
1099	ld	%f11,88(%r14)
1100	ld	%f12,96(%r14)
1101	ld	%f13,104(%r14)
1102	ld	%f14,112(%r14)
1103	ld	%f15,120(%r14)
1104	j	1f
11050:	VLM	%v0,%v15,0,%r11
1106	VLM	%v16,%v31,256,%r11
11071:	lghi	%r14,__LC_CPU_TIMER_SAVE_AREA
1108	mvc	__LC_MCCK_ENTER_TIMER(8),0(%r14)
1109	TSTMSK	__LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID
1110	jo	3f
1111	la	%r14,__LC_SYNC_ENTER_TIMER
1112	clc	0(8,%r14),__LC_ASYNC_ENTER_TIMER
1113	jl	0f
1114	la	%r14,__LC_ASYNC_ENTER_TIMER
11150:	clc	0(8,%r14),__LC_EXIT_TIMER
1116	jl	1f
1117	la	%r14,__LC_EXIT_TIMER
11181:	clc	0(8,%r14),__LC_LAST_UPDATE_TIMER
1119	jl	2f
1120	la	%r14,__LC_LAST_UPDATE_TIMER
11212:	spt	0(%r14)
1122	mvc	__LC_MCCK_ENTER_TIMER(8),0(%r14)
11233:	TSTMSK	__LC_MCCK_CODE,MCCK_CODE_PSW_MWP_VALID
1124	jno	.Lmcck_panic
1125	tmhh	%r8,0x0001		# interrupting from user ?
1126	jnz	4f
1127	TSTMSK	__LC_MCCK_CODE,MCCK_CODE_PSW_IA_VALID
1128	jno	.Lmcck_panic
11294:	SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER
1130.Lmcck_skip:
1131	lghi	%r14,__LC_GPREGS_SAVE_AREA+64
1132	stmg	%r0,%r7,__PT_R0(%r11)
1133	# clear user controlled registers to prevent speculative use
1134	xgr	%r0,%r0
1135	xgr	%r1,%r1
1136	xgr	%r2,%r2
1137	xgr	%r3,%r3
1138	xgr	%r4,%r4
1139	xgr	%r5,%r5
1140	xgr	%r6,%r6
1141	xgr	%r7,%r7
1142	xgr	%r10,%r10
1143	mvc	__PT_R8(64,%r11),0(%r14)
1144	stmg	%r8,%r9,__PT_PSW(%r11)
1145	xc	__PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
1146	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
1147	lgr	%r2,%r11		# pass pointer to pt_regs
1148	brasl	%r14,s390_do_machine_check
1149	tm	__PT_PSW+1(%r11),0x01	# returning to user ?
1150	jno	.Lmcck_return
1151	lg	%r1,__LC_KERNEL_STACK	# switch to kernel stack
1152	mvc	STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
1153	xc	__SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
1154	la	%r11,STACK_FRAME_OVERHEAD(%r1)
1155	lgr	%r15,%r1
1156	ssm	__LC_PGM_NEW_PSW	# turn dat on, keep irqs off
1157	TSTMSK	__LC_CPU_FLAGS,_CIF_MCCK_PENDING
1158	jno	.Lmcck_return
1159	TRACE_IRQS_OFF
1160	brasl	%r14,s390_handle_mcck
1161	TRACE_IRQS_ON
1162.Lmcck_return:
1163	lg	%r14,__LC_VDSO_PER_CPU
1164	lmg	%r0,%r10,__PT_R0(%r11)
1165	mvc	__LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW
1166	tm	__LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
1167	jno	0f
1168	BPON
1169	stpt	__LC_EXIT_TIMER
1170	mvc	__VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
11710:	lmg	%r11,%r15,__PT_R11(%r11)
1172	lpswe	__LC_RETURN_MCCK_PSW
1173
1174.Lmcck_panic:
1175	lg	%r15,__LC_PANIC_STACK
1176	la	%r11,STACK_FRAME_OVERHEAD(%r15)
1177	j	.Lmcck_skip
1178
1179#
1180# PSW restart interrupt handler
1181#
1182ENTRY(restart_int_handler)
1183	TSTMSK	__LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
1184	jz	0f
1185	.insn	s,0xb2800000,__LC_LPP
11860:	stg	%r15,__LC_SAVE_AREA_RESTART
1187	lg	%r15,__LC_RESTART_STACK
1188	aghi	%r15,-__PT_SIZE			# create pt_regs on stack
1189	xc	0(__PT_SIZE,%r15),0(%r15)
1190	stmg	%r0,%r14,__PT_R0(%r15)
1191	mvc	__PT_R15(8,%r15),__LC_SAVE_AREA_RESTART
1192	mvc	__PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw
1193	aghi	%r15,-STACK_FRAME_OVERHEAD	# create stack frame on stack
1194	xc	0(STACK_FRAME_OVERHEAD,%r15),0(%r15)
1195	lg	%r1,__LC_RESTART_FN		# load fn, parm & source cpu
1196	lg	%r2,__LC_RESTART_DATA
1197	lg	%r3,__LC_RESTART_SOURCE
1198	ltgr	%r3,%r3				# test source cpu address
1199	jm	1f				# negative -> skip source stop
12000:	sigp	%r4,%r3,SIGP_SENSE		# sigp sense to source cpu
1201	brc	10,0b				# wait for status stored
12021:	basr	%r14,%r1			# call function
1203	stap	__SF_EMPTY(%r15)		# store cpu address
1204	llgh	%r3,__SF_EMPTY(%r15)
12052:	sigp	%r4,%r3,SIGP_STOP		# sigp stop to current cpu
1206	brc	2,2b
12073:	j	3b
1208
1209	.section .kprobes.text, "ax"
1210
1211#ifdef CONFIG_CHECK_STACK
1212/*
1213 * The synchronous or the asynchronous stack overflowed. We are dead.
1214 * No need to properly save the registers, we are going to panic anyway.
1215 * Setup a pt_regs so that show_trace can provide a good call trace.
1216 */
1217stack_overflow:
1218	lg	%r15,__LC_PANIC_STACK	# change to panic stack
1219	la	%r11,STACK_FRAME_OVERHEAD(%r15)
1220	stmg	%r0,%r7,__PT_R0(%r11)
1221	stmg	%r8,%r9,__PT_PSW(%r11)
1222	mvc	__PT_R8(64,%r11),0(%r14)
1223	stg	%r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2
1224	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
1225	lgr	%r2,%r11		# pass pointer to pt_regs
1226	jg	kernel_stack_overflow
1227#endif
1228
1229cleanup_critical:
1230#if IS_ENABLED(CONFIG_KVM)
1231	clg	%r9,BASED(.Lcleanup_table_sie)	# .Lsie_gmap
1232	jl	0f
1233	clg	%r9,BASED(.Lcleanup_table_sie+8)# .Lsie_done
1234	jl	.Lcleanup_sie
1235#endif
1236	clg	%r9,BASED(.Lcleanup_table)	# system_call
1237	jl	0f
1238	clg	%r9,BASED(.Lcleanup_table+8)	# .Lsysc_do_svc
1239	jl	.Lcleanup_system_call
1240	clg	%r9,BASED(.Lcleanup_table+16)	# .Lsysc_tif
1241	jl	0f
1242	clg	%r9,BASED(.Lcleanup_table+24)	# .Lsysc_restore
1243	jl	.Lcleanup_sysc_tif
1244	clg	%r9,BASED(.Lcleanup_table+32)	# .Lsysc_done
1245	jl	.Lcleanup_sysc_restore
1246	clg	%r9,BASED(.Lcleanup_table+40)	# .Lio_tif
1247	jl	0f
1248	clg	%r9,BASED(.Lcleanup_table+48)	# .Lio_restore
1249	jl	.Lcleanup_io_tif
1250	clg	%r9,BASED(.Lcleanup_table+56)	# .Lio_done
1251	jl	.Lcleanup_io_restore
1252	clg	%r9,BASED(.Lcleanup_table+64)	# psw_idle
1253	jl	0f
1254	clg	%r9,BASED(.Lcleanup_table+72)	# .Lpsw_idle_end
1255	jl	.Lcleanup_idle
1256	clg	%r9,BASED(.Lcleanup_table+80)	# save_fpu_regs
1257	jl	0f
1258	clg	%r9,BASED(.Lcleanup_table+88)	# .Lsave_fpu_regs_end
1259	jl	.Lcleanup_save_fpu_regs
1260	clg	%r9,BASED(.Lcleanup_table+96)	# load_fpu_regs
1261	jl	0f
1262	clg	%r9,BASED(.Lcleanup_table+104)	# .Lload_fpu_regs_end
1263	jl	.Lcleanup_load_fpu_regs
12640:	br	%r14
1265
1266	.align	8
1267.Lcleanup_table:
1268	.quad	system_call
1269	.quad	.Lsysc_do_svc
1270	.quad	.Lsysc_tif
1271	.quad	.Lsysc_restore
1272	.quad	.Lsysc_done
1273	.quad	.Lio_tif
1274	.quad	.Lio_restore
1275	.quad	.Lio_done
1276	.quad	psw_idle
1277	.quad	.Lpsw_idle_end
1278	.quad	save_fpu_regs
1279	.quad	.Lsave_fpu_regs_end
1280	.quad	load_fpu_regs
1281	.quad	.Lload_fpu_regs_end
1282
1283#if IS_ENABLED(CONFIG_KVM)
1284.Lcleanup_table_sie:
1285	.quad	.Lsie_gmap
1286	.quad	.Lsie_done
1287
1288.Lcleanup_sie:
1289	cghi    %r11,__LC_SAVE_AREA_ASYNC 	#Is this in normal interrupt?
1290	je      1f
1291	slg     %r9,BASED(.Lsie_crit_mcck_start)
1292	clg     %r9,BASED(.Lsie_crit_mcck_length)
1293	jh      1f
1294	oi      __LC_CPU_FLAGS+7, _CIF_MCCK_GUEST
12951:	lg	%r9,__SF_EMPTY(%r15)		# get control block pointer
1296	ni	__SIE_PROG0C+3(%r9),0xfe	# no longer in SIE
1297	lctlg	%c1,%c1,__LC_USER_ASCE		# load primary asce
1298	larl	%r9,sie_exit			# skip forward to sie_exit
1299	br	%r14
1300#endif
1301
1302.Lcleanup_system_call:
1303	# check if stpt has been executed
1304	clg	%r9,BASED(.Lcleanup_system_call_insn)
1305	jh	0f
1306	mvc	__LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
1307	cghi	%r11,__LC_SAVE_AREA_ASYNC
1308	je	0f
1309	mvc	__LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
13100:	# check if stmg has been executed
1311	clg	%r9,BASED(.Lcleanup_system_call_insn+8)
1312	jh	0f
1313	mvc	__LC_SAVE_AREA_SYNC(64),0(%r11)
13140:	# check if base register setup + TIF bit load has been done
1315	clg	%r9,BASED(.Lcleanup_system_call_insn+16)
1316	jhe	0f
1317	# set up saved register r12 task struct pointer
1318	stg	%r12,32(%r11)
1319	# set up saved register r13 __TASK_thread offset
1320	mvc	40(8,%r11),BASED(.Lcleanup_system_call_const)
13210:	# check if the user time update has been done
1322	clg	%r9,BASED(.Lcleanup_system_call_insn+24)
1323	jh	0f
1324	lg	%r15,__LC_EXIT_TIMER
1325	slg	%r15,__LC_SYNC_ENTER_TIMER
1326	alg	%r15,__LC_USER_TIMER
1327	stg	%r15,__LC_USER_TIMER
13280:	# check if the system time update has been done
1329	clg	%r9,BASED(.Lcleanup_system_call_insn+32)
1330	jh	0f
1331	lg	%r15,__LC_LAST_UPDATE_TIMER
1332	slg	%r15,__LC_EXIT_TIMER
1333	alg	%r15,__LC_SYSTEM_TIMER
1334	stg	%r15,__LC_SYSTEM_TIMER
13350:	# update accounting time stamp
1336	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
1337	# set up saved register r11
1338	lg	%r15,__LC_KERNEL_STACK
1339	la	%r9,STACK_FRAME_OVERHEAD(%r15)
1340	stg	%r9,24(%r11)		# r11 pt_regs pointer
1341	# fill pt_regs
1342	mvc	__PT_R8(64,%r9),__LC_SAVE_AREA_SYNC
1343	stmg	%r0,%r7,__PT_R0(%r9)
1344	mvc	__PT_PSW(16,%r9),__LC_SVC_OLD_PSW
1345	mvc	__PT_INT_CODE(4,%r9),__LC_SVC_ILC
1346	xc	__PT_FLAGS(8,%r9),__PT_FLAGS(%r9)
1347	mvi	__PT_FLAGS+7(%r9),_PIF_SYSCALL
1348	# setup saved register r15
1349	stg	%r15,56(%r11)		# r15 stack pointer
1350	# set new psw address and exit
1351	larl	%r9,.Lsysc_do_svc
1352	br	%r14
1353.Lcleanup_system_call_insn:
1354	.quad	system_call
1355	.quad	.Lsysc_stmg
1356	.quad	.Lsysc_per
1357	.quad	.Lsysc_vtime+36
1358	.quad	.Lsysc_vtime+42
1359.Lcleanup_system_call_const:
1360	.quad	__TASK_thread
1361
1362.Lcleanup_sysc_tif:
1363	larl	%r9,.Lsysc_tif
1364	br	%r14
1365
1366.Lcleanup_sysc_restore:
1367	# check if stpt has been executed
1368	clg	%r9,BASED(.Lcleanup_sysc_restore_insn)
1369	jh	0f
1370	mvc	__LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1371	cghi	%r11,__LC_SAVE_AREA_ASYNC
1372	je	0f
1373	mvc	__LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
13740:	clg	%r9,BASED(.Lcleanup_sysc_restore_insn+8)
1375	je	1f
1376	lg	%r9,24(%r11)		# get saved pointer to pt_regs
1377	mvc	__LC_RETURN_PSW(16),__PT_PSW(%r9)
1378	mvc	0(64,%r11),__PT_R8(%r9)
1379	lmg	%r0,%r7,__PT_R0(%r9)
13801:	lmg	%r8,%r9,__LC_RETURN_PSW
1381	br	%r14
1382.Lcleanup_sysc_restore_insn:
1383	.quad	.Lsysc_exit_timer
1384	.quad	.Lsysc_done - 4
1385
1386.Lcleanup_io_tif:
1387	larl	%r9,.Lio_tif
1388	br	%r14
1389
1390.Lcleanup_io_restore:
1391	# check if stpt has been executed
1392	clg	%r9,BASED(.Lcleanup_io_restore_insn)
1393	jh	0f
1394	mvc	__LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
13950:	clg	%r9,BASED(.Lcleanup_io_restore_insn+8)
1396	je	1f
1397	lg	%r9,24(%r11)		# get saved r11 pointer to pt_regs
1398	mvc	__LC_RETURN_PSW(16),__PT_PSW(%r9)
1399	mvc	0(64,%r11),__PT_R8(%r9)
1400	lmg	%r0,%r7,__PT_R0(%r9)
14011:	lmg	%r8,%r9,__LC_RETURN_PSW
1402	br	%r14
1403.Lcleanup_io_restore_insn:
1404	.quad	.Lio_exit_timer
1405	.quad	.Lio_done - 4
1406
1407.Lcleanup_idle:
1408	ni	__LC_CPU_FLAGS+7,255-_CIF_ENABLED_WAIT
1409	# copy interrupt clock & cpu timer
1410	mvc	__CLOCK_IDLE_EXIT(8,%r2),__LC_INT_CLOCK
1411	mvc	__TIMER_IDLE_EXIT(8,%r2),__LC_ASYNC_ENTER_TIMER
1412	cghi	%r11,__LC_SAVE_AREA_ASYNC
1413	je	0f
1414	mvc	__CLOCK_IDLE_EXIT(8,%r2),__LC_MCCK_CLOCK
1415	mvc	__TIMER_IDLE_EXIT(8,%r2),__LC_MCCK_ENTER_TIMER
14160:	# check if stck & stpt have been executed
1417	clg	%r9,BASED(.Lcleanup_idle_insn)
1418	jhe	1f
1419	mvc	__CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2)
1420	mvc	__TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r2)
14211:	# calculate idle cycles
1422#ifdef CONFIG_SMP
1423	clg	%r9,BASED(.Lcleanup_idle_insn)
1424	jl	3f
1425	larl	%r1,smp_cpu_mtid
1426	llgf	%r1,0(%r1)
1427	ltgr	%r1,%r1
1428	jz	3f
1429	.insn	rsy,0xeb0000000017,%r1,5,__SF_EMPTY+80(%r15)
1430	larl	%r3,mt_cycles
1431	ag	%r3,__LC_PERCPU_OFFSET
1432	la	%r4,__SF_EMPTY+16(%r15)
14332:	lg	%r0,0(%r3)
1434	slg	%r0,0(%r4)
1435	alg	%r0,64(%r4)
1436	stg	%r0,0(%r3)
1437	la	%r3,8(%r3)
1438	la	%r4,8(%r4)
1439	brct	%r1,2b
1440#endif
14413:	# account system time going idle
1442	lg	%r9,__LC_STEAL_TIMER
1443	alg	%r9,__CLOCK_IDLE_ENTER(%r2)
1444	slg	%r9,__LC_LAST_UPDATE_CLOCK
1445	stg	%r9,__LC_STEAL_TIMER
1446	mvc	__LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2)
1447	lg	%r9,__LC_SYSTEM_TIMER
1448	alg	%r9,__LC_LAST_UPDATE_TIMER
1449	slg	%r9,__TIMER_IDLE_ENTER(%r2)
1450	stg	%r9,__LC_SYSTEM_TIMER
1451	mvc	__LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2)
1452	# prepare return psw
1453	nihh	%r8,0xfcfd		# clear irq & wait state bits
1454	lg	%r9,48(%r11)		# return from psw_idle
1455	br	%r14
1456.Lcleanup_idle_insn:
1457	.quad	.Lpsw_idle_lpsw
1458
1459.Lcleanup_save_fpu_regs:
1460	larl	%r9,save_fpu_regs
1461	br	%r14
1462
1463.Lcleanup_load_fpu_regs:
1464	larl	%r9,load_fpu_regs
1465	br	%r14
1466
1467/*
1468 * Integer constants
1469 */
1470	.align	8
1471.Lcritical_start:
1472	.quad	.L__critical_start
1473.Lcritical_length:
1474	.quad	.L__critical_end - .L__critical_start
1475#if IS_ENABLED(CONFIG_KVM)
1476.Lsie_critical_start:
1477	.quad	.Lsie_gmap
1478.Lsie_critical_length:
1479	.quad	.Lsie_done - .Lsie_gmap
1480.Lsie_crit_mcck_start:
1481	.quad   .Lsie_entry
1482.Lsie_crit_mcck_length:
1483	.quad   .Lsie_skip - .Lsie_entry
1484#endif
1485
1486	.section .rodata, "a"
1487#define SYSCALL(esame,emu)	.long esame
1488	.globl	sys_call_table
1489sys_call_table:
1490#include "asm/syscall_table.h"
1491#undef SYSCALL
1492
1493#ifdef CONFIG_COMPAT
1494
1495#define SYSCALL(esame,emu)	.long emu
1496	.globl	sys_call_table_emu
1497sys_call_table_emu:
1498#include "asm/syscall_table.h"
1499#undef SYSCALL
1500#endif
1501