1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2019 Western Digital Corporation or its affiliates. 4 * 5 * Authors: 6 * Anup Patel <anup.patel@wdc.com> 7 */ 8 9 #include <linux/errno.h> 10 #include <linux/err.h> 11 #include <linux/module.h> 12 #include <linux/kvm_host.h> 13 #include <asm/csr.h> 14 #include <asm/hwcap.h> 15 #include <asm/sbi.h> 16 17 long kvm_arch_dev_ioctl(struct file *filp, 18 unsigned int ioctl, unsigned long arg) 19 { 20 return -EINVAL; 21 } 22 23 int kvm_arch_hardware_enable(void) 24 { 25 unsigned long hideleg, hedeleg; 26 27 hedeleg = 0; 28 hedeleg |= (1UL << EXC_INST_MISALIGNED); 29 hedeleg |= (1UL << EXC_BREAKPOINT); 30 hedeleg |= (1UL << EXC_SYSCALL); 31 hedeleg |= (1UL << EXC_INST_PAGE_FAULT); 32 hedeleg |= (1UL << EXC_LOAD_PAGE_FAULT); 33 hedeleg |= (1UL << EXC_STORE_PAGE_FAULT); 34 csr_write(CSR_HEDELEG, hedeleg); 35 36 hideleg = 0; 37 hideleg |= (1UL << IRQ_VS_SOFT); 38 hideleg |= (1UL << IRQ_VS_TIMER); 39 hideleg |= (1UL << IRQ_VS_EXT); 40 csr_write(CSR_HIDELEG, hideleg); 41 42 csr_write(CSR_HCOUNTEREN, -1UL); 43 44 csr_write(CSR_HVIP, 0); 45 46 return 0; 47 } 48 49 void kvm_arch_hardware_disable(void) 50 { 51 /* 52 * After clearing the hideleg CSR, the host kernel will receive 53 * spurious interrupts if hvip CSR has pending interrupts and the 54 * corresponding enable bits in vsie CSR are asserted. To avoid it, 55 * hvip CSR and vsie CSR must be cleared before clearing hideleg CSR. 56 */ 57 csr_write(CSR_VSIE, 0); 58 csr_write(CSR_HVIP, 0); 59 csr_write(CSR_HEDELEG, 0); 60 csr_write(CSR_HIDELEG, 0); 61 } 62 63 static int __init riscv_kvm_init(void) 64 { 65 const char *str; 66 67 if (!riscv_isa_extension_available(NULL, h)) { 68 kvm_info("hypervisor extension not available\n"); 69 return -ENODEV; 70 } 71 72 if (sbi_spec_is_0_1()) { 73 kvm_info("require SBI v0.2 or higher\n"); 74 return -ENODEV; 75 } 76 77 if (sbi_probe_extension(SBI_EXT_RFENCE) <= 0) { 78 kvm_info("require SBI RFENCE extension\n"); 79 return -ENODEV; 80 } 81 82 kvm_riscv_gstage_mode_detect(); 83 84 kvm_riscv_gstage_vmid_detect(); 85 86 kvm_info("hypervisor extension available\n"); 87 88 switch (kvm_riscv_gstage_mode()) { 89 case HGATP_MODE_SV32X4: 90 str = "Sv32x4"; 91 break; 92 case HGATP_MODE_SV39X4: 93 str = "Sv39x4"; 94 break; 95 case HGATP_MODE_SV48X4: 96 str = "Sv48x4"; 97 break; 98 case HGATP_MODE_SV57X4: 99 str = "Sv57x4"; 100 break; 101 default: 102 return -ENODEV; 103 } 104 kvm_info("using %s G-stage page table format\n", str); 105 106 kvm_info("VMID %ld bits available\n", kvm_riscv_gstage_vmid_bits()); 107 108 return kvm_init(sizeof(struct kvm_vcpu), 0, THIS_MODULE); 109 } 110 module_init(riscv_kvm_init); 111 112 static void __exit riscv_kvm_exit(void) 113 { 114 kvm_exit(); 115 } 116 module_exit(riscv_kvm_exit); 117