1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2012 Regents of the University of California 4 */ 5 6 #ifndef _ASM_RISCV_PGTABLE_H 7 #define _ASM_RISCV_PGTABLE_H 8 9 #include <linux/mmzone.h> 10 #include <linux/sizes.h> 11 12 #include <asm/pgtable-bits.h> 13 14 #ifndef CONFIG_MMU 15 #define KERNEL_LINK_ADDR PAGE_OFFSET 16 #define KERN_VIRT_SIZE (UL(-1)) 17 #else 18 19 #define ADDRESS_SPACE_END (UL(-1)) 20 21 #ifdef CONFIG_64BIT 22 /* Leave 2GB for kernel and BPF at the end of the address space */ 23 #define KERNEL_LINK_ADDR (ADDRESS_SPACE_END - SZ_2G + 1) 24 #else 25 #define KERNEL_LINK_ADDR PAGE_OFFSET 26 #endif 27 28 /* Number of entries in the page global directory */ 29 #define PTRS_PER_PGD (PAGE_SIZE / sizeof(pgd_t)) 30 /* Number of entries in the page table */ 31 #define PTRS_PER_PTE (PAGE_SIZE / sizeof(pte_t)) 32 33 /* 34 * Half of the kernel address space (half of the entries of the page global 35 * directory) is for the direct mapping. 36 */ 37 #define KERN_VIRT_SIZE ((PTRS_PER_PGD / 2 * PGDIR_SIZE) / 2) 38 39 #define VMALLOC_SIZE (KERN_VIRT_SIZE >> 1) 40 #define VMALLOC_END PAGE_OFFSET 41 #define VMALLOC_START (PAGE_OFFSET - VMALLOC_SIZE) 42 43 #define BPF_JIT_REGION_SIZE (SZ_128M) 44 #ifdef CONFIG_64BIT 45 #define BPF_JIT_REGION_START (BPF_JIT_REGION_END - BPF_JIT_REGION_SIZE) 46 #define BPF_JIT_REGION_END (MODULES_END) 47 #else 48 #define BPF_JIT_REGION_START (PAGE_OFFSET - BPF_JIT_REGION_SIZE) 49 #define BPF_JIT_REGION_END (VMALLOC_END) 50 #endif 51 52 /* Modules always live before the kernel */ 53 #ifdef CONFIG_64BIT 54 /* This is used to define the end of the KASAN shadow region */ 55 #define MODULES_LOWEST_VADDR (KERNEL_LINK_ADDR - SZ_2G) 56 #define MODULES_VADDR (PFN_ALIGN((unsigned long)&_end) - SZ_2G) 57 #define MODULES_END (PFN_ALIGN((unsigned long)&_start)) 58 #endif 59 60 /* 61 * Roughly size the vmemmap space to be large enough to fit enough 62 * struct pages to map half the virtual address space. Then 63 * position vmemmap directly below the VMALLOC region. 64 */ 65 #ifdef CONFIG_64BIT 66 #define VA_BITS (pgtable_l5_enabled ? \ 67 57 : (pgtable_l4_enabled ? 48 : 39)) 68 #else 69 #define VA_BITS 32 70 #endif 71 72 #define VMEMMAP_SHIFT \ 73 (VA_BITS - PAGE_SHIFT - 1 + STRUCT_PAGE_MAX_SHIFT) 74 #define VMEMMAP_SIZE BIT(VMEMMAP_SHIFT) 75 #define VMEMMAP_END VMALLOC_START 76 #define VMEMMAP_START (VMALLOC_START - VMEMMAP_SIZE) 77 78 /* 79 * Define vmemmap for pfn_to_page & page_to_pfn calls. Needed if kernel 80 * is configured with CONFIG_SPARSEMEM_VMEMMAP enabled. 81 */ 82 #define vmemmap ((struct page *)VMEMMAP_START) 83 84 #define PCI_IO_SIZE SZ_16M 85 #define PCI_IO_END VMEMMAP_START 86 #define PCI_IO_START (PCI_IO_END - PCI_IO_SIZE) 87 88 #define FIXADDR_TOP PCI_IO_START 89 #ifdef CONFIG_64BIT 90 #define FIXADDR_SIZE PMD_SIZE 91 #else 92 #define FIXADDR_SIZE PGDIR_SIZE 93 #endif 94 #define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) 95 96 #endif 97 98 #ifdef CONFIG_XIP_KERNEL 99 #define XIP_OFFSET SZ_32M 100 #define XIP_OFFSET_MASK (SZ_32M - 1) 101 #else 102 #define XIP_OFFSET 0 103 #endif 104 105 #ifndef __ASSEMBLY__ 106 107 #include <asm/page.h> 108 #include <asm/tlbflush.h> 109 #include <linux/mm_types.h> 110 111 #define __page_val_to_pfn(_val) (((_val) & _PAGE_PFN_MASK) >> _PAGE_PFN_SHIFT) 112 113 #ifdef CONFIG_64BIT 114 #include <asm/pgtable-64.h> 115 #else 116 #include <asm/pgtable-32.h> 117 #endif /* CONFIG_64BIT */ 118 119 #ifdef CONFIG_XIP_KERNEL 120 #define XIP_FIXUP(addr) ({ \ 121 uintptr_t __a = (uintptr_t)(addr); \ 122 (__a >= CONFIG_XIP_PHYS_ADDR && \ 123 __a < CONFIG_XIP_PHYS_ADDR + XIP_OFFSET * 2) ? \ 124 __a - CONFIG_XIP_PHYS_ADDR + CONFIG_PHYS_RAM_BASE - XIP_OFFSET :\ 125 __a; \ 126 }) 127 #else 128 #define XIP_FIXUP(addr) (addr) 129 #endif /* CONFIG_XIP_KERNEL */ 130 131 struct pt_alloc_ops { 132 pte_t *(*get_pte_virt)(phys_addr_t pa); 133 phys_addr_t (*alloc_pte)(uintptr_t va); 134 #ifndef __PAGETABLE_PMD_FOLDED 135 pmd_t *(*get_pmd_virt)(phys_addr_t pa); 136 phys_addr_t (*alloc_pmd)(uintptr_t va); 137 pud_t *(*get_pud_virt)(phys_addr_t pa); 138 phys_addr_t (*alloc_pud)(uintptr_t va); 139 p4d_t *(*get_p4d_virt)(phys_addr_t pa); 140 phys_addr_t (*alloc_p4d)(uintptr_t va); 141 #endif 142 }; 143 144 extern struct pt_alloc_ops pt_ops __initdata; 145 146 #ifdef CONFIG_MMU 147 /* Number of PGD entries that a user-mode program can use */ 148 #define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE) 149 150 /* Page protection bits */ 151 #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_USER) 152 153 #define PAGE_NONE __pgprot(_PAGE_PROT_NONE | _PAGE_READ) 154 #define PAGE_READ __pgprot(_PAGE_BASE | _PAGE_READ) 155 #define PAGE_WRITE __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_WRITE) 156 #define PAGE_EXEC __pgprot(_PAGE_BASE | _PAGE_EXEC) 157 #define PAGE_READ_EXEC __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_EXEC) 158 #define PAGE_WRITE_EXEC __pgprot(_PAGE_BASE | _PAGE_READ | \ 159 _PAGE_EXEC | _PAGE_WRITE) 160 161 #define PAGE_COPY PAGE_READ 162 #define PAGE_COPY_EXEC PAGE_EXEC 163 #define PAGE_COPY_READ_EXEC PAGE_READ_EXEC 164 #define PAGE_SHARED PAGE_WRITE 165 #define PAGE_SHARED_EXEC PAGE_WRITE_EXEC 166 167 #define _PAGE_KERNEL (_PAGE_READ \ 168 | _PAGE_WRITE \ 169 | _PAGE_PRESENT \ 170 | _PAGE_ACCESSED \ 171 | _PAGE_DIRTY \ 172 | _PAGE_GLOBAL) 173 174 #define PAGE_KERNEL __pgprot(_PAGE_KERNEL) 175 #define PAGE_KERNEL_READ __pgprot(_PAGE_KERNEL & ~_PAGE_WRITE) 176 #define PAGE_KERNEL_EXEC __pgprot(_PAGE_KERNEL | _PAGE_EXEC) 177 #define PAGE_KERNEL_READ_EXEC __pgprot((_PAGE_KERNEL & ~_PAGE_WRITE) \ 178 | _PAGE_EXEC) 179 180 #define PAGE_TABLE __pgprot(_PAGE_TABLE) 181 182 #define _PAGE_IOREMAP ((_PAGE_KERNEL & ~_PAGE_MTMASK) | _PAGE_IO) 183 #define PAGE_KERNEL_IO __pgprot(_PAGE_IOREMAP) 184 185 extern pgd_t swapper_pg_dir[]; 186 187 /* MAP_PRIVATE permissions: xwr (copy-on-write) */ 188 #define __P000 PAGE_NONE 189 #define __P001 PAGE_READ 190 #define __P010 PAGE_COPY 191 #define __P011 PAGE_COPY 192 #define __P100 PAGE_EXEC 193 #define __P101 PAGE_READ_EXEC 194 #define __P110 PAGE_COPY_EXEC 195 #define __P111 PAGE_COPY_READ_EXEC 196 197 /* MAP_SHARED permissions: xwr */ 198 #define __S000 PAGE_NONE 199 #define __S001 PAGE_READ 200 #define __S010 PAGE_SHARED 201 #define __S011 PAGE_SHARED 202 #define __S100 PAGE_EXEC 203 #define __S101 PAGE_READ_EXEC 204 #define __S110 PAGE_SHARED_EXEC 205 #define __S111 PAGE_SHARED_EXEC 206 207 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 208 static inline int pmd_present(pmd_t pmd) 209 { 210 /* 211 * Checking for _PAGE_LEAF is needed too because: 212 * When splitting a THP, split_huge_page() will temporarily clear 213 * the present bit, in this situation, pmd_present() and 214 * pmd_trans_huge() still needs to return true. 215 */ 216 return (pmd_val(pmd) & (_PAGE_PRESENT | _PAGE_PROT_NONE | _PAGE_LEAF)); 217 } 218 #else 219 static inline int pmd_present(pmd_t pmd) 220 { 221 return (pmd_val(pmd) & (_PAGE_PRESENT | _PAGE_PROT_NONE)); 222 } 223 #endif 224 225 static inline int pmd_none(pmd_t pmd) 226 { 227 return (pmd_val(pmd) == 0); 228 } 229 230 static inline int pmd_bad(pmd_t pmd) 231 { 232 return !pmd_present(pmd) || (pmd_val(pmd) & _PAGE_LEAF); 233 } 234 235 #define pmd_leaf pmd_leaf 236 static inline int pmd_leaf(pmd_t pmd) 237 { 238 return pmd_present(pmd) && (pmd_val(pmd) & _PAGE_LEAF); 239 } 240 241 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd) 242 { 243 *pmdp = pmd; 244 } 245 246 static inline void pmd_clear(pmd_t *pmdp) 247 { 248 set_pmd(pmdp, __pmd(0)); 249 } 250 251 static inline pgd_t pfn_pgd(unsigned long pfn, pgprot_t prot) 252 { 253 return __pgd((pfn << _PAGE_PFN_SHIFT) | pgprot_val(prot)); 254 } 255 256 static inline unsigned long _pgd_pfn(pgd_t pgd) 257 { 258 return pgd_val(pgd) >> _PAGE_PFN_SHIFT; 259 } 260 261 static inline struct page *pmd_page(pmd_t pmd) 262 { 263 return pfn_to_page(__page_val_to_pfn(pmd_val(pmd))); 264 } 265 266 static inline unsigned long pmd_page_vaddr(pmd_t pmd) 267 { 268 return (unsigned long)pfn_to_virt(__page_val_to_pfn(pmd_val(pmd))); 269 } 270 271 static inline pte_t pmd_pte(pmd_t pmd) 272 { 273 return __pte(pmd_val(pmd)); 274 } 275 276 static inline pte_t pud_pte(pud_t pud) 277 { 278 return __pte(pud_val(pud)); 279 } 280 281 /* Yields the page frame number (PFN) of a page table entry */ 282 static inline unsigned long pte_pfn(pte_t pte) 283 { 284 return __page_val_to_pfn(pte_val(pte)); 285 } 286 287 #define pte_page(x) pfn_to_page(pte_pfn(x)) 288 289 /* Constructs a page table entry */ 290 static inline pte_t pfn_pte(unsigned long pfn, pgprot_t prot) 291 { 292 return __pte((pfn << _PAGE_PFN_SHIFT) | pgprot_val(prot)); 293 } 294 295 #define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot) 296 297 static inline int pte_present(pte_t pte) 298 { 299 return (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PROT_NONE)); 300 } 301 302 static inline int pte_none(pte_t pte) 303 { 304 return (pte_val(pte) == 0); 305 } 306 307 static inline int pte_write(pte_t pte) 308 { 309 return pte_val(pte) & _PAGE_WRITE; 310 } 311 312 static inline int pte_exec(pte_t pte) 313 { 314 return pte_val(pte) & _PAGE_EXEC; 315 } 316 317 static inline int pte_huge(pte_t pte) 318 { 319 return pte_present(pte) && (pte_val(pte) & _PAGE_LEAF); 320 } 321 322 static inline int pte_dirty(pte_t pte) 323 { 324 return pte_val(pte) & _PAGE_DIRTY; 325 } 326 327 static inline int pte_young(pte_t pte) 328 { 329 return pte_val(pte) & _PAGE_ACCESSED; 330 } 331 332 static inline int pte_special(pte_t pte) 333 { 334 return pte_val(pte) & _PAGE_SPECIAL; 335 } 336 337 /* static inline pte_t pte_rdprotect(pte_t pte) */ 338 339 static inline pte_t pte_wrprotect(pte_t pte) 340 { 341 return __pte(pte_val(pte) & ~(_PAGE_WRITE)); 342 } 343 344 /* static inline pte_t pte_mkread(pte_t pte) */ 345 346 static inline pte_t pte_mkwrite(pte_t pte) 347 { 348 return __pte(pte_val(pte) | _PAGE_WRITE); 349 } 350 351 /* static inline pte_t pte_mkexec(pte_t pte) */ 352 353 static inline pte_t pte_mkdirty(pte_t pte) 354 { 355 return __pte(pte_val(pte) | _PAGE_DIRTY); 356 } 357 358 static inline pte_t pte_mkclean(pte_t pte) 359 { 360 return __pte(pte_val(pte) & ~(_PAGE_DIRTY)); 361 } 362 363 static inline pte_t pte_mkyoung(pte_t pte) 364 { 365 return __pte(pte_val(pte) | _PAGE_ACCESSED); 366 } 367 368 static inline pte_t pte_mkold(pte_t pte) 369 { 370 return __pte(pte_val(pte) & ~(_PAGE_ACCESSED)); 371 } 372 373 static inline pte_t pte_mkspecial(pte_t pte) 374 { 375 return __pte(pte_val(pte) | _PAGE_SPECIAL); 376 } 377 378 static inline pte_t pte_mkhuge(pte_t pte) 379 { 380 return pte; 381 } 382 383 #ifdef CONFIG_NUMA_BALANCING 384 /* 385 * See the comment in include/asm-generic/pgtable.h 386 */ 387 static inline int pte_protnone(pte_t pte) 388 { 389 return (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PROT_NONE)) == _PAGE_PROT_NONE; 390 } 391 392 static inline int pmd_protnone(pmd_t pmd) 393 { 394 return pte_protnone(pmd_pte(pmd)); 395 } 396 #endif 397 398 /* Modify page protection bits */ 399 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 400 { 401 return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot)); 402 } 403 404 #define pgd_ERROR(e) \ 405 pr_err("%s:%d: bad pgd " PTE_FMT ".\n", __FILE__, __LINE__, pgd_val(e)) 406 407 408 /* Commit new configuration to MMU hardware */ 409 static inline void update_mmu_cache(struct vm_area_struct *vma, 410 unsigned long address, pte_t *ptep) 411 { 412 /* 413 * The kernel assumes that TLBs don't cache invalid entries, but 414 * in RISC-V, SFENCE.VMA specifies an ordering constraint, not a 415 * cache flush; it is necessary even after writing invalid entries. 416 * Relying on flush_tlb_fix_spurious_fault would suffice, but 417 * the extra traps reduce performance. So, eagerly SFENCE.VMA. 418 */ 419 local_flush_tlb_page(address); 420 } 421 422 static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, 423 unsigned long address, pmd_t *pmdp) 424 { 425 pte_t *ptep = (pte_t *)pmdp; 426 427 update_mmu_cache(vma, address, ptep); 428 } 429 430 #define __HAVE_ARCH_PTE_SAME 431 static inline int pte_same(pte_t pte_a, pte_t pte_b) 432 { 433 return pte_val(pte_a) == pte_val(pte_b); 434 } 435 436 /* 437 * Certain architectures need to do special things when PTEs within 438 * a page table are directly modified. Thus, the following hook is 439 * made available. 440 */ 441 static inline void set_pte(pte_t *ptep, pte_t pteval) 442 { 443 *ptep = pteval; 444 } 445 446 void flush_icache_pte(pte_t pte); 447 448 static inline void set_pte_at(struct mm_struct *mm, 449 unsigned long addr, pte_t *ptep, pte_t pteval) 450 { 451 if (pte_present(pteval) && pte_exec(pteval)) 452 flush_icache_pte(pteval); 453 454 set_pte(ptep, pteval); 455 } 456 457 static inline void pte_clear(struct mm_struct *mm, 458 unsigned long addr, pte_t *ptep) 459 { 460 set_pte_at(mm, addr, ptep, __pte(0)); 461 } 462 463 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS 464 static inline int ptep_set_access_flags(struct vm_area_struct *vma, 465 unsigned long address, pte_t *ptep, 466 pte_t entry, int dirty) 467 { 468 if (!pte_same(*ptep, entry)) 469 set_pte_at(vma->vm_mm, address, ptep, entry); 470 /* 471 * update_mmu_cache will unconditionally execute, handling both 472 * the case that the PTE changed and the spurious fault case. 473 */ 474 return true; 475 } 476 477 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR 478 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, 479 unsigned long address, pte_t *ptep) 480 { 481 return __pte(atomic_long_xchg((atomic_long_t *)ptep, 0)); 482 } 483 484 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 485 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, 486 unsigned long address, 487 pte_t *ptep) 488 { 489 if (!pte_young(*ptep)) 490 return 0; 491 return test_and_clear_bit(_PAGE_ACCESSED_OFFSET, &pte_val(*ptep)); 492 } 493 494 #define __HAVE_ARCH_PTEP_SET_WRPROTECT 495 static inline void ptep_set_wrprotect(struct mm_struct *mm, 496 unsigned long address, pte_t *ptep) 497 { 498 atomic_long_and(~(unsigned long)_PAGE_WRITE, (atomic_long_t *)ptep); 499 } 500 501 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH 502 static inline int ptep_clear_flush_young(struct vm_area_struct *vma, 503 unsigned long address, pte_t *ptep) 504 { 505 /* 506 * This comment is borrowed from x86, but applies equally to RISC-V: 507 * 508 * Clearing the accessed bit without a TLB flush 509 * doesn't cause data corruption. [ It could cause incorrect 510 * page aging and the (mistaken) reclaim of hot pages, but the 511 * chance of that should be relatively low. ] 512 * 513 * So as a performance optimization don't flush the TLB when 514 * clearing the accessed bit, it will eventually be flushed by 515 * a context switch or a VM operation anyway. [ In the rare 516 * event of it not getting flushed for a long time the delay 517 * shouldn't really matter because there's no real memory 518 * pressure for swapout to react to. ] 519 */ 520 return ptep_test_and_clear_young(vma, address, ptep); 521 } 522 523 #define pgprot_noncached pgprot_noncached 524 static inline pgprot_t pgprot_noncached(pgprot_t _prot) 525 { 526 unsigned long prot = pgprot_val(_prot); 527 528 prot &= ~_PAGE_MTMASK; 529 prot |= _PAGE_IO; 530 531 return __pgprot(prot); 532 } 533 534 #define pgprot_writecombine pgprot_writecombine 535 static inline pgprot_t pgprot_writecombine(pgprot_t _prot) 536 { 537 unsigned long prot = pgprot_val(_prot); 538 539 prot &= ~_PAGE_MTMASK; 540 prot |= _PAGE_NOCACHE; 541 542 return __pgprot(prot); 543 } 544 545 /* 546 * THP functions 547 */ 548 static inline pmd_t pte_pmd(pte_t pte) 549 { 550 return __pmd(pte_val(pte)); 551 } 552 553 static inline pmd_t pmd_mkhuge(pmd_t pmd) 554 { 555 return pmd; 556 } 557 558 static inline pmd_t pmd_mkinvalid(pmd_t pmd) 559 { 560 return __pmd(pmd_val(pmd) & ~(_PAGE_PRESENT|_PAGE_PROT_NONE)); 561 } 562 563 #define __pmd_to_phys(pmd) (pmd_val(pmd) >> _PAGE_PFN_SHIFT << PAGE_SHIFT) 564 565 static inline unsigned long pmd_pfn(pmd_t pmd) 566 { 567 return ((__pmd_to_phys(pmd) & PMD_MASK) >> PAGE_SHIFT); 568 } 569 570 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) 571 { 572 return pte_pmd(pte_modify(pmd_pte(pmd), newprot)); 573 } 574 575 #define pmd_write pmd_write 576 static inline int pmd_write(pmd_t pmd) 577 { 578 return pte_write(pmd_pte(pmd)); 579 } 580 581 static inline int pmd_dirty(pmd_t pmd) 582 { 583 return pte_dirty(pmd_pte(pmd)); 584 } 585 586 static inline int pmd_young(pmd_t pmd) 587 { 588 return pte_young(pmd_pte(pmd)); 589 } 590 591 static inline pmd_t pmd_mkold(pmd_t pmd) 592 { 593 return pte_pmd(pte_mkold(pmd_pte(pmd))); 594 } 595 596 static inline pmd_t pmd_mkyoung(pmd_t pmd) 597 { 598 return pte_pmd(pte_mkyoung(pmd_pte(pmd))); 599 } 600 601 static inline pmd_t pmd_mkwrite(pmd_t pmd) 602 { 603 return pte_pmd(pte_mkwrite(pmd_pte(pmd))); 604 } 605 606 static inline pmd_t pmd_wrprotect(pmd_t pmd) 607 { 608 return pte_pmd(pte_wrprotect(pmd_pte(pmd))); 609 } 610 611 static inline pmd_t pmd_mkclean(pmd_t pmd) 612 { 613 return pte_pmd(pte_mkclean(pmd_pte(pmd))); 614 } 615 616 static inline pmd_t pmd_mkdirty(pmd_t pmd) 617 { 618 return pte_pmd(pte_mkdirty(pmd_pte(pmd))); 619 } 620 621 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr, 622 pmd_t *pmdp, pmd_t pmd) 623 { 624 return set_pte_at(mm, addr, (pte_t *)pmdp, pmd_pte(pmd)); 625 } 626 627 static inline void set_pud_at(struct mm_struct *mm, unsigned long addr, 628 pud_t *pudp, pud_t pud) 629 { 630 return set_pte_at(mm, addr, (pte_t *)pudp, pud_pte(pud)); 631 } 632 633 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 634 static inline int pmd_trans_huge(pmd_t pmd) 635 { 636 return pmd_leaf(pmd); 637 } 638 639 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS 640 static inline int pmdp_set_access_flags(struct vm_area_struct *vma, 641 unsigned long address, pmd_t *pmdp, 642 pmd_t entry, int dirty) 643 { 644 return ptep_set_access_flags(vma, address, (pte_t *)pmdp, pmd_pte(entry), dirty); 645 } 646 647 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG 648 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma, 649 unsigned long address, pmd_t *pmdp) 650 { 651 return ptep_test_and_clear_young(vma, address, (pte_t *)pmdp); 652 } 653 654 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR 655 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, 656 unsigned long address, pmd_t *pmdp) 657 { 658 return pte_pmd(ptep_get_and_clear(mm, address, (pte_t *)pmdp)); 659 } 660 661 #define __HAVE_ARCH_PMDP_SET_WRPROTECT 662 static inline void pmdp_set_wrprotect(struct mm_struct *mm, 663 unsigned long address, pmd_t *pmdp) 664 { 665 ptep_set_wrprotect(mm, address, (pte_t *)pmdp); 666 } 667 668 #define pmdp_establish pmdp_establish 669 static inline pmd_t pmdp_establish(struct vm_area_struct *vma, 670 unsigned long address, pmd_t *pmdp, pmd_t pmd) 671 { 672 return __pmd(atomic_long_xchg((atomic_long_t *)pmdp, pmd_val(pmd))); 673 } 674 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 675 676 /* 677 * Encode and decode a swap entry 678 * 679 * Format of swap PTE: 680 * bit 0: _PAGE_PRESENT (zero) 681 * bit 1 to 3: _PAGE_LEAF (zero) 682 * bit 5: _PAGE_PROT_NONE (zero) 683 * bits 6 to 10: swap type 684 * bits 10 to XLEN-1: swap offset 685 */ 686 #define __SWP_TYPE_SHIFT 6 687 #define __SWP_TYPE_BITS 5 688 #define __SWP_TYPE_MASK ((1UL << __SWP_TYPE_BITS) - 1) 689 #define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT) 690 691 #define MAX_SWAPFILES_CHECK() \ 692 BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS) 693 694 #define __swp_type(x) (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK) 695 #define __swp_offset(x) ((x).val >> __SWP_OFFSET_SHIFT) 696 #define __swp_entry(type, offset) ((swp_entry_t) \ 697 { ((type) << __SWP_TYPE_SHIFT) | ((offset) << __SWP_OFFSET_SHIFT) }) 698 699 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) 700 #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) 701 702 #ifdef CONFIG_ARCH_ENABLE_THP_MIGRATION 703 #define __pmd_to_swp_entry(pmd) ((swp_entry_t) { pmd_val(pmd) }) 704 #define __swp_entry_to_pmd(swp) __pmd((swp).val) 705 #endif /* CONFIG_ARCH_ENABLE_THP_MIGRATION */ 706 707 /* 708 * In the RV64 Linux scheme, we give the user half of the virtual-address space 709 * and give the kernel the other (upper) half. 710 */ 711 #ifdef CONFIG_64BIT 712 #define KERN_VIRT_START (-(BIT(VA_BITS)) + TASK_SIZE) 713 #else 714 #define KERN_VIRT_START FIXADDR_START 715 #endif 716 717 /* 718 * Task size is 0x4000000000 for RV64 or 0x9fc00000 for RV32. 719 * Note that PGDIR_SIZE must evenly divide TASK_SIZE. 720 * Task size is: 721 * - 0x9fc00000 (~2.5GB) for RV32. 722 * - 0x4000000000 ( 256GB) for RV64 using SV39 mmu 723 * - 0x800000000000 ( 128TB) for RV64 using SV48 mmu 724 * 725 * Note that PGDIR_SIZE must evenly divide TASK_SIZE since "RISC-V 726 * Instruction Set Manual Volume II: Privileged Architecture" states that 727 * "load and store effective addresses, which are 64bits, must have bits 728 * 63–48 all equal to bit 47, or else a page-fault exception will occur." 729 */ 730 #ifdef CONFIG_64BIT 731 #define TASK_SIZE (PGDIR_SIZE * PTRS_PER_PGD / 2) 732 #define TASK_SIZE_MIN (PGDIR_SIZE_L3 * PTRS_PER_PGD / 2) 733 #else 734 #define TASK_SIZE FIXADDR_START 735 #define TASK_SIZE_MIN TASK_SIZE 736 #endif 737 738 #else /* CONFIG_MMU */ 739 740 #define PAGE_SHARED __pgprot(0) 741 #define PAGE_KERNEL __pgprot(0) 742 #define swapper_pg_dir NULL 743 #define TASK_SIZE 0xffffffffUL 744 #define VMALLOC_START 0 745 #define VMALLOC_END TASK_SIZE 746 747 #endif /* !CONFIG_MMU */ 748 749 #define kern_addr_valid(addr) (1) /* FIXME */ 750 751 extern char _start[]; 752 extern void *_dtb_early_va; 753 extern uintptr_t _dtb_early_pa; 754 #if defined(CONFIG_XIP_KERNEL) && defined(CONFIG_MMU) 755 #define dtb_early_va (*(void **)XIP_FIXUP(&_dtb_early_va)) 756 #define dtb_early_pa (*(uintptr_t *)XIP_FIXUP(&_dtb_early_pa)) 757 #else 758 #define dtb_early_va _dtb_early_va 759 #define dtb_early_pa _dtb_early_pa 760 #endif /* CONFIG_XIP_KERNEL */ 761 extern u64 satp_mode; 762 extern bool pgtable_l4_enabled; 763 764 void paging_init(void); 765 void misc_mem_init(void); 766 767 /* 768 * ZERO_PAGE is a global shared page that is always zero, 769 * used for zero-mapped memory areas, etc. 770 */ 771 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; 772 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) 773 774 #endif /* !__ASSEMBLY__ */ 775 776 #endif /* _ASM_RISCV_PGTABLE_H */ 777