1 /* 2 * linux/arch/powerpc/platforms/cell/cell_setup.c 3 * 4 * Copyright (C) 1995 Linus Torvalds 5 * Adapted from 'alpha' version by Gary Thomas 6 * Modified by Cort Dougan (cort@cs.nmt.edu) 7 * Modified by PPC64 Team, IBM Corp 8 * Modified by Cell Team, IBM Deutschland Entwicklung GmbH 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License 12 * as published by the Free Software Foundation; either version 13 * 2 of the License, or (at your option) any later version. 14 */ 15 #undef DEBUG 16 17 #include <linux/sched.h> 18 #include <linux/kernel.h> 19 #include <linux/mm.h> 20 #include <linux/stddef.h> 21 #include <linux/unistd.h> 22 #include <linux/slab.h> 23 #include <linux/user.h> 24 #include <linux/reboot.h> 25 #include <linux/init.h> 26 #include <linux/delay.h> 27 #include <linux/irq.h> 28 #include <linux/seq_file.h> 29 #include <linux/root_dev.h> 30 #include <linux/console.h> 31 #include <linux/mutex.h> 32 #include <linux/memory_hotplug.h> 33 #include <linux/notifier.h> 34 35 #include <asm/mmu.h> 36 #include <asm/processor.h> 37 #include <asm/io.h> 38 #include <asm/kexec.h> 39 #include <asm/pgtable.h> 40 #include <asm/prom.h> 41 #include <asm/rtas.h> 42 #include <asm/pci-bridge.h> 43 #include <asm/iommu.h> 44 #include <asm/dma.h> 45 #include <asm/machdep.h> 46 #include <asm/time.h> 47 #include <asm/nvram.h> 48 #include <asm/cputable.h> 49 #include <asm/ppc-pci.h> 50 #include <asm/irq.h> 51 #include <asm/spu.h> 52 #include <asm/spu_priv1.h> 53 #include <asm/udbg.h> 54 #include <asm/mpic.h> 55 #include <asm/of_platform.h> 56 57 #include "interrupt.h" 58 #include "iommu.h" 59 #include "cbe_regs.h" 60 #include "pervasive.h" 61 #include "ras.h" 62 63 #ifdef DEBUG 64 #define DBG(fmt...) udbg_printf(fmt) 65 #else 66 #define DBG(fmt...) 67 #endif 68 69 static void cell_show_cpuinfo(struct seq_file *m) 70 { 71 struct device_node *root; 72 const char *model = ""; 73 74 root = of_find_node_by_path("/"); 75 if (root) 76 model = get_property(root, "model", NULL); 77 seq_printf(m, "machine\t\t: CHRP %s\n", model); 78 of_node_put(root); 79 } 80 81 static void cell_progress(char *s, unsigned short hex) 82 { 83 printk("*** %04x : %s\n", hex, s ? s : ""); 84 } 85 86 static int cell_of_bus_notify(struct notifier_block *nb, unsigned long action, 87 void *data) 88 { 89 struct device *dev = data; 90 91 if (action != BUS_NOTIFY_ADD_DEVICE) 92 return 0; 93 94 /* For now, we just use the PCI DMA ops for everything, though 95 * we'll need something better when we have a real iommu 96 * implementation. 97 */ 98 dev->archdata.dma_ops = pci_dma_ops; 99 100 return 0; 101 } 102 103 static struct notifier_block cell_of_bus_notifier = { 104 .notifier_call = cell_of_bus_notify 105 }; 106 107 108 static int __init cell_publish_devices(void) 109 { 110 if (!machine_is(cell)) 111 return 0; 112 113 /* Register callbacks on OF platform device addition/removal 114 * to handle linking them to the right DMA operations 115 */ 116 bus_register_notifier(&of_platform_bus_type, &cell_of_bus_notifier); 117 118 /* Publish OF platform devices for southbridge IOs */ 119 of_platform_bus_probe(NULL, NULL, NULL); 120 121 return 0; 122 } 123 device_initcall(cell_publish_devices); 124 125 static void cell_mpic_cascade(unsigned int irq, struct irq_desc *desc) 126 { 127 struct mpic *mpic = desc->handler_data; 128 unsigned int virq; 129 130 virq = mpic_get_one_irq(mpic); 131 if (virq != NO_IRQ) 132 generic_handle_irq(virq); 133 desc->chip->eoi(irq); 134 } 135 136 static void __init mpic_init_IRQ(void) 137 { 138 struct device_node *dn; 139 struct mpic *mpic; 140 unsigned int virq; 141 142 for (dn = NULL; 143 (dn = of_find_node_by_name(dn, "interrupt-controller"));) { 144 if (!device_is_compatible(dn, "CBEA,platform-open-pic")) 145 continue; 146 147 /* The MPIC driver will get everything it needs from the 148 * device-tree, just pass 0 to all arguments 149 */ 150 mpic = mpic_alloc(dn, 0, 0, 0, 0, " MPIC "); 151 if (mpic == NULL) 152 continue; 153 mpic_init(mpic); 154 155 virq = irq_of_parse_and_map(dn, 0); 156 if (virq == NO_IRQ) 157 continue; 158 159 printk(KERN_INFO "%s : hooking up to IRQ %d\n", 160 dn->full_name, virq); 161 set_irq_data(virq, mpic); 162 set_irq_chained_handler(virq, cell_mpic_cascade); 163 } 164 } 165 166 167 static void __init cell_init_irq(void) 168 { 169 iic_init_IRQ(); 170 spider_init_IRQ(); 171 mpic_init_IRQ(); 172 } 173 174 static void __init cell_setup_arch(void) 175 { 176 #ifdef CONFIG_SPU_BASE 177 spu_priv1_ops = &spu_priv1_mmio_ops; 178 #endif 179 180 cbe_regs_init(); 181 182 #ifdef CONFIG_CBE_RAS 183 cbe_ras_init(); 184 #endif 185 186 #ifdef CONFIG_SMP 187 smp_init_cell(); 188 #endif 189 /* init to some ~sane value until calibrate_delay() runs */ 190 loops_per_jiffy = 50000000; 191 192 if (ROOT_DEV == 0) { 193 printk("No ramdisk, default root is /dev/hda2\n"); 194 ROOT_DEV = Root_HDA2; 195 } 196 197 /* Find and initialize PCI host bridges */ 198 init_pci_config_tokens(); 199 find_and_init_phbs(); 200 cbe_pervasive_init(); 201 #ifdef CONFIG_DUMMY_CONSOLE 202 conswitchp = &dummy_con; 203 #endif 204 205 mmio_nvram_init(); 206 } 207 208 /* 209 * Early initialization. Relocation is on but do not reference unbolted pages 210 */ 211 static void __init cell_init_early(void) 212 { 213 DBG(" -> cell_init_early()\n"); 214 215 cell_init_iommu(); 216 217 DBG(" <- cell_init_early()\n"); 218 } 219 220 221 static int __init cell_probe(void) 222 { 223 unsigned long root = of_get_flat_dt_root(); 224 225 if (!of_flat_dt_is_compatible(root, "IBM,CBEA") && 226 !of_flat_dt_is_compatible(root, "IBM,CPBW-1.0")) 227 return 0; 228 229 hpte_init_native(); 230 231 return 1; 232 } 233 234 /* 235 * Cell has no legacy IO; anything calling this function has to 236 * fail or bad things will happen 237 */ 238 static int cell_check_legacy_ioport(unsigned int baseport) 239 { 240 return -ENODEV; 241 } 242 243 define_machine(cell) { 244 .name = "Cell", 245 .probe = cell_probe, 246 .setup_arch = cell_setup_arch, 247 .init_early = cell_init_early, 248 .show_cpuinfo = cell_show_cpuinfo, 249 .restart = rtas_restart, 250 .power_off = rtas_power_off, 251 .halt = rtas_halt, 252 .get_boot_time = rtas_get_boot_time, 253 .get_rtc_time = rtas_get_rtc_time, 254 .set_rtc_time = rtas_set_rtc_time, 255 .calibrate_decr = generic_calibrate_decr, 256 .check_legacy_ioport = cell_check_legacy_ioport, 257 .progress = cell_progress, 258 .init_IRQ = cell_init_irq, 259 .pci_setup_phb = rtas_setup_phb, 260 #ifdef CONFIG_KEXEC 261 .machine_kexec = default_machine_kexec, 262 .machine_kexec_prepare = default_machine_kexec_prepare, 263 .machine_crash_shutdown = default_machine_crash_shutdown, 264 #endif 265 }; 266