xref: /openbmc/linux/arch/powerpc/platforms/86xx/gef_sbc310.c (revision c900529f3d9161bfde5cca0754f83b4d3c3e0220)
12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
2bb2b66dcSMartyn Welch /*
3948e78c3SMartyn Welch  * GE SBC310 board support
4bb2b66dcSMartyn Welch  *
5948e78c3SMartyn Welch  * Author: Martyn Welch <martyn.welch@ge.com>
6bb2b66dcSMartyn Welch  *
7948e78c3SMartyn Welch  * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
8bb2b66dcSMartyn Welch  *
9bb2b66dcSMartyn Welch  * Based on: mpc86xx_hpcn.c (MPC86xx HPCN board specific routines)
10bb2b66dcSMartyn Welch  * Copyright 2006 Freescale Semiconductor Inc.
11bb2b66dcSMartyn Welch  *
12bb2b66dcSMartyn Welch  * NEC fixup adapted from arch/mips/pci/fixup-lm2e.c
13bb2b66dcSMartyn Welch  */
14bb2b66dcSMartyn Welch 
15bb2b66dcSMartyn Welch #include <linux/stddef.h>
16bb2b66dcSMartyn Welch #include <linux/kernel.h>
17bb2b66dcSMartyn Welch #include <linux/pci.h>
18bb2b66dcSMartyn Welch #include <linux/kdev_t.h>
19bb2b66dcSMartyn Welch #include <linux/delay.h>
20bb2b66dcSMartyn Welch #include <linux/seq_file.h>
21*81d7cac4SRob Herring #include <linux/of.h>
22e6f6390aSChristophe Leroy #include <linux/of_address.h>
23bb2b66dcSMartyn Welch 
24bb2b66dcSMartyn Welch #include <asm/time.h>
25bb2b66dcSMartyn Welch #include <asm/machdep.h>
26bb2b66dcSMartyn Welch #include <asm/pci-bridge.h>
27bb2b66dcSMartyn Welch #include <mm/mmu_decl.h>
28bb2b66dcSMartyn Welch #include <asm/udbg.h>
29bb2b66dcSMartyn Welch 
30bb2b66dcSMartyn Welch #include <asm/mpic.h>
319093067aSMartyn Welch #include <asm/nvram.h>
32bb2b66dcSMartyn Welch 
33bb2b66dcSMartyn Welch #include <sysdev/fsl_pci.h>
34bb2b66dcSMartyn Welch #include <sysdev/fsl_soc.h>
3544b24b74SMartyn Welch #include <sysdev/ge/ge_pic.h>
36bb2b66dcSMartyn Welch 
37bb2b66dcSMartyn Welch #include "mpc86xx.h"
38bb2b66dcSMartyn Welch 
39bb2b66dcSMartyn Welch #undef DEBUG
40bb2b66dcSMartyn Welch 
41bb2b66dcSMartyn Welch #ifdef DEBUG
42bb2b66dcSMartyn Welch #define DBG (fmt...) do { printk(KERN_ERR "SBC310: " fmt); } while (0)
43bb2b66dcSMartyn Welch #else
44bb2b66dcSMartyn Welch #define DBG (fmt...) do { } while (0)
45bb2b66dcSMartyn Welch #endif
46bb2b66dcSMartyn Welch 
47bb2b66dcSMartyn Welch void __iomem *sbc310_regs;
48bb2b66dcSMartyn Welch 
gef_sbc310_init_irq(void)49bb2b66dcSMartyn Welch static void __init gef_sbc310_init_irq(void)
50bb2b66dcSMartyn Welch {
51bb2b66dcSMartyn Welch 	struct device_node *cascade_node = NULL;
52bb2b66dcSMartyn Welch 
53bb2b66dcSMartyn Welch 	mpc86xx_init_irq();
54bb2b66dcSMartyn Welch 
55bb2b66dcSMartyn Welch 	/*
56bb2b66dcSMartyn Welch 	 * There is a simple interrupt handler in the main FPGA, this needs
57bb2b66dcSMartyn Welch 	 * to be cascaded into the MPIC
58bb2b66dcSMartyn Welch 	 */
59bb2b66dcSMartyn Welch 	cascade_node = of_find_compatible_node(NULL, NULL, "gef,fpga-pic");
60bb2b66dcSMartyn Welch 	if (!cascade_node) {
61bb2b66dcSMartyn Welch 		printk(KERN_WARNING "SBC310: No FPGA PIC\n");
62bb2b66dcSMartyn Welch 		return;
63bb2b66dcSMartyn Welch 	}
64bb2b66dcSMartyn Welch 
65bb2b66dcSMartyn Welch 	gef_pic_init(cascade_node);
66bb2b66dcSMartyn Welch 	of_node_put(cascade_node);
67bb2b66dcSMartyn Welch }
68bb2b66dcSMartyn Welch 
gef_sbc310_setup_arch(void)69bb2b66dcSMartyn Welch static void __init gef_sbc310_setup_arch(void)
70bb2b66dcSMartyn Welch {
71bb2b66dcSMartyn Welch 	struct device_node *regs;
72948e78c3SMartyn Welch 	printk(KERN_INFO "GE Intelligent Platforms SBC310 6U VPX SBC\n");
73bb2b66dcSMartyn Welch 
74bb2b66dcSMartyn Welch #ifdef CONFIG_SMP
75bb2b66dcSMartyn Welch 	mpc86xx_smp_init();
76bb2b66dcSMartyn Welch #endif
77bb2b66dcSMartyn Welch 
78905e75c4SJia Hongtao 	fsl_pci_assign_primary();
79905e75c4SJia Hongtao 
80bb2b66dcSMartyn Welch 	/* Remap basic board registers */
81bb2b66dcSMartyn Welch 	regs = of_find_compatible_node(NULL, NULL, "gef,fpga-regs");
82bb2b66dcSMartyn Welch 	if (regs) {
83bb2b66dcSMartyn Welch 		sbc310_regs = of_iomap(regs, 0);
84bb2b66dcSMartyn Welch 		if (sbc310_regs == NULL)
85bb2b66dcSMartyn Welch 			printk(KERN_WARNING "Unable to map board registers\n");
86bb2b66dcSMartyn Welch 		of_node_put(regs);
87bb2b66dcSMartyn Welch 	}
889093067aSMartyn Welch 
899093067aSMartyn Welch #if defined(CONFIG_MMIO_NVRAM)
909093067aSMartyn Welch 	mmio_nvram_init();
919093067aSMartyn Welch #endif
92bb2b66dcSMartyn Welch }
93bb2b66dcSMartyn Welch 
94bb2b66dcSMartyn Welch /* Return the PCB revision */
gef_sbc310_get_board_id(void)95bb2b66dcSMartyn Welch static unsigned int gef_sbc310_get_board_id(void)
96bb2b66dcSMartyn Welch {
97bb2b66dcSMartyn Welch 	unsigned int reg;
98bb2b66dcSMartyn Welch 
99bb2b66dcSMartyn Welch 	reg = ioread32(sbc310_regs);
100bb2b66dcSMartyn Welch 	return reg & 0xff;
101bb2b66dcSMartyn Welch }
102bb2b66dcSMartyn Welch 
103bb2b66dcSMartyn Welch /* Return the PCB revision */
gef_sbc310_get_pcb_rev(void)104bb2b66dcSMartyn Welch static unsigned int gef_sbc310_get_pcb_rev(void)
105bb2b66dcSMartyn Welch {
106bb2b66dcSMartyn Welch 	unsigned int reg;
107bb2b66dcSMartyn Welch 
108bb2b66dcSMartyn Welch 	reg = ioread32(sbc310_regs);
109bb2b66dcSMartyn Welch 	return (reg >> 8) & 0xff;
110bb2b66dcSMartyn Welch }
111bb2b66dcSMartyn Welch 
112bb2b66dcSMartyn Welch /* Return the board (software) revision */
gef_sbc310_get_board_rev(void)113bb2b66dcSMartyn Welch static unsigned int gef_sbc310_get_board_rev(void)
114bb2b66dcSMartyn Welch {
115bb2b66dcSMartyn Welch 	unsigned int reg;
116bb2b66dcSMartyn Welch 
117bb2b66dcSMartyn Welch 	reg = ioread32(sbc310_regs);
118bb2b66dcSMartyn Welch 	return (reg >> 16) & 0xff;
119bb2b66dcSMartyn Welch }
120bb2b66dcSMartyn Welch 
121bb2b66dcSMartyn Welch /* Return the FPGA revision */
gef_sbc310_get_fpga_rev(void)122bb2b66dcSMartyn Welch static unsigned int gef_sbc310_get_fpga_rev(void)
123bb2b66dcSMartyn Welch {
124bb2b66dcSMartyn Welch 	unsigned int reg;
125bb2b66dcSMartyn Welch 
126bb2b66dcSMartyn Welch 	reg = ioread32(sbc310_regs);
127bb2b66dcSMartyn Welch 	return (reg >> 24) & 0xf;
128bb2b66dcSMartyn Welch }
129bb2b66dcSMartyn Welch 
gef_sbc310_show_cpuinfo(struct seq_file * m)130bb2b66dcSMartyn Welch static void gef_sbc310_show_cpuinfo(struct seq_file *m)
131bb2b66dcSMartyn Welch {
132bb2b66dcSMartyn Welch 	uint svid = mfspr(SPRN_SVR);
133bb2b66dcSMartyn Welch 
134948e78c3SMartyn Welch 	seq_printf(m, "Vendor\t\t: GE Intelligent Platforms\n");
135bb2b66dcSMartyn Welch 
136bb2b66dcSMartyn Welch 	seq_printf(m, "Board ID\t: 0x%2.2x\n", gef_sbc310_get_board_id());
137bb2b66dcSMartyn Welch 	seq_printf(m, "Revision\t: %u%c\n", gef_sbc310_get_pcb_rev(),
138bb2b66dcSMartyn Welch 		('A' + gef_sbc310_get_board_rev() - 1));
139bb2b66dcSMartyn Welch 	seq_printf(m, "FPGA Revision\t: %u\n", gef_sbc310_get_fpga_rev());
140bb2b66dcSMartyn Welch 
141bb2b66dcSMartyn Welch 	seq_printf(m, "SVR\t\t: 0x%x\n", svid);
142bb2b66dcSMartyn Welch 
143bb2b66dcSMartyn Welch }
144bb2b66dcSMartyn Welch 
gef_sbc310_nec_fixup(struct pci_dev * pdev)145cad5cef6SGreg Kroah-Hartman static void gef_sbc310_nec_fixup(struct pci_dev *pdev)
146bb2b66dcSMartyn Welch {
147bb2b66dcSMartyn Welch 	unsigned int val;
148bb2b66dcSMartyn Welch 
14901ce8ef5SMartyn Welch 	/* Do not do the fixup on other platforms! */
15001ce8ef5SMartyn Welch 	if (!machine_is(gef_sbc310))
15101ce8ef5SMartyn Welch 		return;
15201ce8ef5SMartyn Welch 
153bb2b66dcSMartyn Welch 	printk(KERN_INFO "Running NEC uPD720101 Fixup\n");
154bb2b66dcSMartyn Welch 
155bb2b66dcSMartyn Welch 	/* Ensure only ports 1 & 2 are enabled */
156bb2b66dcSMartyn Welch 	pci_read_config_dword(pdev, 0xe0, &val);
157bb2b66dcSMartyn Welch 	pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x2);
158bb2b66dcSMartyn Welch 
159bb2b66dcSMartyn Welch 	/* System clock is 48-MHz Oscillator and EHCI Enabled. */
160bb2b66dcSMartyn Welch 	pci_write_config_dword(pdev, 0xe4, 1 << 5);
161bb2b66dcSMartyn Welch }
162bb2b66dcSMartyn Welch DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
163bb2b66dcSMartyn Welch 	gef_sbc310_nec_fixup);
164bb2b66dcSMartyn Welch 
1654f9d6e95SAlessio Igor Bogani machine_arch_initcall(gef_sbc310, mpc86xx_common_publish_devices);
166bb2b66dcSMartyn Welch 
define_machine(gef_sbc310)167bb2b66dcSMartyn Welch define_machine(gef_sbc310) {
168948e78c3SMartyn Welch 	.name			= "GE SBC310",
1691c96fcdeSChristophe Leroy 	.compatible		= "gef,sbc310",
170bb2b66dcSMartyn Welch 	.setup_arch		= gef_sbc310_setup_arch,
171bb2b66dcSMartyn Welch 	.init_IRQ		= gef_sbc310_init_irq,
172bb2b66dcSMartyn Welch 	.show_cpuinfo		= gef_sbc310_show_cpuinfo,
173bb2b66dcSMartyn Welch 	.get_irq		= mpic_get_irq,
174bb2b66dcSMartyn Welch 	.time_init		= mpc86xx_time_init,
175bb2b66dcSMartyn Welch 	.progress		= udbg_progress,
176bb2b66dcSMartyn Welch #ifdef CONFIG_PCI
177bb2b66dcSMartyn Welch 	.pcibios_fixup_bus	= fsl_pcibios_fixup_bus,
178bb2b66dcSMartyn Welch #endif
179bb2b66dcSMartyn Welch };
180