12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
20052bc5dSKumar Gala /*
30052bc5dSKumar Gala * Based on MPC8560 ADS and arch/ppc tqm85xx ports
40052bc5dSKumar Gala *
50052bc5dSKumar Gala * Maintained by Kumar Gala (see MAINTAINERS for contact information)
60052bc5dSKumar Gala *
70052bc5dSKumar Gala * Copyright 2008 Freescale Semiconductor Inc.
80052bc5dSKumar Gala *
90052bc5dSKumar Gala * Copyright (c) 2005-2006 DENX Software Engineering
100052bc5dSKumar Gala * Stefan Roese <sr@denx.de>
110052bc5dSKumar Gala *
120052bc5dSKumar Gala * Based on original work by
130052bc5dSKumar Gala * Kumar Gala <kumar.gala@freescale.com>
140052bc5dSKumar Gala * Copyright 2004 Freescale Semiconductor Inc.
150052bc5dSKumar Gala */
160052bc5dSKumar Gala
170052bc5dSKumar Gala #include <linux/stddef.h>
180052bc5dSKumar Gala #include <linux/kernel.h>
190052bc5dSKumar Gala #include <linux/pci.h>
200052bc5dSKumar Gala #include <linux/kdev_t.h>
210052bc5dSKumar Gala #include <linux/delay.h>
220052bc5dSKumar Gala #include <linux/seq_file.h>
23*81d7cac4SRob Herring #include <linux/of.h>
240052bc5dSKumar Gala
250052bc5dSKumar Gala #include <asm/time.h>
260052bc5dSKumar Gala #include <asm/machdep.h>
270052bc5dSKumar Gala #include <asm/pci-bridge.h>
280052bc5dSKumar Gala #include <asm/mpic.h>
290052bc5dSKumar Gala #include <mm/mmu_decl.h>
300052bc5dSKumar Gala #include <asm/udbg.h>
310052bc5dSKumar Gala
320052bc5dSKumar Gala #include <sysdev/fsl_soc.h>
330052bc5dSKumar Gala #include <sysdev/fsl_pci.h>
340052bc5dSKumar Gala
35543a07b1SDmitry Eremin-Solenikov #include "mpc85xx.h"
36543a07b1SDmitry Eremin-Solenikov
370052bc5dSKumar Gala #ifdef CONFIG_CPM2
380052bc5dSKumar Gala #include <asm/cpm2.h>
390052bc5dSKumar Gala #endif /* CONFIG_CPM2 */
400052bc5dSKumar Gala
tqm85xx_pic_init(void)410052bc5dSKumar Gala static void __init tqm85xx_pic_init(void)
420052bc5dSKumar Gala {
43996983b7SKyle Moffett struct mpic *mpic = mpic_alloc(NULL, 0,
44e55d7f73SKyle Moffett MPIC_BIG_ENDIAN,
450052bc5dSKumar Gala 0, 256, " OpenPIC ");
460052bc5dSKumar Gala BUG_ON(mpic == NULL);
470052bc5dSKumar Gala mpic_init(mpic);
480052bc5dSKumar Gala
49543a07b1SDmitry Eremin-Solenikov mpc85xx_cpm2_pic_init();
500052bc5dSKumar Gala }
510052bc5dSKumar Gala
520052bc5dSKumar Gala /*
530052bc5dSKumar Gala * Setup the architecture
540052bc5dSKumar Gala */
tqm85xx_setup_arch(void)550052bc5dSKumar Gala static void __init tqm85xx_setup_arch(void)
560052bc5dSKumar Gala {
570052bc5dSKumar Gala if (ppc_md.progress)
580052bc5dSKumar Gala ppc_md.progress("tqm85xx_setup_arch()", 0);
590052bc5dSKumar Gala
600052bc5dSKumar Gala #ifdef CONFIG_CPM2
610052bc5dSKumar Gala cpm2_reset();
620052bc5dSKumar Gala #endif
630052bc5dSKumar Gala
64905e75c4SJia Hongtao fsl_pci_assign_primary();
650052bc5dSKumar Gala }
660052bc5dSKumar Gala
tqm85xx_show_cpuinfo(struct seq_file * m)670052bc5dSKumar Gala static void tqm85xx_show_cpuinfo(struct seq_file *m)
680052bc5dSKumar Gala {
690052bc5dSKumar Gala uint pvid, svid, phid1;
700052bc5dSKumar Gala
710052bc5dSKumar Gala pvid = mfspr(SPRN_PVR);
720052bc5dSKumar Gala svid = mfspr(SPRN_SVR);
730052bc5dSKumar Gala
740052bc5dSKumar Gala seq_printf(m, "Vendor\t\t: TQ Components\n");
750052bc5dSKumar Gala seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
760052bc5dSKumar Gala seq_printf(m, "SVR\t\t: 0x%x\n", svid);
770052bc5dSKumar Gala
780052bc5dSKumar Gala /* Display cpu Pll setting */
790052bc5dSKumar Gala phid1 = mfspr(SPRN_HID1);
800052bc5dSKumar Gala seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
810052bc5dSKumar Gala }
820052bc5dSKumar Gala
tqm85xx_ti1520_fixup(struct pci_dev * pdev)83cad5cef6SGreg Kroah-Hartman static void tqm85xx_ti1520_fixup(struct pci_dev *pdev)
84e9502fbeSDmitry Eremin-Solenikov {
85e9502fbeSDmitry Eremin-Solenikov unsigned int val;
86e9502fbeSDmitry Eremin-Solenikov
87e9502fbeSDmitry Eremin-Solenikov /* Do not do the fixup on other platforms! */
88e9502fbeSDmitry Eremin-Solenikov if (!machine_is(tqm85xx))
89e9502fbeSDmitry Eremin-Solenikov return;
90e9502fbeSDmitry Eremin-Solenikov
91e9502fbeSDmitry Eremin-Solenikov dev_info(&pdev->dev, "Using TI 1520 fixup on TQM85xx\n");
92e9502fbeSDmitry Eremin-Solenikov
93e9502fbeSDmitry Eremin-Solenikov /*
94e9502fbeSDmitry Eremin-Solenikov * Enable P2CCLK bit in system control register
95e9502fbeSDmitry Eremin-Solenikov * to enable CLOCK output to power chip
96e9502fbeSDmitry Eremin-Solenikov */
97e9502fbeSDmitry Eremin-Solenikov pci_read_config_dword(pdev, 0x80, &val);
98e9502fbeSDmitry Eremin-Solenikov pci_write_config_dword(pdev, 0x80, val | (1 << 27));
99e9502fbeSDmitry Eremin-Solenikov
100e9502fbeSDmitry Eremin-Solenikov }
101e9502fbeSDmitry Eremin-Solenikov DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520,
102e9502fbeSDmitry Eremin-Solenikov tqm85xx_ti1520_fixup);
103e9502fbeSDmitry Eremin-Solenikov
104905e75c4SJia Hongtao machine_arch_initcall(tqm85xx, mpc85xx_common_publish_devices);
1050052bc5dSKumar Gala
1069597abe0SAndi Kleen static const char * const board[] __initconst = {
107a4f740cfSGrant Likely "tqc,tqm8540",
108a4f740cfSGrant Likely "tqc,tqm8541",
109a4f740cfSGrant Likely "tqc,tqm8548",
110a4f740cfSGrant Likely "tqc,tqm8555",
111a4f740cfSGrant Likely "tqc,tqm8560",
112a4f740cfSGrant Likely NULL
113a4f740cfSGrant Likely };
114a4f740cfSGrant Likely
1150052bc5dSKumar Gala /*
1160052bc5dSKumar Gala * Called very early, device-tree isn't unflattened
1170052bc5dSKumar Gala */
tqm85xx_probe(void)1180052bc5dSKumar Gala static int __init tqm85xx_probe(void)
1190052bc5dSKumar Gala {
12056571384SBenjamin Herrenschmidt return of_device_compatible_match(of_root, board);
1210052bc5dSKumar Gala }
1220052bc5dSKumar Gala
define_machine(tqm85xx)1230052bc5dSKumar Gala define_machine(tqm85xx) {
1240052bc5dSKumar Gala .name = "TQM85xx",
1250052bc5dSKumar Gala .probe = tqm85xx_probe,
1260052bc5dSKumar Gala .setup_arch = tqm85xx_setup_arch,
1270052bc5dSKumar Gala .init_IRQ = tqm85xx_pic_init,
1280052bc5dSKumar Gala .show_cpuinfo = tqm85xx_show_cpuinfo,
1290052bc5dSKumar Gala .get_irq = mpic_get_irq,
1300052bc5dSKumar Gala .progress = udbg_progress,
1310052bc5dSKumar Gala };
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