12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 25b4e2857SMichael Ellerman /* 35b4e2857SMichael Ellerman */ 45b4e2857SMichael Ellerman 55b4e2857SMichael Ellerman #include <linux/kernel.h> 65b4e2857SMichael Ellerman #include <linux/printk.h> 75b4e2857SMichael Ellerman #include <linux/ptrace.h> 85b4e2857SMichael Ellerman 95b4e2857SMichael Ellerman #include <asm/reg.h> 10f663f331SChristophe Leroy #include <asm/cacheflush.h> 115b4e2857SMichael Ellerman machine_check_440A(struct pt_regs * regs)125b4e2857SMichael Ellermanint machine_check_440A(struct pt_regs *regs) 135b4e2857SMichael Ellerman { 14*4f8e78c0SXiongwei Song unsigned long reason = regs->esr; 155b4e2857SMichael Ellerman 165b4e2857SMichael Ellerman printk("Machine check in kernel mode.\n"); 175b4e2857SMichael Ellerman if (reason & ESR_IMCP){ 185b4e2857SMichael Ellerman printk("Instruction Synchronous Machine Check exception\n"); 195b4e2857SMichael Ellerman mtspr(SPRN_ESR, reason & ~ESR_IMCP); 205b4e2857SMichael Ellerman } 215b4e2857SMichael Ellerman else { 225b4e2857SMichael Ellerman u32 mcsr = mfspr(SPRN_MCSR); 235b4e2857SMichael Ellerman if (mcsr & MCSR_IB) 245b4e2857SMichael Ellerman printk("Instruction Read PLB Error\n"); 255b4e2857SMichael Ellerman if (mcsr & MCSR_DRB) 265b4e2857SMichael Ellerman printk("Data Read PLB Error\n"); 275b4e2857SMichael Ellerman if (mcsr & MCSR_DWB) 285b4e2857SMichael Ellerman printk("Data Write PLB Error\n"); 295b4e2857SMichael Ellerman if (mcsr & MCSR_TLBP) 305b4e2857SMichael Ellerman printk("TLB Parity Error\n"); 315b4e2857SMichael Ellerman if (mcsr & MCSR_ICP){ 325b4e2857SMichael Ellerman flush_instruction_cache(); 335b4e2857SMichael Ellerman printk("I-Cache Parity Error\n"); 345b4e2857SMichael Ellerman } 355b4e2857SMichael Ellerman if (mcsr & MCSR_DCSP) 365b4e2857SMichael Ellerman printk("D-Cache Search Parity Error\n"); 375b4e2857SMichael Ellerman if (mcsr & MCSR_DCFP) 385b4e2857SMichael Ellerman printk("D-Cache Flush Parity Error\n"); 395b4e2857SMichael Ellerman if (mcsr & MCSR_IMPE) 405b4e2857SMichael Ellerman printk("Machine Check exception is imprecise\n"); 415b4e2857SMichael Ellerman 425b4e2857SMichael Ellerman /* Clear MCSR */ 435b4e2857SMichael Ellerman mtspr(SPRN_MCSR, mcsr); 445b4e2857SMichael Ellerman } 455b4e2857SMichael Ellerman return 0; 465b4e2857SMichael Ellerman } 475b4e2857SMichael Ellerman 485b4e2857SMichael Ellerman #ifdef CONFIG_PPC_47x machine_check_47x(struct pt_regs * regs)495b4e2857SMichael Ellermanint machine_check_47x(struct pt_regs *regs) 505b4e2857SMichael Ellerman { 51*4f8e78c0SXiongwei Song unsigned long reason = regs->esr; 525b4e2857SMichael Ellerman u32 mcsr; 535b4e2857SMichael Ellerman 545b4e2857SMichael Ellerman printk(KERN_ERR "Machine check in kernel mode.\n"); 555b4e2857SMichael Ellerman if (reason & ESR_IMCP) { 565b4e2857SMichael Ellerman printk(KERN_ERR "Instruction Synchronous Machine Check exception\n"); 575b4e2857SMichael Ellerman mtspr(SPRN_ESR, reason & ~ESR_IMCP); 585b4e2857SMichael Ellerman return 0; 595b4e2857SMichael Ellerman } 605b4e2857SMichael Ellerman mcsr = mfspr(SPRN_MCSR); 615b4e2857SMichael Ellerman if (mcsr & MCSR_IB) 625b4e2857SMichael Ellerman printk(KERN_ERR "Instruction Read PLB Error\n"); 635b4e2857SMichael Ellerman if (mcsr & MCSR_DRB) 645b4e2857SMichael Ellerman printk(KERN_ERR "Data Read PLB Error\n"); 655b4e2857SMichael Ellerman if (mcsr & MCSR_DWB) 665b4e2857SMichael Ellerman printk(KERN_ERR "Data Write PLB Error\n"); 675b4e2857SMichael Ellerman if (mcsr & MCSR_TLBP) 685b4e2857SMichael Ellerman printk(KERN_ERR "TLB Parity Error\n"); 695b4e2857SMichael Ellerman if (mcsr & MCSR_ICP) { 705b4e2857SMichael Ellerman flush_instruction_cache(); 715b4e2857SMichael Ellerman printk(KERN_ERR "I-Cache Parity Error\n"); 725b4e2857SMichael Ellerman } 735b4e2857SMichael Ellerman if (mcsr & MCSR_DCSP) 745b4e2857SMichael Ellerman printk(KERN_ERR "D-Cache Search Parity Error\n"); 755b4e2857SMichael Ellerman if (mcsr & PPC47x_MCSR_GPR) 765b4e2857SMichael Ellerman printk(KERN_ERR "GPR Parity Error\n"); 775b4e2857SMichael Ellerman if (mcsr & PPC47x_MCSR_FPR) 785b4e2857SMichael Ellerman printk(KERN_ERR "FPR Parity Error\n"); 795b4e2857SMichael Ellerman if (mcsr & PPC47x_MCSR_IPR) 805b4e2857SMichael Ellerman printk(KERN_ERR "Machine Check exception is imprecise\n"); 815b4e2857SMichael Ellerman 825b4e2857SMichael Ellerman /* Clear MCSR */ 835b4e2857SMichael Ellerman mtspr(SPRN_MCSR, mcsr); 845b4e2857SMichael Ellerman 855b4e2857SMichael Ellerman return 0; 865b4e2857SMichael Ellerman } 875b4e2857SMichael Ellerman #endif /* CONFIG_PPC_47x */ 88