1b886d83cSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
26ac0ba5aSNaveen N. Rao /*
36ac0ba5aSNaveen N. Rao * bpf_jit.h: BPF JIT compiler for PPC
40ca87f05SMatt Evans *
50ca87f05SMatt Evans * Copyright 2011 Matt Evans <matt@ozlabs.org>, IBM Corporation
6156d0e29SNaveen N. Rao * 2016 Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
70ca87f05SMatt Evans */
80ca87f05SMatt Evans #ifndef _BPF_JIT_H
90ca87f05SMatt Evans #define _BPF_JIT_H
100ca87f05SMatt Evans
110ca87f05SMatt Evans #ifndef __ASSEMBLY__
120ca87f05SMatt Evans
13156d0e29SNaveen N. Rao #include <asm/types.h>
1406541865SBalamuruhan S #include <asm/ppc-opcode.h>
15156d0e29SNaveen N. Rao
167d40aff8SChristophe Leroy #ifdef CONFIG_PPC64_ELF_ABI_V1
170ca87f05SMatt Evans #define FUNCTION_DESCR_SIZE 24
1809ca5ab2SDenis Kirjanov #else
1909ca5ab2SDenis Kirjanov #define FUNCTION_DESCR_SIZE 0
2009ca5ab2SDenis Kirjanov #endif
210ca87f05SMatt Evans
227e3a68beSNicholas Piggin #define CTX_NIA(ctx) ((unsigned long)ctx->idx * 4)
237e3a68beSNicholas Piggin
240ca87f05SMatt Evans #define PLANT_INSTR(d, idx, instr) \
250ca87f05SMatt Evans do { if (d) { (d)[idx] = instr; } idx++; } while (0)
260ca87f05SMatt Evans #define EMIT(instr) PLANT_INSTR(image, ctx->idx, instr)
270ca87f05SMatt Evans
280ca87f05SMatt Evans /* Long jump; (unconditional 'branch') */
293832ba4eSNaveen N. Rao #define PPC_JMP(dest) \
303832ba4eSNaveen N. Rao do { \
317e3a68beSNicholas Piggin long offset = (long)(dest) - CTX_NIA(ctx); \
32acd7408dSNaveen N. Rao if ((dest) != 0 && !is_offset_in_branch_range(offset)) { \
333832ba4eSNaveen N. Rao pr_err_ratelimited("Branch offset 0x%lx (@%u) out of range\n", offset, ctx->idx); \
343832ba4eSNaveen N. Rao return -ERANGE; \
353832ba4eSNaveen N. Rao } \
36f15a71b3SHari Bathini EMIT(PPC_RAW_BRANCH(offset)); \
373832ba4eSNaveen N. Rao } while (0)
383832ba4eSNaveen N. Rao
39*466562d7SGreg Kroah-Hartman /* bl (unconditional 'branch' with link) */
40*466562d7SGreg Kroah-Hartman #define PPC_BL(dest) EMIT(PPC_RAW_BL((dest) - (unsigned long)(image + ctx->idx)))
41*466562d7SGreg Kroah-Hartman
420ca87f05SMatt Evans /* "cond" here covers BO:BI fields. */
433832ba4eSNaveen N. Rao #define PPC_BCC_SHORT(cond, dest) \
443832ba4eSNaveen N. Rao do { \
457e3a68beSNicholas Piggin long offset = (long)(dest) - CTX_NIA(ctx); \
46acd7408dSNaveen N. Rao if ((dest) != 0 && !is_offset_in_cond_branch_range(offset)) { \
473832ba4eSNaveen N. Rao pr_err_ratelimited("Conditional branch offset 0x%lx (@%u) out of range\n", offset, ctx->idx); \
483832ba4eSNaveen N. Rao return -ERANGE; \
493832ba4eSNaveen N. Rao } \
503832ba4eSNaveen N. Rao EMIT(PPC_INST_BRANCH_COND | (((cond) & 0x3ff) << 16) | (offset & 0xfffc)); \
513832ba4eSNaveen N. Rao } while (0)
523832ba4eSNaveen N. Rao
53aaf2f7e0SNaveen N. Rao /* Sign-extended 32-bit immediate load */
54aaf2f7e0SNaveen N. Rao #define PPC_LI32(d, i) do { \
55aaf2f7e0SNaveen N. Rao if ((int)(uintptr_t)(i) >= -32768 && \
56aaf2f7e0SNaveen N. Rao (int)(uintptr_t)(i) < 32768) \
573a181237SBalamuruhan S EMIT(PPC_RAW_LI(d, i)); \
58aaf2f7e0SNaveen N. Rao else { \
593a181237SBalamuruhan S EMIT(PPC_RAW_LIS(d, IMM_H(i))); \
60aaf2f7e0SNaveen N. Rao if (IMM_L(i)) \
613a181237SBalamuruhan S EMIT(PPC_RAW_ORI(d, d, IMM_L(i))); \
620ca87f05SMatt Evans } } while(0)
63aaf2f7e0SNaveen N. Rao
647b187dcdSNaveen N. Rao #ifdef CONFIG_PPC64
650ca87f05SMatt Evans #define PPC_LI64(d, i) do { \
66b1a05787SNaveen N. Rao if ((long)(i) >= -2147483648 && \
67b1a05787SNaveen N. Rao (long)(i) < 2147483648) \
680ca87f05SMatt Evans PPC_LI32(d, i); \
690ca87f05SMatt Evans else { \
70b1a05787SNaveen N. Rao if (!((uintptr_t)(i) & 0xffff800000000000ULL)) \
713a181237SBalamuruhan S EMIT(PPC_RAW_LI(d, ((uintptr_t)(i) >> 32) & \
723a181237SBalamuruhan S 0xffff)); \
73b1a05787SNaveen N. Rao else { \
743a181237SBalamuruhan S EMIT(PPC_RAW_LIS(d, ((uintptr_t)(i) >> 48))); \
750ca87f05SMatt Evans if ((uintptr_t)(i) & 0x0000ffff00000000ULL) \
763a181237SBalamuruhan S EMIT(PPC_RAW_ORI(d, d, \
773a181237SBalamuruhan S ((uintptr_t)(i) >> 32) & 0xffff)); \
78b1a05787SNaveen N. Rao } \
793a181237SBalamuruhan S EMIT(PPC_RAW_SLDI(d, d, 32)); \
800ca87f05SMatt Evans if ((uintptr_t)(i) & 0x00000000ffff0000ULL) \
813a181237SBalamuruhan S EMIT(PPC_RAW_ORIS(d, d, \
823a181237SBalamuruhan S ((uintptr_t)(i) >> 16) & 0xffff)); \
830ca87f05SMatt Evans if ((uintptr_t)(i) & 0x000000000000ffffULL) \
843a181237SBalamuruhan S EMIT(PPC_RAW_ORI(d, d, (uintptr_t)(i) & \
853a181237SBalamuruhan S 0xffff)); \
86b1a05787SNaveen N. Rao } } while (0)
8709ca5ab2SDenis Kirjanov #endif
8809ca5ab2SDenis Kirjanov
890ca87f05SMatt Evans /*
900ca87f05SMatt Evans * The fly in the ointment of code size changing from pass to pass is
910ca87f05SMatt Evans * avoided by padding the short branch case with a NOP. If code size differs
920ca87f05SMatt Evans * with different branch reaches we will have the issue of code moving from
930ca87f05SMatt Evans * one pass to the next and will need a few passes to converge on a stable
940ca87f05SMatt Evans * state.
950ca87f05SMatt Evans */
960ca87f05SMatt Evans #define PPC_BCC(cond, dest) do { \
977e3a68beSNicholas Piggin if (is_offset_in_cond_branch_range((long)(dest) - CTX_NIA(ctx))) { \
980ca87f05SMatt Evans PPC_BCC_SHORT(cond, dest); \
993a181237SBalamuruhan S EMIT(PPC_RAW_NOP()); \
1000ca87f05SMatt Evans } else { \
1010ca87f05SMatt Evans /* Flip the 'T or F' bit to invert comparison */ \
1027e3a68beSNicholas Piggin PPC_BCC_SHORT(cond ^ COND_CMP_TRUE, CTX_NIA(ctx) + 2*4); \
1030ca87f05SMatt Evans PPC_JMP(dest); \
1040ca87f05SMatt Evans } } while(0)
1050ca87f05SMatt Evans
1060ca87f05SMatt Evans /* To create a branch condition, select a bit of cr0... */
1070ca87f05SMatt Evans #define CR0_LT 0
1080ca87f05SMatt Evans #define CR0_GT 1
1090ca87f05SMatt Evans #define CR0_EQ 2
1100ca87f05SMatt Evans /* ...and modify BO[3] */
1110ca87f05SMatt Evans #define COND_CMP_TRUE 0x100
1120ca87f05SMatt Evans #define COND_CMP_FALSE 0x000
1130ca87f05SMatt Evans /* Together, they make all required comparisons: */
1140ca87f05SMatt Evans #define COND_GT (CR0_GT | COND_CMP_TRUE)
1150ca87f05SMatt Evans #define COND_GE (CR0_LT | COND_CMP_FALSE)
1160ca87f05SMatt Evans #define COND_EQ (CR0_EQ | COND_CMP_TRUE)
1170ca87f05SMatt Evans #define COND_NE (CR0_EQ | COND_CMP_FALSE)
1180ca87f05SMatt Evans #define COND_LT (CR0_LT | COND_CMP_TRUE)
11920dbf5ccSDaniel Borkmann #define COND_LE (CR0_GT | COND_CMP_FALSE)
1200ca87f05SMatt Evans
121c426810fSChristophe Leroy #define SEEN_FUNC 0x20000000 /* might call external helpers */
122c9ce7c36SRavi Bangoria #define SEEN_TAILCALL 0x40000000 /* uses tail calls */
123f1b1583dSChristophe Leroy
124f1b1583dSChristophe Leroy struct codegen_context {
125f1b1583dSChristophe Leroy /*
126f1b1583dSChristophe Leroy * This is used to track register usage as well
127f1b1583dSChristophe Leroy * as calls to external helpers.
128f1b1583dSChristophe Leroy * - register usage is tracked with corresponding
129c426810fSChristophe Leroy * bits (r3-r31)
130f1b1583dSChristophe Leroy * - rest of the bits can be used to track other
131c426810fSChristophe Leroy * things -- for now, we use bits 0 to 2
132f1b1583dSChristophe Leroy * encoded in SEEN_* macros above
133f1b1583dSChristophe Leroy */
134f1b1583dSChristophe Leroy unsigned int seen;
135f1b1583dSChristophe Leroy unsigned int idx;
136f1b1583dSChristophe Leroy unsigned int stack_size;
13749c3af43SNaveen N. Rao int b2p[MAX_BPF_JIT_REG + 2];
138983bdc02SRavi Bangoria unsigned int exentry_idx;
1390ffdbce6SNaveen N. Rao unsigned int alt_exit_addr;
140f1b1583dSChristophe Leroy };
141f1b1583dSChristophe Leroy
14249c3af43SNaveen N. Rao #define bpf_to_ppc(r) (ctx->b2p[r])
14349c3af43SNaveen N. Rao
14423b51916SHari Bathini #ifdef CONFIG_PPC32
14523b51916SHari Bathini #define BPF_FIXUP_LEN 3 /* Three instructions => 12 bytes */
14623b51916SHari Bathini #else
147983bdc02SRavi Bangoria #define BPF_FIXUP_LEN 2 /* Two instructions => 8 bytes */
14823b51916SHari Bathini #endif
149983bdc02SRavi Bangoria
bpf_flush_icache(void * start,void * end)150*466562d7SGreg Kroah-Hartman static inline void bpf_flush_icache(void *start, void *end)
151*466562d7SGreg Kroah-Hartman {
152*466562d7SGreg Kroah-Hartman smp_wmb(); /* smp write barrier */
153*466562d7SGreg Kroah-Hartman flush_icache_range((unsigned long)start, (unsigned long)end);
154*466562d7SGreg Kroah-Hartman }
155*466562d7SGreg Kroah-Hartman
bpf_is_seen_register(struct codegen_context * ctx,int i)156f1b1583dSChristophe Leroy static inline bool bpf_is_seen_register(struct codegen_context *ctx, int i)
157f1b1583dSChristophe Leroy {
158f1b1583dSChristophe Leroy return ctx->seen & (1 << (31 - i));
159f1b1583dSChristophe Leroy }
160f1b1583dSChristophe Leroy
bpf_set_seen_register(struct codegen_context * ctx,int i)161f1b1583dSChristophe Leroy static inline void bpf_set_seen_register(struct codegen_context *ctx, int i)
162f1b1583dSChristophe Leroy {
163f1b1583dSChristophe Leroy ctx->seen |= 1 << (31 - i);
164f1b1583dSChristophe Leroy }
165f1b1583dSChristophe Leroy
bpf_clear_seen_register(struct codegen_context * ctx,int i)16640272035SChristophe Leroy static inline void bpf_clear_seen_register(struct codegen_context *ctx, int i)
16740272035SChristophe Leroy {
16840272035SChristophe Leroy ctx->seen &= ~(1 << (31 - i));
16940272035SChristophe Leroy }
17040272035SChristophe Leroy
17149c3af43SNaveen N. Rao void bpf_jit_init_reg_mapping(struct codegen_context *ctx);
172*466562d7SGreg Kroah-Hartman int bpf_jit_emit_func_call_rel(u32 *image, struct codegen_context *ctx, u64 func);
173*466562d7SGreg Kroah-Hartman int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, struct codegen_context *ctx,
17485e03115SChristophe Leroy u32 *addrs, int pass, bool extra_pass);
1754ea76e90SChristophe Leroy void bpf_jit_build_prologue(u32 *image, struct codegen_context *ctx);
1764ea76e90SChristophe Leroy void bpf_jit_build_epilogue(u32 *image, struct codegen_context *ctx);
17740272035SChristophe Leroy void bpf_jit_realloc_regs(struct codegen_context *ctx);
1780ffdbce6SNaveen N. Rao int bpf_jit_emit_exit_insn(u32 *image, struct codegen_context *ctx, int tmp_reg, long exit_addr);
1794ea76e90SChristophe Leroy
180*466562d7SGreg Kroah-Hartman int bpf_add_extable_entry(struct bpf_prog *fp, u32 *image, int pass, struct codegen_context *ctx,
181*466562d7SGreg Kroah-Hartman int insn_idx, int jmp_off, int dst_reg);
182983bdc02SRavi Bangoria
1830ca87f05SMatt Evans #endif
1840ca87f05SMatt Evans
1850ca87f05SMatt Evans #endif
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