114cf11afSPaul Mackerras /* 214cf11afSPaul Mackerras * Declarations of procedures and variables shared between files 314cf11afSPaul Mackerras * in arch/ppc/mm/. 414cf11afSPaul Mackerras * 514cf11afSPaul Mackerras * Derived from arch/ppc/mm/init.c: 614cf11afSPaul Mackerras * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 714cf11afSPaul Mackerras * 814cf11afSPaul Mackerras * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au) 914cf11afSPaul Mackerras * and Cort Dougan (PReP) (cort@cs.nmt.edu) 1014cf11afSPaul Mackerras * Copyright (C) 1996 Paul Mackerras 1114cf11afSPaul Mackerras * 1214cf11afSPaul Mackerras * Derived from "arch/i386/mm/init.c" 1314cf11afSPaul Mackerras * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds 1414cf11afSPaul Mackerras * 1514cf11afSPaul Mackerras * This program is free software; you can redistribute it and/or 1614cf11afSPaul Mackerras * modify it under the terms of the GNU General Public License 1714cf11afSPaul Mackerras * as published by the Free Software Foundation; either version 1814cf11afSPaul Mackerras * 2 of the License, or (at your option) any later version. 1914cf11afSPaul Mackerras * 2014cf11afSPaul Mackerras */ 2162102307SDavid Gibson #include <linux/mm.h> 2214cf11afSPaul Mackerras #include <asm/tlbflush.h> 2314cf11afSPaul Mackerras #include <asm/mmu.h> 2414cf11afSPaul Mackerras 252a4aca11SBenjamin Herrenschmidt #ifdef CONFIG_PPC_MMU_NOHASH 262a4aca11SBenjamin Herrenschmidt 272a4aca11SBenjamin Herrenschmidt /* 282a4aca11SBenjamin Herrenschmidt * On 40x and 8xx, we directly inline tlbia and tlbivax 292a4aca11SBenjamin Herrenschmidt */ 302a4aca11SBenjamin Herrenschmidt #if defined(CONFIG_40x) || defined(CONFIG_8xx) 312a4aca11SBenjamin Herrenschmidt static inline void _tlbil_all(void) 322a4aca11SBenjamin Herrenschmidt { 334a082682SBenjamin Herrenschmidt asm volatile ("sync; tlbia; isync" : : : "memory"); 342a4aca11SBenjamin Herrenschmidt } 352a4aca11SBenjamin Herrenschmidt static inline void _tlbil_pid(unsigned int pid) 362a4aca11SBenjamin Herrenschmidt { 374a082682SBenjamin Herrenschmidt asm volatile ("sync; tlbia; isync" : : : "memory"); 382a4aca11SBenjamin Herrenschmidt } 39*d4e167daSBenjamin Herrenschmidt #define _tlbil_pid_noind(pid) _tlbil_pid(pid) 40*d4e167daSBenjamin Herrenschmidt 412a4aca11SBenjamin Herrenschmidt #else /* CONFIG_40x || CONFIG_8xx */ 422a4aca11SBenjamin Herrenschmidt extern void _tlbil_all(void); 432a4aca11SBenjamin Herrenschmidt extern void _tlbil_pid(unsigned int pid); 44*d4e167daSBenjamin Herrenschmidt #define _tlbil_pid_noind(pid) _tlbil_pid(pid) 452a4aca11SBenjamin Herrenschmidt #endif /* !(CONFIG_40x || CONFIG_8xx) */ 462a4aca11SBenjamin Herrenschmidt 472a4aca11SBenjamin Herrenschmidt /* 482a4aca11SBenjamin Herrenschmidt * On 8xx, we directly inline tlbie, on others, it's extern 492a4aca11SBenjamin Herrenschmidt */ 502a4aca11SBenjamin Herrenschmidt #ifdef CONFIG_8xx 51*d4e167daSBenjamin Herrenschmidt static inline void _tlbil_va(unsigned long address, unsigned int pid, 52*d4e167daSBenjamin Herrenschmidt unsigned int tsize, unsigned int ind) 532a4aca11SBenjamin Herrenschmidt { 544a082682SBenjamin Herrenschmidt asm volatile ("tlbie %0; sync" : : "r" (address) : "memory"); 552a4aca11SBenjamin Herrenschmidt } 562a4aca11SBenjamin Herrenschmidt #else /* CONFIG_8xx */ 57*d4e167daSBenjamin Herrenschmidt extern void __tlbil_va(unsigned long address, unsigned int pid); 58*d4e167daSBenjamin Herrenschmidt static inline void _tlbil_va(unsigned long address, unsigned int pid, 59*d4e167daSBenjamin Herrenschmidt unsigned int tsize, unsigned int ind) 60*d4e167daSBenjamin Herrenschmidt { 61*d4e167daSBenjamin Herrenschmidt __tlbil_va(address, pid); 62*d4e167daSBenjamin Herrenschmidt } 632a4aca11SBenjamin Herrenschmidt #endif /* CONIFG_8xx */ 642a4aca11SBenjamin Herrenschmidt 652a4aca11SBenjamin Herrenschmidt /* 662a4aca11SBenjamin Herrenschmidt * As of today, we don't support tlbivax broadcast on any 672a4aca11SBenjamin Herrenschmidt * implementation. When that becomes the case, this will be 682a4aca11SBenjamin Herrenschmidt * an extern. 692a4aca11SBenjamin Herrenschmidt */ 70*d4e167daSBenjamin Herrenschmidt static inline void _tlbivax_bcast(unsigned long address, unsigned int pid, 71*d4e167daSBenjamin Herrenschmidt unsigned int tsize, unsigned int ind) 722a4aca11SBenjamin Herrenschmidt { 732a4aca11SBenjamin Herrenschmidt BUG(); 742a4aca11SBenjamin Herrenschmidt } 752a4aca11SBenjamin Herrenschmidt 762a4aca11SBenjamin Herrenschmidt #else /* CONFIG_PPC_MMU_NOHASH */ 772a4aca11SBenjamin Herrenschmidt 78ee4f2ea4SBenjamin Herrenschmidt extern void hash_preload(struct mm_struct *mm, unsigned long ea, 79ee4f2ea4SBenjamin Herrenschmidt unsigned long access, unsigned long trap); 80ee4f2ea4SBenjamin Herrenschmidt 81ee4f2ea4SBenjamin Herrenschmidt 822a4aca11SBenjamin Herrenschmidt extern void _tlbie(unsigned long address); 832a4aca11SBenjamin Herrenschmidt extern void _tlbia(void); 842a4aca11SBenjamin Herrenschmidt 852a4aca11SBenjamin Herrenschmidt #endif /* CONFIG_PPC_MMU_NOHASH */ 862a4aca11SBenjamin Herrenschmidt 87ab1f9dacSPaul Mackerras #ifdef CONFIG_PPC32 8819f5465eSTrent Piepho 8919f5465eSTrent Piepho struct tlbcam { 9019f5465eSTrent Piepho u32 MAS0; 9119f5465eSTrent Piepho u32 MAS1; 9219f5465eSTrent Piepho u32 MAS2; 9319f5465eSTrent Piepho u32 MAS3; 9419f5465eSTrent Piepho u32 MAS7; 9519f5465eSTrent Piepho }; 9619f5465eSTrent Piepho 9714cf11afSPaul Mackerras extern void mapin_ram(void); 9814cf11afSPaul Mackerras extern int map_page(unsigned long va, phys_addr_t pa, int flags); 997c5c4325SBecky Bruce extern void setbat(int index, unsigned long virt, phys_addr_t phys, 10014cf11afSPaul Mackerras unsigned int size, int flags); 10114cf11afSPaul Mackerras extern void settlbcam(int index, unsigned long virt, phys_addr_t phys, 10214cf11afSPaul Mackerras unsigned int size, int flags, unsigned int pid); 10314cf11afSPaul Mackerras extern void invalidate_tlbcam_entry(int index); 10414cf11afSPaul Mackerras 10514cf11afSPaul Mackerras extern int __map_without_bats; 10614cf11afSPaul Mackerras extern unsigned long ioremap_base; 10714cf11afSPaul Mackerras extern unsigned int rtas_data, rtas_size; 10814cf11afSPaul Mackerras 1098e561e7eSDavid Gibson struct hash_pte; 1108e561e7eSDavid Gibson extern struct hash_pte *Hash, *Hash_end; 11114cf11afSPaul Mackerras extern unsigned long Hash_size, Hash_mask; 112ab1f9dacSPaul Mackerras #endif 113ab1f9dacSPaul Mackerras 114800fc3eeSDavid Gibson extern unsigned long ioremap_bot; 115ab1f9dacSPaul Mackerras extern unsigned long __max_low_memory; 11609b5e63fSKumar Gala extern phys_addr_t __initial_memory_limit_addr; 1172bf3016fSStefan Roese extern phys_addr_t total_memory; 1182bf3016fSStefan Roese extern phys_addr_t total_lowmem; 11999c62dd7SKumar Gala extern phys_addr_t memstart_addr; 120d7917ba7SKumar Gala extern phys_addr_t lowmem_end_addr; 12114cf11afSPaul Mackerras 12214cf11afSPaul Mackerras /* ...and now those things that may be slightly different between processor 12314cf11afSPaul Mackerras * architectures. -- Dan 12414cf11afSPaul Mackerras */ 12514cf11afSPaul Mackerras #if defined(CONFIG_8xx) 12614cf11afSPaul Mackerras #define MMU_init_hw() do { } while(0) 12714cf11afSPaul Mackerras #define mmu_mapin_ram() (0UL) 12814cf11afSPaul Mackerras 12914cf11afSPaul Mackerras #elif defined(CONFIG_4xx) 13014cf11afSPaul Mackerras extern void MMU_init_hw(void); 13114cf11afSPaul Mackerras extern unsigned long mmu_mapin_ram(void); 13214cf11afSPaul Mackerras 13314cf11afSPaul Mackerras #elif defined(CONFIG_FSL_BOOKE) 13414cf11afSPaul Mackerras extern void MMU_init_hw(void); 13514cf11afSPaul Mackerras extern unsigned long mmu_mapin_ram(void); 13614cf11afSPaul Mackerras extern void adjust_total_lowmem(void); 13714cf11afSPaul Mackerras 138ab1f9dacSPaul Mackerras #elif defined(CONFIG_PPC32) 139ab1f9dacSPaul Mackerras /* anything 32-bit except 4xx or 8xx */ 14014cf11afSPaul Mackerras extern void MMU_init_hw(void); 14114cf11afSPaul Mackerras extern unsigned long mmu_mapin_ram(void); 14214cf11afSPaul Mackerras #endif 143