1*14cf11afSPaul Mackerras /* 2*14cf11afSPaul Mackerras * Declarations of procedures and variables shared between files 3*14cf11afSPaul Mackerras * in arch/ppc/mm/. 4*14cf11afSPaul Mackerras * 5*14cf11afSPaul Mackerras * Derived from arch/ppc/mm/init.c: 6*14cf11afSPaul Mackerras * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 7*14cf11afSPaul Mackerras * 8*14cf11afSPaul Mackerras * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au) 9*14cf11afSPaul Mackerras * and Cort Dougan (PReP) (cort@cs.nmt.edu) 10*14cf11afSPaul Mackerras * Copyright (C) 1996 Paul Mackerras 11*14cf11afSPaul Mackerras * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk). 12*14cf11afSPaul Mackerras * 13*14cf11afSPaul Mackerras * Derived from "arch/i386/mm/init.c" 14*14cf11afSPaul Mackerras * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds 15*14cf11afSPaul Mackerras * 16*14cf11afSPaul Mackerras * This program is free software; you can redistribute it and/or 17*14cf11afSPaul Mackerras * modify it under the terms of the GNU General Public License 18*14cf11afSPaul Mackerras * as published by the Free Software Foundation; either version 19*14cf11afSPaul Mackerras * 2 of the License, or (at your option) any later version. 20*14cf11afSPaul Mackerras * 21*14cf11afSPaul Mackerras */ 22*14cf11afSPaul Mackerras #include <asm/tlbflush.h> 23*14cf11afSPaul Mackerras #include <asm/mmu.h> 24*14cf11afSPaul Mackerras 25*14cf11afSPaul Mackerras extern void mapin_ram(void); 26*14cf11afSPaul Mackerras extern int map_page(unsigned long va, phys_addr_t pa, int flags); 27*14cf11afSPaul Mackerras extern void setbat(int index, unsigned long virt, unsigned long phys, 28*14cf11afSPaul Mackerras unsigned int size, int flags); 29*14cf11afSPaul Mackerras extern void reserve_phys_mem(unsigned long start, unsigned long size); 30*14cf11afSPaul Mackerras extern void settlbcam(int index, unsigned long virt, phys_addr_t phys, 31*14cf11afSPaul Mackerras unsigned int size, int flags, unsigned int pid); 32*14cf11afSPaul Mackerras extern void invalidate_tlbcam_entry(int index); 33*14cf11afSPaul Mackerras 34*14cf11afSPaul Mackerras extern int __map_without_bats; 35*14cf11afSPaul Mackerras extern unsigned long ioremap_base; 36*14cf11afSPaul Mackerras extern unsigned long ioremap_bot; 37*14cf11afSPaul Mackerras extern unsigned int rtas_data, rtas_size; 38*14cf11afSPaul Mackerras 39*14cf11afSPaul Mackerras extern unsigned long total_memory; 40*14cf11afSPaul Mackerras extern unsigned long total_lowmem; 41*14cf11afSPaul Mackerras extern int mem_init_done; 42*14cf11afSPaul Mackerras 43*14cf11afSPaul Mackerras extern PTE *Hash, *Hash_end; 44*14cf11afSPaul Mackerras extern unsigned long Hash_size, Hash_mask; 45*14cf11afSPaul Mackerras 46*14cf11afSPaul Mackerras extern unsigned int num_tlbcam_entries; 47*14cf11afSPaul Mackerras 48*14cf11afSPaul Mackerras /* ...and now those things that may be slightly different between processor 49*14cf11afSPaul Mackerras * architectures. -- Dan 50*14cf11afSPaul Mackerras */ 51*14cf11afSPaul Mackerras #if defined(CONFIG_8xx) 52*14cf11afSPaul Mackerras #define flush_HPTE(X, va, pg) _tlbie(va) 53*14cf11afSPaul Mackerras #define MMU_init_hw() do { } while(0) 54*14cf11afSPaul Mackerras #define mmu_mapin_ram() (0UL) 55*14cf11afSPaul Mackerras 56*14cf11afSPaul Mackerras #elif defined(CONFIG_4xx) 57*14cf11afSPaul Mackerras #define flush_HPTE(X, va, pg) _tlbie(va) 58*14cf11afSPaul Mackerras extern void MMU_init_hw(void); 59*14cf11afSPaul Mackerras extern unsigned long mmu_mapin_ram(void); 60*14cf11afSPaul Mackerras 61*14cf11afSPaul Mackerras #elif defined(CONFIG_FSL_BOOKE) 62*14cf11afSPaul Mackerras #define flush_HPTE(X, va, pg) _tlbie(va) 63*14cf11afSPaul Mackerras extern void MMU_init_hw(void); 64*14cf11afSPaul Mackerras extern unsigned long mmu_mapin_ram(void); 65*14cf11afSPaul Mackerras extern void adjust_total_lowmem(void); 66*14cf11afSPaul Mackerras 67*14cf11afSPaul Mackerras #else 68*14cf11afSPaul Mackerras /* anything except 4xx or 8xx */ 69*14cf11afSPaul Mackerras extern void MMU_init_hw(void); 70*14cf11afSPaul Mackerras extern unsigned long mmu_mapin_ram(void); 71*14cf11afSPaul Mackerras 72*14cf11afSPaul Mackerras /* Be careful....this needs to be updated if we ever encounter 603 SMPs, 73*14cf11afSPaul Mackerras * which includes all new 82xx processors. We need tlbie/tlbsync here 74*14cf11afSPaul Mackerras * in that case (I think). -- Dan. 75*14cf11afSPaul Mackerras */ 76*14cf11afSPaul Mackerras static inline void flush_HPTE(unsigned context, unsigned long va, 77*14cf11afSPaul Mackerras unsigned long pdval) 78*14cf11afSPaul Mackerras { 79*14cf11afSPaul Mackerras if ((Hash != 0) && 80*14cf11afSPaul Mackerras cpu_has_feature(CPU_FTR_HPTE_TABLE)) 81*14cf11afSPaul Mackerras flush_hash_pages(0, va, pdval, 1); 82*14cf11afSPaul Mackerras else 83*14cf11afSPaul Mackerras _tlbie(va); 84*14cf11afSPaul Mackerras } 85*14cf11afSPaul Mackerras #endif 86